JPS62125782A - Agc circuit for camera - Google Patents
Agc circuit for cameraInfo
- Publication number
- JPS62125782A JPS62125782A JP60265428A JP26542885A JPS62125782A JP S62125782 A JPS62125782 A JP S62125782A JP 60265428 A JP60265428 A JP 60265428A JP 26542885 A JP26542885 A JP 26542885A JP S62125782 A JPS62125782 A JP S62125782A
- Authority
- JP
- Japan
- Prior art keywords
- agc
- picture
- frame memory
- supplied
- camera
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000004044 response Effects 0.000 abstract description 4
- 238000004364 calculation method Methods 0.000 description 12
- 238000001514 detection method Methods 0.000 description 12
- 238000006243 chemical reaction Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000002123 temporal effect Effects 0.000 description 2
- 238000003672 processing method Methods 0.000 description 1
- 230000004043 responsiveness Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、例えばビデオカメラ等に用いて好適なカメ
ラ用AGC回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an AGC circuit for a camera suitable for use in, for example, a video camera.
この発明は、カメラ用AGC回路において、カメラ出力
をフレームメモリに書き込み、このフレームメモリの内
容を演算してその演算出力によりAGC回路を制御する
ことにより、自動的に画面の特徴に応じて最適なAGC
が行えるようにしたものである。In an AGC circuit for a camera, the present invention writes the camera output to a frame memory, calculates the contents of this frame memory, and controls the AGC circuit using the calculated output, thereby automatically selecting the optimal image according to the characteristics of the screen. AGC
It is designed so that it can be done.
従来アナログ方式のカメラ用AGC回路として第3図に
示すようなものがある。同図において、カメラ(1)か
らの出力信号はAGC増幅器(2)に供給され、その出
力が検波回路(3)で検波される。検波回路(3)は端
子(4)から供給される制御信号によりその時定数を制
御され、画面の特徴に応じてピーク検波または平均値検
波に切換えられる。There is a conventional analog AGC circuit for cameras as shown in FIG. In the figure, an output signal from a camera (1) is supplied to an AGC amplifier (2), and its output is detected by a detection circuit (3). The detection circuit (3) has its time constant controlled by a control signal supplied from the terminal (4), and is switched to peak detection or average value detection depending on the characteristics of the screen.
検波回路(3)の出力は誤差増幅器(5)の一方の入力
側に供給され、誤差増幅器(5)の他方の入力側に供給
される基準電源(6)からの基準電圧と比較され、その
比較誤差信号が制御信号として増幅器(2)に供給され
てその利得が制御されて、増幅器(2)の出力側に一定
の利得をもった出力が得られる。The output of the detection circuit (3) is supplied to one input side of the error amplifier (5), and is compared with the reference voltage from the reference power supply (6) supplied to the other input side of the error amplifier (5). The comparison error signal is supplied as a control signal to the amplifier (2), its gain is controlled, and an output with a constant gain is obtained at the output side of the amplifier (2).
このように利得一定とされた増1lliii器(2)の
出力は信号処理回路(7)に供給され、こ\で輝度信号
Y、色差信号R−Y、B−Yが形成され、これ等の信号
がエンコーダ(8)に供給されてエンコードされ、出力
端子(9)に例えばNTSC方式の標準テレビジョン信
号が得られる。The output of the amplifier (2), whose gain is kept constant in this way, is supplied to the signal processing circuit (7), where the luminance signal Y and color difference signals R-Y, B-Y are formed. The signal is supplied to an encoder (8) and encoded, so that a standard television signal, for example of the NTSC format, is obtained at the output terminal (9).
ところで第3図の如き構成をなす従来回路の場合、次の
ような欠点がある。先ず、第1に検波回路(3)の時定
数は固定或いは使用者の判断により外部から切り換える
方式なので、いつでもその被写体にとって最適な時定数
になる保証はなく、カメラの内部で判断して時定数を切
り換えるのは困難である。However, the conventional circuit having the configuration as shown in FIG. 3 has the following drawbacks. First of all, the time constant of the detection circuit (3) is either fixed or switched externally according to the user's judgment, so there is no guarantee that it will always be the optimal time constant for the subject, and the time constant is determined internally by the camera. It is difficult to switch.
第2に時系列信号を吸うので時間的なAGC応答の要求
とピーク検波、平均値検波等画面の情報の取り方の要求
との両方を満たず検波回路(3)の構成が複雑となり、
特にピーク検波で時間的にゆっくり変化するような場合
問題である。Second, since time-series signals are absorbed, the configuration of the detection circuit (3) becomes complicated because it satisfies both the requirements for a temporal AGC response and the requirements for how to obtain screen information such as peak detection and average value detection.
This is especially a problem when peak detection changes slowly over time.
第3に検波回路(3)の時定数を切り換えたり、また画
面の一部の情報のみを検波したりするとき、誤差増幅器
(5)に供給される基準電圧も変化させる必要があり、
回路構成が複雑となり、調整工数も増加する等の不都合
が出てくる。Thirdly, when switching the time constant of the detection circuit (3) or detecting only part of the information on the screen, it is necessary to change the reference voltage supplied to the error amplifier (5).
This results in disadvantages such as a complicated circuit configuration and an increase in the number of adjustment steps.
この発明は斯る点に鑑みてなされたもので、簡単な回路
構成で、画面の特徴に応じてそれに最適なA、 G C
を自動的に行うことができるカメラ用A G CliJ
路を提供するものである。This invention was made in view of this point, and has a simple circuit configuration that allows A, G, and C to be selected according to the characteristics of the screen.
A G CliJ for cameras that can automatically perform
It provides a road.
この発明によるカメラ用AGC1pl路は、カメラ出力
をAGC回路(11) 、 (21)を介して導出し
、上記カメラ出力をフレームメモリ (14)に書ぎ込
み、このフレームメモリの内容を演算(15) して上
記AGC回路を制御するように構成している。The camera AGC 1pl path according to the present invention derives the camera output via the AGC circuits (11) and (21), writes the camera output to the frame memory (14), and calculates the contents of this frame memory (15). ) to control the AGC circuit.
カメラ出力をアナログ信号の場合にはA/D変換回路(
12)でディジタル信号に変換し、ディジタル信号の場
合にはそのま\、書き込み制御回路(13)を介してフ
レームメモリ (14)に書き込む。If the camera output is an analog signal, the A/D conversion circuit (
12), it is converted into a digital signal, and if it is a digital signal, it is written directly into the frame memory (14) via the write control circuit (13).
そして、フレームメモリ (14)に書き込まれた画面
情報を読み出して、演算部(15)に供給し、こ\で演
算処理してカメラ出力がアナログ信号の場合にはD/A
変換回路(17)でアナログ信号に変換した後AGC増
幅器(11)に供給してその利得を制御し、一方カメラ
出力がディジタル信号の場合には演算結果をそのまLA
GC増幅器としての掛算器(21)に供給してその利得
を制御する。これにより、画面の特徴に応じて、それに
最適なAGCを自動的に行うことができる。Then, the screen information written in the frame memory (14) is read out and supplied to the calculation unit (15), where it is processed and if the camera output is an analog signal, it is sent to the D/A.
After converting it into an analog signal in the conversion circuit (17), it is supplied to the AGC amplifier (11) to control its gain.On the other hand, if the camera output is a digital signal, the calculation result is directly sent to the LA.
It is supplied to a multiplier (21) as a GC amplifier to control its gain. Thereby, it is possible to automatically perform AGC that is optimal for the characteristics of the screen.
以ド、この発明の一実施例を第1図及び第2図に基づい
て詳しく説明する。Hereinafter, one embodiment of the present invention will be described in detail based on FIGS. 1 and 2.
第1図はこの発明の第1実施例の回路構成を示すもので
、本実施例は人力信号がアナログ信号の場合である。同
図において、(10)は撮像素子等からのアナログ信号
が供給される入力端子であって、この入力端子(10)
からのアナログ信号はAGC増幅器(11)に供給され
ると共にA/D変換回路(12)に供給され、A/D変
換回路(12)でアナログ信号よりディジタル信号に変
換され、画面情報として書き込み制御回li!t(13
)を介してフレーム毎にフレームメモリ (14)に書
き込まれる。FIG. 1 shows the circuit configuration of a first embodiment of the present invention, in which the human input signal is an analog signal. In the figure, (10) is an input terminal to which an analog signal from an image sensor etc. is supplied, and this input terminal (10)
The analog signal from is supplied to the AGC amplifier (11) and is also supplied to the A/D conversion circuit (12), where the analog signal is converted into a digital signal and is controlled to be written as screen information. Times li! t(13
) is written to the frame memory (14) frame by frame.
フレームメモリ (14)に書き込まれた画面情報は所
定時間後読み出されて演算部(15)に供給され、演算
部(15)で次の手順に従って演算処理される。つまり
、演算部(15)では先ず画面情報より例えば逆光かハ
イライト等の画面の特徴の検出を行い、次に画面の特徴
に!&通な方式で画面のレベル(明るさ)を検出し、最
後に検出した画面のレベルから必要なAGC利得を計算
し、必要な時間的応答で出力する。演算部(15)にお
ける上述の手順は端子(16)に印加される外部からの
制御信号により強制的に変更することも’i=J能であ
る。The screen information written in the frame memory (14) is read out after a predetermined period of time and supplied to the arithmetic unit (15), where it is subjected to arithmetic processing according to the following procedure. In other words, the calculation unit (15) first detects screen characteristics such as backlight or highlights from the screen information, and then detects screen characteristics! Detects the screen level (brightness) using a comprehensive method, calculates the necessary AGC gain from the last detected screen level, and outputs it with the necessary time response. The above-described procedure in the arithmetic unit (15) can also be forcibly changed by an external control signal applied to the terminal (16).
演算部(15)からの出力信号はD/A変換回路(17
)でディジタル信号よりアナログ信号に変換され、制御
信号として増幅器(11)に供給され、AGC利得が制
御される。そしてAGC利得の制御された増幅器(11
)からの信号は出力端子(18)に取り出される。The output signal from the calculation section (15) is sent to the D/A conversion circuit (17).
) converts the digital signal into an analog signal, which is supplied as a control signal to the amplifier (11) to control the AGC gain. and an AGC gain controlled amplifier (11
) is taken out to the output terminal (18).
なお、演算部(15)における演算は、時間がか\る可
能性があるが、AGC制御は実時間で応答する程の応答
性は要求されず、また全画面に付いて上述の演算を行う
必要はないので画面情報を毎画面フレームメモリ (1
4)に書き込まずに演算速度に見合うよう、前画面かに
一部フレームメモリ(14)に書き込み、上述の演算を
行うことにより充分な性能が得られる。このためフレー
ムメモリ(14)の前段に書き込み制御回路(13)が
設けられている。Note that the calculation in the calculation unit (15) may take some time, but the AGC control does not require responsiveness to respond in real time, and the above calculation is performed for the entire screen. Since it is not necessary, screen information is stored in frame memory for each screen (1
4), sufficient performance can be obtained by writing part of the previous screen into the frame memory (14) and performing the above calculation to match the calculation speed. For this reason, a write control circuit (13) is provided before the frame memory (14).
ごのようにして本実施例では画面の特徴に応じて、それ
に最適なAGCを自動的に行うことができる。As described above, in this embodiment, it is possible to automatically perform AGC that is most suitable for the characteristics of the screen.
第2図はこの発明の第2実施例をボずもので、本実施例
は人力信号がディジタル信号の場合である。同図におい
て、第1図と対応する部分には同一符号を付し、その詳
細説明は省略する。FIG. 2 shows a second embodiment of the present invention, in which the human input signal is a digital signal. In this figure, parts corresponding to those in FIG. 1 are denoted by the same reference numerals, and detailed explanation thereof will be omitted.
(20)は撮像素子等からのアナログ信号が図示せずも
A/D変換回路でディジタル信号に変換されて供給され
る入力端子であって、この入力端子(20)からのディ
ジタル信号はAGC増幅器としての掛′W器(21)に
供給されると共に書き込み制御回路(13)を介してフ
レームメモリ (14)に画面情報としてフレーム毎に
フレームメモIJ (14)に書き込まれる。(20) is an input terminal to which an analog signal from an image sensor, etc. is converted into a digital signal by an A/D conversion circuit (not shown) and supplied, and the digital signal from this input terminal (20) is sent to an AGC amplifier. The data is supplied to the hanger (21) as screen information, and is also written to the frame memory (14) via the write control circuit (13) as screen information for each frame in the frame memo IJ (14).
フレームメモリ (14)に書き込まれた画面情報は所
定時間後読み出されて演算部(15)に供給され、こ\
で上述の如き演算処理がなされる。そして、演算部(1
5)からの出力信号は制御信号として掛算器(21)に
供給され、こ\で、入力端子(20)からのディジタル
信号が制御され、掛算器(21)より画面の特徴に応じ
たAGC出力が取り出されて出力端子(22)に送出さ
れる。The screen information written in the frame memory (14) is read out after a predetermined time and supplied to the calculation section (15).
The arithmetic processing as described above is performed. Then, the calculation section (1
The output signal from 5) is supplied as a control signal to the multiplier (21), which controls the digital signal from the input terminal (20), and the multiplier (21) outputs the AGC according to the characteristics of the screen. is taken out and sent to the output terminal (22).
このようにして、本実施例でも上述実施例と略々同様の
作用効果を得ることができる。In this way, substantially the same effects as those of the above-mentioned embodiments can be obtained in this embodiment as well.
上述の如くこの発明によれば、画面情報であるカメラ出
力を一部フレームメモリに入れてそのデータを演算処理
し一ζAGC増幅器の制御出力を得るように構成してお
り、画面の性質を知ることができるので自IJJ的にア
ナログ式の検波時定数に対応する演算方式を選択、切り
換えでき、外部からの階承を受けることな(いつでもそ
の画面に最適なAGCをかけることが可能となり、例え
ば自動逆光補正が可能となる。As described above, according to the present invention, part of the camera output, which is screen information, is stored in the frame memory and the data is processed to obtain the control output of the ζAGC amplifier, so that it is possible to know the nature of the screen. This allows you to select and switch the calculation method that corresponds to the analog detection time constant on your own, without receiving input from the outside (it is possible to apply the optimal AGC to the screen at any time, for example, automatically Backlight correction becomes possible.
また、AGCの時間的な応答と、画面情報の処理方法が
分離でき、自由度が広がる。更に画面の一部のみを抜き
出したり、処理方法の変化があっても回路構成はそのま
\で良く、複雑となることはない。Furthermore, the temporal response of AGC and the method of processing screen information can be separated, increasing the degree of freedom. Furthermore, even if only a part of the screen is extracted or the processing method is changed, the circuit configuration can remain the same and will not become complicated.
第1図はこの発明の一実施例を不ずブロック図、第2図
はこの発明の他の実施例を示すブロック図、第3図は従
来回路の一例を示すブロック図である。
(11)はAGC増幅器、(12)はA/D変換回路、
(13)は書き込み制御回路、(14)はフレームメモ
リ、(15)は演算部、(17)はD/A変換回路、(
21)はB)洲器である。FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the invention, and FIG. 3 is a block diagram showing an example of a conventional circuit. (11) is an AGC amplifier, (12) is an A/D conversion circuit,
(13) is a write control circuit, (14) is a frame memory, (15) is an arithmetic unit, (17) is a D/A conversion circuit, (
21) is B) Shuki.
Claims (1)
ムメモリの内容を演算して上記AGC回路を制御するよ
うにしたことを特徴とするカメラ用AGC回路。[Scope of Claims] A camera characterized in that a camera output is derived via an AGC circuit, the camera output is written into a frame memory, and the contents of the frame memory are calculated to control the AGC circuit. AGC circuit for.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60265428A JPS62125782A (en) | 1985-11-26 | 1985-11-26 | Agc circuit for camera |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60265428A JPS62125782A (en) | 1985-11-26 | 1985-11-26 | Agc circuit for camera |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62125782A true JPS62125782A (en) | 1987-06-08 |
Family
ID=17417018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60265428A Pending JPS62125782A (en) | 1985-11-26 | 1985-11-26 | Agc circuit for camera |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62125782A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5641899B2 (en) * | 1974-02-22 | 1981-10-01 | ||
JPS58177023A (en) * | 1982-04-09 | 1983-10-17 | Chino Works Ltd | Automatic gain controlling circuit |
-
1985
- 1985-11-26 JP JP60265428A patent/JPS62125782A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5641899B2 (en) * | 1974-02-22 | 1981-10-01 | ||
JPS58177023A (en) * | 1982-04-09 | 1983-10-17 | Chino Works Ltd | Automatic gain controlling circuit |
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