JPS62122376A - Picture reader - Google Patents

Abstract

PURPOSE:To prevent a longitudinal stripe pattern resulting from an output level difference between an even number picture element and an odd number picture element by providing an output level adjusting part collecting the output level after A/D converting an output picture signal of a solid state image sensor. CONSTITUTION:When a black reference reading signal 21 scans a black reference by H, addition average circuits 11, 12 respectively calculate the addition averages of the picture signals of the odd number picture element and the even number picture elements through one main scanning of the solid state image sensor 4 and they are latched to latch circuits 13, 14 according to a latch pulse, respectively. Then, the difference is calculated by a difference device 15 and outputted to a ROM16. Then, the black reference reading signal 21 is changed to L and scans on an original 2, the output signal of the ROM16 is latched to a latch circuit 17 and a selector circuit 18 outputs alternately difference latch data 30 and data '0' from an input terminal 19 as a correction signal 31. The picture signal from an A/D converter 6 is inputted to an adder 20, added to a correction signal 31, and the picture signal in which the output level is set by the odd number picture element and the even number picture element is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image reading device such as a facsimile or scanner device that scans a document, and particularly to an image reading device using a solid-state image sensor such as a COD.

Conventional Technology When scanning and reading a document using a solid-state image sensor such as a CCD, an image reading device consists of uniformly illuminating the document, forming an image of the reflected light on the solid-state image sensor, and photoelectrically converting the image. (For example, Japanese Patent Application Laid-Open No. 56-120
265, etc.).

A conventional image reading device will be described below with reference to FIG.

A light source 1 uniformly illuminates a document 2, and the reflected light is applied to a solid-state image sensor 4 such as a CCD through a condensing lens 3, photoelectrically converted into an image signal, and amplified to an appropriate amplitude by an amplifier 5. Ru. The A/D converter 6 converts the analog image signal amplified by the amplifier 5 into a digital image signal in synchronization with a clock pulse applied from the pulse generating circuit 7.

Thereafter, the image signal undergoes processing such as binarization and edge enhancement in the digital signal processor 8, and is output to an external device, memory, or the like. However, in image reading devices with multi-gradation output,
Binarization processing is not performed.

The sub-scanning is performed by moving the document or the solid-state image sensor in a direction perpendicular to the paper surface ζζ in FIG. 5 using a sub-scanning feeder (not shown).

Problems to be Solved by the Invention When a CCD having a CCD shift register for odd-numbered pixels and a CCD shift register for even-numbered pixels is used as a solid-state image sensor, the odd-numbered pixels and the even-numbered pixels are There may be a difference in the output level. The difference is only a few percent compared to the average output level, so it is not a problem when processing image signals with binary values or a low number of gradations. After processing the signal,
This method has the disadvantage that a vertical stripe pattern appears on the read image, resulting in a significant drop in image quality. This vertical striped pattern becomes particularly noticeable in minute-level image signals (black originals).

The present invention solves the above-mentioned problems of the prior art, and aims to provide an image reading device in which a vertical striped pattern does not appear due to the difference in output level between even and odd pixels.

Means for Solving the Problems In order to solve the above problems, the present invention provides an output level adjustment unit that corrects the output level of the output image signal of the solid-state image sensor after A/D conversion. It accomplishes its purpose.

Function The present invention provides the above output level adjustment section, so that A
After the /D conversion, the output levels of odd-numbered pixels and even-numbered pixels of the solid-state image sensor are compared, and a correction signal corresponding to the comparison result is calculated with the output image signal from the solid-state image sensor.

Embodiment FIG. 1 is a block diagram showing an embodiment of an image reading apparatus of the present invention.

In FIG. 1, 1 is a light source, 2 is a document, 3 is a condenser lens, 4 is a solid-state image sensor such as a CCD, 4 is an amplifier, and 6
8 is an A/D converter, and 8 is a digital signal processor, which are the same as those in the prior art, as well as the sub-scanning method. Reference numeral 9 denotes an output level adjustment unit that compares the output levels of odd-numbered pixels and even-numbered pixels of the solid-state image sensor 4, and calculates a correction signal according to the comparison result with the output image signal from the solid-state image sensor. 7 is a pulse generation circuit that supplies timing pulses to the A/D converter 6 and the output level adjustment section 9. Although not shown, a black reference with a constant density is installed on the document table on which the original 2 is set, and the black reference is scanned before the original 2 is scanned.

Since the detailed configuration of the output level adjustment section 9 differs depending on the method of comparing the output levels of odd-numbered pixels and even-numbered pixels of the solid-state image sensor 4, a detailed example will be described below.

FIG. 2 is a block diagram showing the detailed configuration of the output level adjustment section 9 in the first embodiment. In Figure 2,
10 is a selector circuit that selects the output light of the digital image signal from the A/D converter 6; 11 is an averaging circuit that calculates the average of image signals over a lifetime of scanning of odd-numbered pixels of the solid-state image sensor 4; and 12 is a solid-state circuit. An averaging circuit that calculates the average of image signals over a lifetime of even-numbered pixels of the image sensor 4; 13 a launch circuit that latches the average value of image signals over a lifetime of odd-numbered pixels; 14 an average of image signals over a lifetime of even-numbered pixels; a latch circuit that launches the average value of the image signal over scanning; 15, a latch circuit 13; a difference circuit that calculates the difference between the signals latched in 14; 16, a ROM that outputs the absolute value of the calculation result of the difference circuit 15; 17
1 is a latch circuit that latches the signal output from the ROM 16, 18 is a selector circuit, and 20 is an adder.

The operation of the above configuration will be explained below with reference to the timing chart shown in FIG. - First, the selector circuit 10 detects that the black reference read signal 21 is at logic "H" (
High)" and the odd pixel readout signal 22 is logic"
When it is H', the image signal from the converter 6 is passed to the averaging circuit 11, and when the black reference read signal 21 is logic "H" and the odd pixel read signal 22 is logic "L (Low)", it is passed through the averaging circuit 12. The image signal from the Φ converter 6 is passed through to the adder 20 when the black reference read signal 21 is logic "L" regardless of the logic of the odd pixel read signal 22.
The image signal from the D converter 6 is passed through. Assuming that the black reference reading signal 21 is at logic "H" and the black reference is being scanned, the averaging circuits 11 and 12 clear the calculation results with the clear pulse 23 every time a scan is completed, and the solid-state image sensor The average of the image signals of odd-numbered pixels and the image signals of even-numbered pixels over four lifetime scans is calculated. The calculation results are latched by the latch pulse 24, so that the average of the image signals of the odd-numbered pixels is latched by the latch circuit 13, and the average of the image signals of the even-numbered pixels is latched by the latch circuit 14.

A latch data 25 latched in the latch circuit 13,
The difference between the B latch data 26 latched by the latch circuit 14 is calculated by the differentiator 15, and the calculation result is outputted to the ROM 16 as difference data 27.

It is now assumed that the difference circuit 15 is configured to subtract B latch data 26 from A latch data 25. B
When the A latch data 25 is larger than the latch data 26, the difference data 27 is the A latch data 25.
This is the absolute value of the difference between the B latch data 26 and the B latch data 26, and its most significant bit 28 is a logic "L". On the other hand, if the B latch data 26 is larger than the A latch data 25, the difference data 27 is the two's complement of the absolute value of the difference between the A latch data 25 and the B latch data 26, and its maximum The upper bit 28 is at logic "H". Therefore, the ROM 16 converts the difference data 27 into its absolute value. The above operation is repeated while the black reference read signal 21 is at logic "H".

Next, when the black reference reading signal 21 changes to logic "L" and the document 2 is scanned, the output signal of the ROM 16 is latched into the latch circuit 17 by the differential latch pulse 29 synchronized with the change.Black reference Since the read signal 21 changes once per scan, the output data of the latch circuit 17, that is, the differential latch data 30, remains unchanged while the original 2 is being scanned.

In the selector circuit 18, an input terminal 19 having the same number of bits as the differential latch data 30 is grounded. That is, there is an input of differential latch data 30 and data "0", and both inputs are output as a correction signal 31 while being controlled by the data switching signal 32 and the logic of the most significant bit 28 of the differential data 27. In other words, When the most significant bit 28 of the difference data 27 is logic "L", the data switching signal 32 becomes logic "H" and outputs data "0" when reading the image signal of an odd numbered pixel, and data switching is performed. Signal 32 is logic “L”
”, and the differential latch data 30 is output when reading out the image signals of even-numbered pixels. Conversely, when the most significant bit 28 of the differential data 27 is logic “H”, the data switching signal 32 is logic “H”. When the data switching signal 32 becomes logic "H" and the image signal of an odd numbered pixel is read out, differential latch data 3° is output, and when the data switching signal 32 becomes logic "L" and the image signal of an even numbered pixel is read out, the data becomes "0". Output.

By the way, since the black reference reading signal 21 is now at logic "L", the image signal from the A/D converter 6 is sent to the adder 2.
0 and is added to the correction signal 31. As a result, image signals with the same output level can be obtained for odd-numbered pixels and even-numbered pixels.

As described above, according to this embodiment, by comparing the output levels of odd-numbered pixels and even-numbered pixels using the average of image signals taken out from the solid-state image sensor over a lifetime of scanning, accurate Since accurate comparison can be made, it is possible to realize an image reading device in which no vertical striped pattern appears over the entire area of the read image.

Next, a second embodiment of the present invention will be described.

FIG. 4 is a block diagram of an output level adjustment section showing a second embodiment of the present invention.

In FIG. 4, 33 is a selector circuit, 20 is an adder,
36 is a DC voltage power supply, 37 and 38 are resistors, 39 is a D/A converter that converts a digital signal into an analog signal, 4
0 is an image monitor. 34 is a DIP switch for setting a correction signal to be added to the image signal read from the odd-numbered pixels of the solid-state image sensor 4; 35 is a DIP switch for setting a correction signal to be added to the image signal read from the even-numbered pixels of the solid-state image sensor 4; Both DIP switches have all bits connected to each other, one terminal is grounded, the other terminal is connected to the selector circuit 33, and at the same time, the resistor 37
, 38 to the DC voltage power supply 36. Therefore, the correction signal can be set as a digital value by combining shorting and opening for each bit.

The operation of the above configuration will be explained below.

When the odd-numbered pixel readout signal 22 becomes logic "H" and the image signal of the odd-numbered pixel is read out, the selector circuit 33 performs the following operations.
Outputs the correction signal set to the dip switch 34,
When the odd-numbered pixel readout signal 22 becomes logic "L" and the image signal of the even-numbered pixel is read out, the correction signal set to the dip switch 35 is output. The adder 20 adds the output signal of the selector circuit 33 and the image signal from the converter 6. The output image signal of the adder 20 is sent to the D/A converter 39.
If the analog image signal is converted and reproduced on the image monitor 40, the read image can be checked with the human eye. Therefore, by adjusting the setting values of the DIP switches 34 and 35 while checking whether a vertical striped pattern appears in the reproduced image on the image monitor 40, an image signal with the same output level can be obtained for odd-numbered pixels and even-numbered pixels.

As described above, according to this embodiment, by setting the correction signal to be added to the image signal using a dip switch and referring to the reproduced image on the image monitor during the setting, a vertical striped pattern can be produced in the read image with a very simple configuration. It is possible to realize an image reading device that does not require any

In this embodiment, an image monitor is also included as a component, but this is not necessarily required for each image reading device according to the present invention, and it is sufficient if several monitors are provided at the production site. Furthermore, it is not always necessary to provide a black reference on the document table, and while scanning a black document with uniform density, the DIP switch 34,
35 may be set.

Furthermore, as another embodiment of the present invention, there is a method of comparing the output levels of odd-numbered pixels and even-numbered pixels of a solid-state image sensor using image signals of a set of adjacent pixels.

Effects of the Invention As described above, according to the present invention, for example, a CCD having a CCD shift register for odd-numbered pixels and a shift register for even-numbered pixels is used as a solid-state image sensor.
Even when configuring an image reading device that processes image signals with multiple gradations such as 28 gradations, it is possible to realize an image reading device that does not produce vertical striped patterns due to the difference in output levels between odd-numbered pixels and even-numbered pixels. can.

[Brief explanation of drawings]

Fig. 1 is a block wiring diagram of an image reading device according to an embodiment of the present invention, Fig. 2 is a detailed block wiring diagram of the output level adjustment section, Fig. 3 is a timing chart of the main parts, and Fig. 4 is the output level A block wiring diagram of the second embodiment of the adjustment section, and FIG. 5 is a block wiring diagram of a conventional image reading device. 4... Solid-state image sensor, 6... A/D converter,
7... Pulse generation circuit, 9... Output level adjustment section,
11, 12...additional averaging circuit, 15...difference circuit,
18...Selector circuit, 20...Adder, 34,
35...Dip switch. Name of agent: Patent attorney Toshio Nakao Haka 1st person
5 Illustration procedure amendment 26th day of Showa b.

Claims (3)

[Claims] (1) an A/D converter that converts the output image signal of the solid-state image sensor into a digital signal; and an output level adjustment unit that corrects the output level of the output image signal of the solid-state image sensor after A/D conversion; , an image reading device comprising a pulse generation circuit that supplies timing pulses to the A/D converter and the output level adjustment section. (2) The output level adjustment unit includes an output level comparison unit that calculates the difference between the output levels of odd-numbered pixels and even-numbered pixels of the solid-state image sensor, and determines a correction amount from the comparison result of the output level comparison unit, and applies a correction signal to the image. The image reading device according to claim 1, further comprising output level correction means for calculating the signal. (3) The image reading device according to claim 1, wherein the output level adjustment section includes means for calculating an average of image signals of a plurality of pixels.