JPS62121651U - - Google Patents
Info
- Publication number
- JPS62121651U JPS62121651U JP732586U JP732586U JPS62121651U JP S62121651 U JPS62121651 U JP S62121651U JP 732586 U JP732586 U JP 732586U JP 732586 U JP732586 U JP 732586U JP S62121651 U JPS62121651 U JP S62121651U
- Authority
- JP
- Japan
- Prior art keywords
- internal memory
- status
- computer system
- input signals
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Techniques For Improving Reliability Of Storages (AREA)
- Debugging And Monitoring (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP732586U JPS62121651U (es) | 1986-01-21 | 1986-01-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP732586U JPS62121651U (es) | 1986-01-21 | 1986-01-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62121651U true JPS62121651U (es) | 1987-08-01 |
Family
ID=30790670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP732586U Pending JPS62121651U (es) | 1986-01-21 | 1986-01-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62121651U (es) |
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1986
- 1986-01-21 JP JP732586U patent/JPS62121651U/ja active Pending