JPS62120734A - Echo erasing equipment - Google Patents

Echo erasing equipment

Info

Publication number
JPS62120734A
JPS62120734A JP25982585A JP25982585A JPS62120734A JP S62120734 A JPS62120734 A JP S62120734A JP 25982585 A JP25982585 A JP 25982585A JP 25982585 A JP25982585 A JP 25982585A JP S62120734 A JPS62120734 A JP S62120734A
Authority
JP
Japan
Prior art keywords
echo
gain
echo path
circuit
microphone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25982585A
Other languages
Japanese (ja)
Inventor
Nobuo Koizumi
小泉 宣夫
Hiroshi Oikawa
弘 及川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP25982585A priority Critical patent/JPS62120734A/en
Publication of JPS62120734A publication Critical patent/JPS62120734A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve the erasing performance and the talking quality by providing a storage circuit storing a transfer function of plural echo paths and a means combining pseudo echo paths in interlocking with a gain of each microphone. CONSTITUTION:A training signal source 5 is operated at first prior to the start of talking, a gain alpha1 of a gain adjusting circuit 101 is set to '1', gains alpha2-alphan of gain adjusting circuits 102-10n are set to '0', an estimate circuit 6 obtains an estimated sample string of an impulse response of the echo path from a speaker 2 to a microphone 91 and the result is stored in a storage circuit 121. The gain alphaj of a gain adjusting circuit 10j varies in response to a level of an object signal Vj(t) entering each microphone 9j after the start of talking. The gain of the gain adjusting circuit 10j is interlocked equally with the gain of a gain circuit 13j. Thus, in giving an output of an adder 14 as a coefficient of an FIR filter of a pseudo echo path (FIR filter) 7, the pseudo echo path (FIR filter) 7 following momentarily the change in the gains alpha1-alphan of he microphone is obtained.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、主として会議用拡声通話装置において、ハ
ウリングの原因及び聴覚上の障害となる反響を消去する
反響消去装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an echo canceling device that eliminates echoes that cause howling and impair hearing, mainly in conference loudspeaker systems.

(従来の技術) 音声会議の普及忙伴ない同時通話性が確保され、反響感
の少ない拡声通話装置の提供が望まれている。この要求
を満たすものとして反響消去装置がある。
(Prior Art) With the spread of voice conferences, it is desired to provide a loudspeaker telephone device that can ensure simultaneous conversation without busy schedules and has less reverberation. There is an echo canceling device that satisfies this requirement.

第2図は従来の反響消去装置の一例を示すブロック図で
、受話信号事)を受ける受話人力端1からスピーカ2に
至る受話系と、マイクロホン3から送話出力端4に至る
送話系からなる通話系において、通話開始前にトレーニ
ング信号源5により受話系にトレーニング信号!’(t
)を送出し、スピーカ2より反響路を経てマイクロホン
3に入力される反響信号y(t)を推定回路6に送るこ
とによって反響路のイン・ぞルスレスポンスh(t)を
推定し擬似反響路(FIRフィルタ)7を生成する。通
話開始後、受話人力端1に印加される受話信号x(t)
は反響路を経てマイクロホン3Kまわり込み、反響信号
)’(t)となり、反響路に加わる目的信号v(t)が
加算された送話信号Z(t)が生成される。一方、受話
信号”(t)を入力として受話系から擬似反響路(FI
Rフィルタ)7を経由して得られる擬似反響信号7(t
)を送話信号z(t)から引算器8によって差し引くこ
とにより反響信号y(t)は消去され、目的信号v(t
)だけが送話出力端4に送出される。擬似反響路(FI
Rフィルタ)7は反響路の経時変化に追従する必要があ
り、インi4ルスレスポンスは目的信号v(t)が加わ
らないときの推定誤差信号z(t) = y(t) −
”(t)により推定回路6によって逐次推定され、擬似
反響路(FIRフィルタ)7の修正が行われることによ
って常に最適な反響消去が維持される。なお、推定回路
6、擬似反響路(FIRフィルタ)7及び引算器8はデ
ィジタル信号処理が用いられるため、図には示さないが
適当ない及びD/A変換器が必要である。推定回路6で
推定される伝達関数はインi9ルスレスポンスのサンプ
ル値列h(it)(i”1 p 2・・・、τ:サンプ
ル時間)であり、擬似反響路(FIRフィルタ)7はイ
ンノ?ルスレスポンスの有a 個+7) ?ンプル値列
SC17)(i=1 g・・・N、N:フィルタ長)を
係数としたFIRフィルタによるたたみ込み演算器によ
り構成される。また図中h(t)は真のインノ4ルスレ
スポンスを示す。
FIG. 2 is a block diagram showing an example of a conventional echo canceling device, which includes a receiving system from the receiving terminal 1 that receives the receiving signal (receiving signal) to the speaker 2, and a transmitting system extending from the microphone 3 to the transmitting output terminal 4. In the communication system, the training signal source 5 sends a training signal to the receiving system before the start of the call! '(t
), and the echo signal y(t) which is input from the speaker 2 to the microphone 3 via the echo path is sent to the estimation circuit 6 to estimate the in-resonance response h(t) of the echo path and create a pseudo echo path. (FIR filter) 7 is generated. After the call starts, the receiving signal x(t) is applied to the receiving end 1
passes around the microphone 3K via the echo path and becomes the echo signal )'(t), and a transmission signal Z(t) is generated to which the target signal v(t) added to the echo path is added. On the other hand, when the reception signal "(t) is input, the pseudo echo path (FI) is
A pseudo echo signal 7 (t
) from the transmitted signal z(t) by the subtractor 8, the echo signal y(t) is canceled and the target signal v(t
) is sent to the transmitter output terminal 4. False echo path (FI
R filter) 7 needs to follow the change in the echo path over time, and the in i4 pulse response is the estimated error signal z(t) = y(t) − when the target signal v(t) is not added.
” (t) is successively estimated by the estimation circuit 6, and by correcting the pseudo echo path (FIR filter) 7, optimal echo cancellation is always maintained. ) 7 and the subtractor 8 use digital signal processing, and therefore require an appropriate D/A converter (not shown in the figure).The transfer function estimated by the estimation circuit 6 is based on the impulse response of The sample value sequence h(it) (i''1 p2..., τ: sample time), and the pseudo echo path (FIR filter) 7 is inno? Are there a number of response responses +7)? It is composed of a convolution calculator using an FIR filter using a sample value sequence SC17) (i=1 g...N, N: filter length) as a coefficient. Further, h(t) in the figure indicates a true inno-fourth response.

(発明が解決しようとする問題点) しかしながら、会議通話装置では送話者の人数に応じて
複数個のマイクロホンを用いる必要があるが、従来の反
響消去装置では、第2図に示すようにN個のマイクロホ
ン3,3.、・・・、3nの出力をそのまま加算したよ
うな形でしか用いることができない。ところで複数個の
マイクロホンを用いる利点は会議に臨席する送話者とマ
イクロホンの距離を短かくと2て音量を確保することと
残響による品質劣化を抑えることであるが、常時すべて
のマイクロホンが動作状態であるとSAの低下や音波の
干渉によってかえって品質は劣化する。
(Problem to be solved by the invention) However, in a conference call device, it is necessary to use multiple microphones depending on the number of speakers, but in a conventional echo canceling device, as shown in FIG. microphones 3, 3. , . . . , 3n outputs can only be used as they are added together. By the way, the advantage of using multiple microphones is that they shorten the distance between the microphones and the speaker present in the meeting, thereby securing the volume and suppressing quality deterioration due to reverberation, but all the microphones are in operation at all times. In this case, the quality deteriorates due to a decrease in SA and interference of sound waves.

したがって、マイクロホンのそれぞれの出力にゲイン調
整回路を持たせ、全体の出力レベルは1本のマイクロホ
ンと等価になるようにしておいて、それぞれのマイクロ
ホンの送話レベルに応じて、それぞれのマイクロホンの
ゲインを調整し、送話人力のないマイクロホンの感度は
下げておくような設計が望まれる。しかし、このような
設計を従来の反響消去装置に適用すると、ゲイン調整回
路の変化は反響路の変動としてとらえられ、適応動作に
よる修正を待つこととなり頻繁なゲイン調整にはうまく
追従できないという問題点があった。
Therefore, each output of the microphone is provided with a gain adjustment circuit so that the overall output level is equivalent to one microphone, and the gain of each microphone is adjusted according to the transmission level of each microphone. It is desirable to have a design that adjusts the sensitivity of microphones that do not have the power of the transmitter and lowers the sensitivity of the microphone. However, when such a design is applied to a conventional echo canceler, changes in the gain adjustment circuit are treated as fluctuations in the echo path, and correction by adaptive operation is required, making it difficult to follow frequent gain adjustments. was there.

したがって、この発明の目的は複数個のマイクロホンが
使用される反響消去装置において、それぞれのマイクロ
ホンのゲイン調整による反響路の変化に対して適応動作
によらなければ擬似反響路が修正できなかった点を解決
し、瞬時にゲイン調整に対応し、反響消去装置が正常に
動作する装置を提供することである。
Therefore, an object of the present invention is to solve the problem that, in an echo canceling device in which a plurality of microphones are used, the pseudo echo path cannot be corrected without adaptive operation in response to changes in the echo path caused by gain adjustment of each microphone. It is an object of the present invention to provide a device that can instantly respond to gain adjustment and allow an echo canceling device to operate normally.

(問題点を解決するための手段) この発明は、複数個のマイクロホンのそれぞれについて
反響路の伝達関数を記憶する記憶回路を具備し、それぞ
れのマイクロホンの出力に付加されたゲイン調整回路の
ゲインに応じて記憶回路の出力のゲインを変化させて擬
似反響路を合成する手段を有し、それぞれの記憶回路の
伝達関数は反響路の変動に応じて適応修正されるように
したものである。
(Means for Solving the Problems) The present invention includes a storage circuit that stores a transfer function of an echo path for each of a plurality of microphones, and adjusts the gain of a gain adjustment circuit added to the output of each microphone. The apparatus has means for synthesizing a pseudo echo path by changing the gain of the output of the storage circuit accordingly, and the transfer function of each storage circuit is adapted to be adaptively corrected according to fluctuations in the echo path.

(作用) この発明は上記のように、複数個の反響路の伝達関数の
記憶回路を設けたので、ゲイン調整回路のゲインの変化
は反響路の変動と区別して瞬時に対応でき、したがって
反響消去装置の消去性能が向上し、そのため通話品質が
改善される。したがって前記問題点を除去できる。
(Function) As described above, this invention is provided with a memory circuit for the transfer functions of a plurality of echo paths, so that changes in the gain of the gain adjustment circuit can be instantaneously dealt with, distinguishing them from fluctuations in the echo path, thus eliminating echoes. The erasure performance of the device is improved, thereby improving call quality. Therefore, the above-mentioned problem can be eliminated.

(実施例) 第1図は本発明の一実施例を示すブロック図で、1は受
話人力端、2はスピーカ、4は送話出力端、5はトレー
ニング信号源、6は推定回路、7は擬似反響路、8は引
算器で従来通りである。9□〜9nはn個のマイクロホ
ン、1−01〜10nは前記複数マイクロホン9□〜9
nの各々の後段に接続されるゲイン調整回路、11はこ
れらゲインの加算器、121〜12nはそれぞれ反響路
の伝達関数を記憶する記憶回路、131〜13nは前記
ゲイン調整回路91〜9nと連動するゲイン回路、14
はこれらゲインの加算器を示す。
(Embodiment) FIG. 1 is a block diagram showing an embodiment of the present invention, in which 1 is a receiver terminal, 2 is a speaker, 4 is a transmitter output terminal, 5 is a training signal source, 6 is an estimation circuit, and 7 is a The pseudo-echo path 8 is a subtracter as before. 9□ to 9n are n microphones, 1-01 to 10n are the plurality of microphones 9□ to 9
11 is an adder for these gains, 121 to 12n are storage circuits for storing the transfer functions of the echo paths, and 131 to 13n are interlocked with the gain adjustment circuits 91 to 9n. gain circuit, 14
indicates an adder for these gains.

次に、その動作について説明す曇。Next, clouds will explain how it works.

先ず通話開始前にトレーニング徊号源5を作動させ、ゲ
イン調整回路10□のゲインα、を1に、ゲイン廟整回
路10□〜10nのゲインα2〜α。
First, before starting a call, the training signal source 5 is activated, the gain α of the gain adjustment circuit 10□ is set to 1, and the gains α2 to α of the gain adjustment circuits 10□ to 10n are set to 1.

を0に設定し、推定回路6によりスピーカ2からマイク
ロホン9□までの反響路のインパルスレスポンスの推定
値のサンプル値列h (if)(1m1 e 2 。
is set to 0, and the estimation circuit 6 generates a sample value sequence h (if) (1m1 e 2 ) of the estimated value of the impulse response of the echo path from the speaker 2 to the microphone 9□.

・・・N)を求めて記憶回路12□に記憶する。同様に
ゲイン調整回路101のゲインを1に、他を0に設定し
て、スピーカ2からマイクロホン9iiでの反響路のイ
ンノぐルスレスポンスの推定値h(ir)(i=1.2
.・・・N)を求めて記憶回路121に記憶しj=1,
2・・・nのすべての反響路のインパルスレスポンスの
推定値hjoす(i=1,2.・・・N)をそれぞれの
記憶回路に記憶する。
...N) is determined and stored in the memory circuit 12□. Similarly, the gain of the gain adjustment circuit 101 is set to 1 and the others are set to 0, and the estimated value h(ir) (i=1.2
.. ...N) and stores it in the memory circuit 121, j=1,
Estimated impulse responses of all echo paths 2...n (i=1, 2...N) are stored in respective storage circuits.

通話開始後はそれぞれのマイクロホン9jに入る目的信
号vj(t)のレベルに応じてケ9イン調整回路10j
O1’インαjは変動する。このときゲイン調整回路1
0・のゲインとゲイン回路13jのゲインとコ は等しく連動する。即ち、図には示さないが例えば並列
接続されている。したがって加算器14の出力はΣαj
πj(if)(i=1 、2 、・・・N)となり、こ
れをm1 擬似反響路(FIRフィルタ)7のFIRフィルタの係
数として与えることにより、マイクロホンのゲインα、
〜α0の変化に瞬時に追従する擬似反響路(FIRフィ
ルタ)7が生成される。
After the call starts, the input adjustment circuit 10j is adjusted according to the level of the target signal vj(t) input to each microphone 9j.
O1'in αj varies. At this time, gain adjustment circuit 1
The gain of 0.0 and the gain of the gain circuit 13j are equally linked. That is, although not shown in the figure, they are connected in parallel, for example. Therefore, the output of the adder 14 is Σαj
πj(if) (i=1, 2,...N), and by giving this as the coefficient of the FIR filter of the m1 pseudo echo path (FIR filter) 7, the microphone gain α,
A pseudo echo path (FIR filter) 7 that instantaneously follows changes in ~α0 is generated.

また、通話開始後の反響路の変動については、推定回路
6によって検知され記憶回路12j(j=1.・・・n
)に記憶される推定値hj(if)は逐次修正される。
Furthermore, fluctuations in the echo path after the start of the call are detected by the estimation circuit 6 and stored in the memory circuit 12j (j=1...n
) is successively corrected.

この反響路の変動の検知は、すべてのマイクロホン9 
j(J = 1 p・・・n)に目的信号vj(t)が
加わらないときに反響信号を用いて行われるが、この場
合、マイクロホンは何れか1つ(9j)のゲインが大き
く、他のゲインはOになるように状態を保つことによっ
て推定値hj(iつを修正し、記憶回路12jの内容を
書きかえる。すべての目的信号vj(t)が中断した場
合は、それまで最もレベルの高い目的信号を受けていた
マイクロホン9jのゲインを、新たに他のマイクロホン
が目的信号を受けるまで維持することによりマイクロホ
ンの動作の頻度に応じて個々の反響路の修正を行う。
Detection of this echo path variation is possible with all microphones 9.
This is done using a reverberation signal when the target signal vj(t) is not added to j (J = 1 p...n), but in this case, one of the microphones (9j) has a large gain, and the others The estimated value hj (i) is corrected by maintaining the state so that the gain of By maintaining the gain of the microphone 9j that has been receiving a high target signal until another microphone receives a new target signal, each echo path is corrected according to the frequency of microphone operation.

したがって、従来技術に比べ最適な反響信号の消去特性
を維持することができる。
Therefore, it is possible to maintain optimal echo signal cancellation characteristics compared to the prior art.

(発明の効果) 以上詳細に説明したように、複薮個めマイクロホンが使
用される反響消去装置において、複数個の反響路の伝達
関数を記憶する記憶回路と、それぞれのマイクロホンの
ゲインと連動して擬似反響路を合成する手段を設けたの
で反響消去装置の消去性能が向上し、拡声通話装置にお
ける通話品質が改善される効果がある。そのため複数個
のマイクロホンが使用される音声会議通話に利用して、
その効果は十分に発揮される。
(Effects of the Invention) As explained in detail above, in an echo canceling device using multiple individual microphones, a memory circuit that stores transfer functions of multiple echo paths and a gain of each microphone are used. Since a means for synthesizing a pseudo echo path is provided, the cancellation performance of the echo cancellation device is improved, and the speech quality in the loudspeaker communication device is improved. Therefore, it can be used for audio conference calls where multiple microphones are used.
Its effects are fully demonstrated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すブロック図、第2図は
反響路が音場である場合の従来の反響消去装置を示すブ
ロック図である。 1・・・受話人力端、2・・・スピーカ、3・拳・マイ
クロホン、4・・・送話出力端、5・・・トレーニング
信号源、6・・・推定回路、2・・・擬似反響路(FI
Rフィルタ)、8・・・引算器、9□〜9n・・・マイ
クロホン、10□〜10n・・・ゲイン調整回路、11
°°°加算器、121〜12n・・・記憶回路、13□
〜13n・・・ゲイン回路、14・・・加算器。
FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional echo canceling device when the echo path is a sound field. 1... Receiving human power end, 2... Speaker, 3... Fist/microphone, 4... Sending output end, 5... Training signal source, 6... Estimating circuit, 2... Pseudo echo Road (FI
R filter), 8...Subtractor, 9□~9n...Microphone, 10□~10n...Gain adjustment circuit, 11
°°°Adder, 121~12n...Memory circuit, 13□
~13n...gain circuit, 14...adder.

Claims (1)

【特許請求の範囲】 反響路への送出信号と前記送出信号の反響路を経由した
後の反響信号から、反響路の伝達特性を推定して擬似反
響路を生成し、前記送出信号を前記擬似反響路の入力と
することにより得られる推定反響信号を生成し、前記反
響信号から前記推定反響信号を差し引くことにより、前
記反響信号を消去し、反響路に加わる目的信号を抽出す
るようにした受話系と送話系からなる通話系の反響消去
装置において、 複数マイクロホンの使用により前記反響路が複数個ある
場合において、複数個の前記反響路について各々の伝達
関数を記憶する記憶回路を具備し、前記複数マイクロホ
ンの各々の後段に接続されるゲイン調整回路のゲインに
応じて各々の前記伝達関数から擬似反響路を合成する手
段を有し、前記伝達関数はマイクロホンの各々に対応す
る反響路の変動によって記憶回路の内容を逐次書きかえ
ることを特徴とする反響消去装置。
[Scope of Claims] A pseudo echo path is generated by estimating the transfer characteristics of the echo path from the transmitted signal to the echo path and the echo signal after the transmitted signal passes through the echo path, and the transmitted signal is converted into the pseudo echo path. The receiver generates an estimated echo signal obtained by inputting the echo path, and subtracts the estimated echo signal from the echo signal to eliminate the echo signal and extract a target signal added to the echo path. An echo canceling device for a communication system consisting of a transmission system and a transmission system, in the case where there are a plurality of echo paths due to the use of a plurality of microphones, the apparatus comprises a storage circuit for storing transfer functions for each of the plurality of echo paths, means for synthesizing a pseudo echo path from each of the transfer functions according to the gain of a gain adjustment circuit connected to a subsequent stage of each of the plurality of microphones, and the transfer function is configured to adjust the variation of the echo path corresponding to each of the microphones. An echo canceling device characterized by sequentially rewriting the contents of a memory circuit.
JP25982585A 1985-11-21 1985-11-21 Echo erasing equipment Pending JPS62120734A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25982585A JPS62120734A (en) 1985-11-21 1985-11-21 Echo erasing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25982585A JPS62120734A (en) 1985-11-21 1985-11-21 Echo erasing equipment

Publications (1)

Publication Number Publication Date
JPS62120734A true JPS62120734A (en) 1987-06-02

Family

ID=17339515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25982585A Pending JPS62120734A (en) 1985-11-21 1985-11-21 Echo erasing equipment

Country Status (1)

Country Link
JP (1) JPS62120734A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01215130A (en) * 1988-02-23 1989-08-29 Toshiba Corp Echo canceller circuit
JPH0669758A (en) * 1991-11-22 1994-03-11 American Teleph & Telegr Co <Att> Filter structure
US6317501B1 (en) * 1997-06-26 2001-11-13 Fujitsu Limited Microphone array apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01215130A (en) * 1988-02-23 1989-08-29 Toshiba Corp Echo canceller circuit
JPH0669758A (en) * 1991-11-22 1994-03-11 American Teleph & Telegr Co <Att> Filter structure
US6317501B1 (en) * 1997-06-26 2001-11-13 Fujitsu Limited Microphone array apparatus
US6760450B2 (en) 1997-06-26 2004-07-06 Fujitsu Limited Microphone array apparatus
US6795558B2 (en) 1997-06-26 2004-09-21 Fujitsu Limited Microphone array apparatus
US7035416B2 (en) 1997-06-26 2006-04-25 Fujitsu Limited Microphone array apparatus

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