JPS62120470U - - Google Patents

Info

Publication number
JPS62120470U
JPS62120470U JP674286U JP674286U JPS62120470U JP S62120470 U JPS62120470 U JP S62120470U JP 674286 U JP674286 U JP 674286U JP 674286 U JP674286 U JP 674286U JP S62120470 U JPS62120470 U JP S62120470U
Authority
JP
Japan
Prior art keywords
circuit
low
signal
pass filter
audio signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP674286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP674286U priority Critical patent/JPS62120470U/ja
Publication of JPS62120470U publication Critical patent/JPS62120470U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Television Signal Processing For Recording (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係る音声信号再生回路のブロ
ツク図、第2図乃至第4図は夫々フイルター回路
の各種構成例を示すブロツク図、第5図はフイル
ター回路の周波数特性を示すグラフ、第6図はテ
ープ速度判別回路のブロツク図、第7図は従来回
路のブロツク図である。 1…磁気ヘツド、50…フイルター回路、7…
テープ速度判別回路、51,52,53,54…
ローパスフイルター。
FIG. 1 is a block diagram of an audio signal reproducing circuit according to the present invention, FIGS. 2 to 4 are block diagrams showing various configuration examples of filter circuits, and FIG. 5 is a graph showing frequency characteristics of the filter circuit. FIG. 6 is a block diagram of a tape speed discrimination circuit, and FIG. 7 is a block diagram of a conventional circuit. 1...Magnetic head, 50...Filter circuit, 7...
Tape speed discrimination circuit, 51, 52, 53, 54...
low pass filter.

Claims (1)

【実用新案登録請求の範囲】 磁気ヘツド1によつて再生されたFM音声信
号を復調する復調器3と、該復調器からの出力信
号に対し雑音除去を施す信号処理回路5とを具え
た音声信号再生回路に於いて、前記信号処理回路
5は、音声信号帯域外での減衰特性の急峻度の切
り替えが可能なフイルター回路50と、磁気テー
プの走行速度の切替わりを検出してテープ速度判
別信号aを作成するテープ速度判別回路7とを具
え、前記フイルター回路50は、テープ速度判別
信号aに基づいて前記特性が切り替えられ、より
低いテープ速度に対して、より急峻なる減衰特性
に設定されることを特徴とする音声信号再生回路
。 フイルター回路50は、第1ローパスフイル
ター51と第2ローパスフイルター52を直列に
接続すると共に、第1ローパスフイルター51の
出力信号と、第2ローパスフイルター52の出力
信号を選択的に通過せしめるスイツチ9を装備し
て構成されている実用新案登録請求の範囲第1項
に記載の音声信号再生回路。 フイルター回路50は、音声信号帯域外での
減衰特性の急峻度が小なる第1ローパスフイルタ
ー53と、該減衰特性の急峻度が大なる第2ロー
パスフイルター54とを並列に接続すると共に、
両ローパスフイルター53,54の前後に一対の
連動スイツチ90,91を介装して構成されてい
る実用新案登録請求の範囲第1項に記載の音声信
号再生回路。
[Claims for Utility Model Registration] Audio comprising a demodulator 3 that demodulates an FM audio signal reproduced by a magnetic head 1, and a signal processing circuit 5 that performs noise removal on the output signal from the demodulator. In the signal reproduction circuit, the signal processing circuit 5 includes a filter circuit 50 capable of switching the steepness of the attenuation characteristic outside the audio signal band, and a filter circuit 50 that detects switching of the running speed of the magnetic tape to determine the tape speed. and a tape speed discrimination circuit 7 for creating a signal a, and the filter circuit 50 has the characteristics switched based on the tape speed discrimination signal a, and is set to a steeper attenuation characteristic for lower tape speeds. An audio signal reproducing circuit characterized by: The filter circuit 50 connects a first low-pass filter 51 and a second low-pass filter 52 in series, and also includes a switch 9 that selectively passes the output signal of the first low-pass filter 51 and the output signal of the second low-pass filter 52. An audio signal reproducing circuit according to claim 1 of the utility model registration claim, which is equipped with: The filter circuit 50 connects in parallel a first low-pass filter 53 whose attenuation characteristic has a small steepness outside the audio signal band, and a second low-pass filter 54 whose attenuation characteristic has a large steepness.
The audio signal reproducing circuit according to claim 1, which is a registered utility model, is constructed by interposing a pair of interlocking switches 90, 91 before and after both low-pass filters 53, 54.
JP674286U 1986-01-20 1986-01-20 Pending JPS62120470U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP674286U JPS62120470U (en) 1986-01-20 1986-01-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP674286U JPS62120470U (en) 1986-01-20 1986-01-20

Publications (1)

Publication Number Publication Date
JPS62120470U true JPS62120470U (en) 1987-07-30

Family

ID=30789541

Family Applications (1)

Application Number Title Priority Date Filing Date
JP674286U Pending JPS62120470U (en) 1986-01-20 1986-01-20

Country Status (1)

Country Link
JP (1) JPS62120470U (en)

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