JPS62120051A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS62120051A JPS62120051A JP26055785A JP26055785A JPS62120051A JP S62120051 A JPS62120051 A JP S62120051A JP 26055785 A JP26055785 A JP 26055785A JP 26055785 A JP26055785 A JP 26055785A JP S62120051 A JPS62120051 A JP S62120051A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon
- silicon substrate
- substrate
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
Description
本発明は、素子間の分離のための厚い酸化珪素膜を窒化
珪素膜をマスクとして形成する半導体装置の製造方法に
関する。The present invention relates to a method for manufacturing a semiconductor device in which a thick silicon oxide film for isolation between elements is formed using a silicon nitride film as a mask.
従来、素子間の分離のためにシリコン基板上に選択的に
酸化珪素膜を生成させるためには、前記シリコン基板上
に設けた窒化珪素膜の窓開は部を通し、シリコン基板表
面を選択的に酸化して酸化珪素膜を生成した後、前記窒
化珪素膜を除去する方法が管通であった。ところがこの
様な酸化珪素膜の生成方法では、生成した酸化珪素膜表
面が、もとのシリコン基板表面よりかなり盛り上がって
生成されるため、酸化されていないシリコン基板表面と
酸化珪素膜表面に段差が生ずる。すなわち、この方法は
まず第2図(alに示すように、シリコン基板lの表面
に5isNa膜2を設けて、酸化膜を生成すべき部分5
を窓開けする0次に露出面を選択的に酸化してSin、
膜3を成長させると、シリコン基板1とSi3Ng膜2
との間に5tot膜3が入り込んで、第2図(blの様
にSt(hM13が成長する。このあとS+Ja膜2を
除去すると、第2図(c)に示すように5iO1膜2の
表面と、シリコン基板1の表面とにかなりの段差が生ず
る0例えば、SiJ膜3を1−生成した場合は、基板1
より約0.6μ盛り上がり、深さ方向へは約0.4 p
m成長する。このため、基板1の表面とStow膜3表
面とに約0.6−の段差dが生じる。このような大きな
段差が生ずると、シリコン基板上に形成されたMなどの
金属配線の段切れが発生するという欠点があった。また
基板表面を被覆するPSG膜をリフローして平坦化をす
ることも行われるが、この際PSG中のりんにょろり配
線の侵蝕が起こる欠点があった。
このような段差を防ぐ方法として、例えば電子通信学会
昭和54年発行、開会[rLS[技術」125および1
26ページに記載されているように窒化膜をパターン形
成したあと、シリコン基板をエツチングしてから酸化す
る方法がある。しかし、この場合エツチングによりシリ
コン基板が損傷を受け、半導体素子の特性を害すること
がわかった。Conventionally, in order to selectively generate a silicon oxide film on a silicon substrate for isolation between elements, a window opening in a silicon nitride film provided on the silicon substrate is selectively formed on the surface of the silicon substrate. The method of removing the silicon nitride film after forming a silicon oxide film by oxidizing the silicon nitride film was through a tube. However, in this method of producing a silicon oxide film, the surface of the silicon oxide film produced is considerably raised from the original silicon substrate surface, so there is a step difference between the unoxidized silicon substrate surface and the silicon oxide film surface. arise. That is, in this method, as shown in FIG.
By opening a window and selectively oxidizing the exposed surface of the
When the film 3 is grown, the silicon substrate 1 and the Si3Ng film 2 are grown.
The 5tot film 3 enters between the For example, when the SiJ film 3 is formed 1-, a considerable step difference occurs between the surface of the silicon substrate 1 and
It rises by about 0.6 μ and increases by about 0.4 p in the depth direction.
m grow. Therefore, a step difference d of about 0.6- is generated between the surface of the substrate 1 and the surface of the Stow film 3. When such a large step difference occurs, there is a drawback that a step break occurs in the metal wiring such as M formed on the silicon substrate. In addition, the PSG film covering the surface of the substrate is also reflowed to planarize it, but this has the disadvantage that the loose wiring in the PSG is eroded. As a method to prevent such level differences, for example, the Institute of Electronics and Communication Engineers, published in 1978, Opening [rLS [Technology] 125 and 1
As described on page 26, there is a method in which a nitride film is patterned, the silicon substrate is etched, and then the silicon substrate is oxidized. However, it has been found that in this case, etching damages the silicon substrate and impairs the characteristics of the semiconductor device.
【発明の目的]
本発明は、上述の問題を解決してシリコン基板に損傷を
与えることなくシリコン基板上に生成した酸化珪素膜表
面と、酸化されないシリコン基板表面との段差を減少さ
せ、シリコン基板表面の平坦性を向上させることを目的
とする。
【発明の要点】
本発明は、シリコン基板上に窒化珪素膜を形成後その窓
開は部を通して酸化し、生成された酸化珪素膜を除去し
、生じたくぼみの面を再度酸化するもので、酸化珪素膜
の生成はシリコン基板に与える損傷が少なく、酸化珪素
膜がくぼみに生成されることにより酸化膜表面と基板表
面との段差が少なくなって上記の目的が達成される。Purpose of the Invention The present invention solves the above-mentioned problems and reduces the level difference between the surface of a silicon oxide film formed on a silicon substrate and the surface of an unoxidized silicon substrate without damaging the silicon substrate. The purpose is to improve surface flatness. Summary of the Invention In the present invention, after a silicon nitride film is formed on a silicon substrate, the window opening is oxidized through the portion, the generated silicon oxide film is removed, and the surface of the recess is oxidized again. The formation of the silicon oxide film causes less damage to the silicon substrate, and the formation of the silicon oxide film in the recesses reduces the level difference between the oxide film surface and the substrate surface, thereby achieving the above object.
第1図+a+〜(C1は本発明の一実施例を示し、第1
図181はシリコン基板1の表面上に5isN4膜2を
設け、Sho、膜3を生成すべき部分5を窓開けする。
次に露出面を選択的に酸化して、Stow膜3を成長さ
せたのが第1図山)の示す状態である。ここまでは前記
の従来方法と同一である。第1図181は、Sing膜
3の除去を行いシリコン基板1の表面に凹部6を形成し
た状態を示す0次いで第1図181に示すように、再度
前記のSt、Na膜2をマスクとして用いての選択的酸
化により、5iOtll! 4を凹部6を埋める様に成
長させる。その後、マスクとして用いた5lsNa膜2
を除去した状態を第1図181に示す0以上の様に、従
来方法で生成したSiO!膜を除去し、再度選択的に酸
化することにより、シリコン基板lの表面との段差の少
ない素子分離用の深いS10゜膜4を生成することがで
きる。Figure 1+a+~(C1 shows one embodiment of the present invention;
In FIG. 181, a 5isN4 film 2 is provided on the surface of a silicon substrate 1, and a window is opened in a portion 5 where a film 3 is to be formed. Next, the exposed surface was selectively oxidized to grow the Stow film 3, as shown in Fig. 1 (see Fig. 1). The process up to this point is the same as the conventional method described above. 181 shows a state in which the Sing film 3 has been removed and a recess 6 has been formed on the surface of the silicon substrate 1. Then, as shown in FIG. 1 181, the St, Na film 2 is used again as a mask. By selective oxidation, 5iOtll! 4 is grown to fill the recess 6. After that, the 5lsNa film 2 used as a mask
181 in FIG. 1 shows the state after removing SiO! produced by the conventional method. By removing the film and selectively oxidizing it again, it is possible to produce a deep S10° film 4 for element isolation with few steps from the surface of the silicon substrate 1.
本発明によれば、窒化珪素膜をマスクとしての素子分離
のため酸化珪素膜の生成の前に一旦同じマスクにより生
成した酸化珪素膜を除去してシリコン基板にくぼみを形
成しておくことにより、最終的な酸化珪素膜表面とシリ
コン基板表面との段差も少なくなり平坦性が向上する。
しかもエツチングのようにシリコン基板に損傷を与える
こともないので素子特性が損なわれることがなく、平坦
性の向上により金属配線の段切れがなくなり、PSGの
りフローによるu62線の侵蝕の虞もなくなるので得ら
れる効果は極めて大きい。According to the present invention, before forming a silicon oxide film for element isolation using a silicon nitride film as a mask, the silicon oxide film produced using the same mask is removed to form a depression in the silicon substrate. The level difference between the final silicon oxide film surface and the silicon substrate surface is also reduced, and flatness is improved. Moreover, unlike etching, it does not damage the silicon substrate, so the device characteristics are not impaired, and the improved flatness eliminates the disconnection of metal wiring, and there is no risk of corrosion of the U62 wire due to PSG glue flow. The effects obtained are extremely large.
第1図は本発明の一実施例の手順を順次示す断面図、第
2図は従来の方法の手順を順次示す断面図である。
1:シリコン基板、2 :5iJa膜、3,4:SiO
!?! Si 聞し丁1? 2Si3
Ntll’J、2 6凹や 、2
2 .45+02県2
第1図FIG. 1 is a sectional view sequentially showing the procedure of an embodiment of the present invention, and FIG. 2 is a sectional view sequentially showing the procedure of a conventional method. 1: Silicon substrate, 2: 5iJa film, 3, 4: SiO
! ? ! Si listening 1? 2Si3
Ntll'J, 2 6 concave, 2 2. 45+02 prefecture 2 Figure 1
Claims (1)
スクとして形成する際に、シリコン基板上に窒化珪素膜
を形成後該膜の窓開け部を通して酸化し、生成された酸
化珪素膜を除去し、生じたくぼみの面を再度酸化するこ
とを特徴とする半導体装置の製造方法。1) When forming a thick silicon oxide film for element isolation using a silicon nitride film as a mask, the silicon nitride film is formed on a silicon substrate and then oxidized through the window opening of the film, and the formed silicon oxide film is 1. A method for manufacturing a semiconductor device, which comprises removing the recess and oxidizing the surface of the recess again.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26055785A JPS62120051A (en) | 1985-11-20 | 1985-11-20 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26055785A JPS62120051A (en) | 1985-11-20 | 1985-11-20 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62120051A true JPS62120051A (en) | 1987-06-01 |
Family
ID=17349610
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP26055785A Pending JPS62120051A (en) | 1985-11-20 | 1985-11-20 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62120051A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07169831A (en) * | 1993-12-15 | 1995-07-04 | Nec Corp | Semiconductor device and manufacture thereof |
US5576251A (en) * | 1994-10-06 | 1996-11-19 | Kavlico Corp. | Process for making a semiconductor sensor with a fusion bonded flexible structure |
US5966617A (en) * | 1996-09-20 | 1999-10-12 | Kavlico Corporation | Multiple local oxidation for surface micromachining |
JP2008516443A (en) * | 2004-10-06 | 2008-05-15 | コミツサリア タ レネルジー アトミーク | Method for manufacturing a mixed laminate structure having various insulating regions and / or local vertical conductive regions |
-
1985
- 1985-11-20 JP JP26055785A patent/JPS62120051A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07169831A (en) * | 1993-12-15 | 1995-07-04 | Nec Corp | Semiconductor device and manufacture thereof |
US5576251A (en) * | 1994-10-06 | 1996-11-19 | Kavlico Corp. | Process for making a semiconductor sensor with a fusion bonded flexible structure |
US5966617A (en) * | 1996-09-20 | 1999-10-12 | Kavlico Corporation | Multiple local oxidation for surface micromachining |
JP2008516443A (en) * | 2004-10-06 | 2008-05-15 | コミツサリア タ レネルジー アトミーク | Method for manufacturing a mixed laminate structure having various insulating regions and / or local vertical conductive regions |
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