JPS62109242U - - Google Patents
Info
- Publication number
- JPS62109242U JPS62109242U JP20001185U JP20001185U JPS62109242U JP S62109242 U JPS62109242 U JP S62109242U JP 20001185 U JP20001185 U JP 20001185U JP 20001185 U JP20001185 U JP 20001185U JP S62109242 U JPS62109242 U JP S62109242U
- Authority
- JP
- Japan
- Prior art keywords
- digit
- adder
- circuit
- specific
- carry
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 1
Description
第１図は本考案の一実施例のブロツク図で示し
た回路図、第２図は従来技術をブロツク図で示し
た回路図である。
１Ａ〜３Ａ，１Ｂ〜３Ｂ……入力端子、４，５
……桁上げ回路、６，７……加算器、９，１０，
１１……出力端子、１６，１７，１８……加算器
。
FIG. 1 is a circuit diagram showing an embodiment of the present invention in a block diagram, and FIG. 2 is a circuit diagram showing a conventional technique in a block diagram. 1A~3A, 1B~3B...Input terminal, 4,5
... Carry circuit, 6, 7... Adder, 9, 10,
11...Output terminal, 16, 17, 18...Adder.
Claims (1)
定の桁に対し、その桁より下位の入力で計算され
るその桁専用の桁上げ回路と、特定の桁の加算器
または特定の桁の桁上げ回路の出力を入力とする
数桁の加算器で構成されることを特徴とする加算
回路。 In a multi-bit addition circuit, for one or more specific digits, there is a carry circuit dedicated to that digit that is calculated using inputs lower than that digit, and an adder for a specific digit or a carry circuit for a specific digit. An adder circuit characterized in that it is composed of a multi-digit adder that receives the output of an adder as an input.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20001185U JPS62109242U (en) | 1985-12-25 | 1985-12-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20001185U JPS62109242U (en) | 1985-12-25 | 1985-12-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62109242U true JPS62109242U (en) | 1987-07-11 |
Family
ID=31162168
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20001185U Pending JPS62109242U (en) | 1985-12-25 | 1985-12-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62109242U (en) |
-
1985
- 1985-12-25 JP JP20001185U patent/JPS62109242U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS62109242U (en) | ||
| JPH0235252U (en) | ||
| JPS60164247U (en) | Rounding calculation circuit | |
| JPS6140038U (en) | phase comparator | |
| JPS6174148U (en) | ||
| JPS6350067U (en) | ||
| JPS62116342U (en) | ||
| JPS61197778U (en) | ||
| JPS6425229U (en) | ||
| JPS6266346U (en) | ||
| JPS6152832U (en) | ||
| JPH02138356U (en) | ||
| JPS6223336U (en) | ||
| JPS6178467U (en) | ||
| JPS5859756U (en) | rubber band | |
| JPS5851380U (en) | electronic calendar | |
| JPS63126931U (en) | ||
| JPS6438841U (en) | ||
| JPH0277747U (en) | ||
| JPS5895525U (en) | matrix switch | |
| JPS61146068U (en) | ||
| JPS60164236U (en) | programmable controller | |
| JPS643238U (en) | ||
| JPS63108234U (en) | ||
| JPS6423670U (en) |