JPS62106557A - Control system for disk cache - Google Patents

Abstract

PURPOSE:To attain the cash control optimum to a disk cash system, e.g., the control having the maximum hit factor by storing the corresponding data in a position corresponding to the residence expecting level of the data received an access. CONSTITUTION:When an access request is informed to a disk cache control part 2 from a host 10, a hit/miss retrieving part 3 retrieves a control information holding part 7 to check whether the data having an access request is stored or not in a cache memory 8. In a hit mode the data are read out of the memory 8 and transferred to the host 10. At the same time, the part 7 which controls said data is removed from a link and inserted to the head of a residence expecting level to which said data belongs. While in a miss mode the data read out of a disk device 9 is transferred to the host 10 and also stored in the memory 8. Here the part 7 controlling the data on the end of said expecting level is removed from the link. Then the part 7 is put into the head of the residence expecting level to which the stored data belongs.

Description

[Detailed Description of the Invention] [Summary] The disk cache system 420 system includes a management information holding section, a hit/miss search section, a link updating section, a resident expected level indication pointer, and a link insertion section, Desired data is accessed by searching each management information holding unit connected by .

[Industrial application field] The present invention relates to a disc cassoy device.

A disk cache control method in which multiple expected resident levels are set, and when data is stored in the cache memory, the data is stored in a position (rank) corresponding to the expected resident level of the data. [Problems to be solved by technology and invention] The conventional disk cache control method is based on CRu (least-
Data accessed using a recently-used (recently-used) algorithm was stored in a cache memory.

In this case, the RU algorithm was used.

For example, in the situation shown in Figure 8(a), if there is a series of long data access requests, the data for which the access request was made is stored sequentially at the top (TOP) of the cache memory, so subsequent As shown in Figure 8 (b), the data that
Even if there is a block (data) that you want to remain as shown in the diagram (at, (bl, fcl, and +dl), the most recently accessed block is stored from the beginning, and the current block is stored. There was a problem in that the blocks that you wanted were kicked out.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention controls the system so that when a disk cache device is accessed, the data is stored in a position (rank) corresponding to the expected resident level of the accessed data. Optimum cache control is performed, for example, to maximize the hit rate.

FIG. 1 shows the configuration of one embodiment of the present invention. In the figure.

1 is a disk cache device, 2 is a disk cache control unit, 3 is a hit/miss search unit, 4 is a link update unit,
5 is a link insertion part, 6 is a resident expectation level indication pointer,
Reference numeral 7 represents a management information holding unit, 8 a cache memory, 9 a disk device, and 10 a host.

In FIG. 1, the disk cache device 1 is composed of 9 hosts 10, and when data is stored in the cache memory 8 (during a hint), in response to an access request from 9 hosts 10, the cache memory 8 is On the other hand, if the data is not stored in the cache memory 8 (at the time of a miss), the data read from the disk device 9 is stored in the cache memory 8, and the data is transferred to the host IO. It is intended to be transferred to

The hit/miss search unit 3 searches the management information holding unit 7 to determine whether or not the cache memory 8 stores the data to which the access request has been made.

Of the management information holding units 7 that manage each data (block) stored in the cache memory 8, the link updating unit 4 is a management information holding unit that manages the heated data when a hint is given. 7 from the link, and if a mistake is made, the management information holding unit 7 that manages the data at the end is removed from the link.

The link insertion unit 5 inserts the management information holding unit 7 removed from the link by the link updating unit 4 into the management information holding unit 7.
The resident expected level indication pointer 6 is inserted into the position corresponding to the resident expected level to which the data managed belongs, and the link is updated.

The resident expected level indication pointer 6 is the cache memory 8
This indicates the position (rank) in which the data is to be stored, corresponding to a plurality of expected resident levels to which the data belongs.

The management information holding unit 7 stores information such as the location of data (blocks) stored in the cache memory 8, the location where the data is stored in the disk device 9, forward links and backward links for connecting each management information storage unit, etc. This information is stored.

The disk cache control unit 2 performs various controls such as data transfer between the host 10 and the disk device 9.

[Operation] When the configuration shown in FIG. 1 is adopted and the disk cache control unit 2 is notified of an access request from the host 10, the hit/miss search unit 3 searches the management information holding unit 7 and retrieves the access request. The cache memory 8 is searched to see if the data that was found is stored in the cache memory 8. If the data is hit (if it is stored), the data stored in the cache memory 8 is read out and transferred to the host IO, and the management information holding unit 7 that manages the data is removed from the link, and the data is Insert at the beginning of the resident expectation level to which it belongs. On the other hand, if there is a mistake (if it is not stored), the data read from the disk device 9 is transferred to the host IO.

The data is stored in the cache memory 8. At this time, the management information holding unit 7 that manages the data at the end is removed from the link, and the data is stored in a position managed by this, and the management information holding unit 7 is placed at the beginning of the expected resident level to which this stored data belongs. Insert 7. The link updating unit 4 removes the link, and the link inserting unit 5 inserts the data into the expected resident level to which the data belongs by referring to the expected resident level indication pointer 6.

As explained above, since the level to be stored in the cache memory 8 is selected and controlled in accordance with the expected resident level of the data that has been accessed, the optimal cache control for the system, such as the hint rate, is performed. can be controlled so that it is maximized.

〔Example〕

Embodiments of the present invention will be described in detail with reference to FIGS. 2 to 8.

FIG. 2 shows a detailed illustration of the invention. Figure 2 (a) shows the resident expectation level indication pointer (TOP) (0),
Fig. 2 (b) shows the case where three levels consisting of fil and (2) are provided.
Indicates the case where .

As shown in FIG. 2, according to the present invention, when data is newly stored in the cache memory 8 under the state shown in FIG. 2 (a), as shown in FIG. Resident expected level indication pointer to which the data to be stored belongs (
2), it is possible to preferentially save the data of illustrations (al, (bl), and (C1) that you want to keep.

FIG. 3 shows an explanatory diagram of the operation of the management information holding section 7. As shown in FIG.

In the figure, each management information holding unit 7-i, 7-(i+1).

... 7-4 are linked (connected) by a front link and a rear link. A pointer 5 indicating the position of data stored in the cache memory 8 and a pointer indicating the position of the data stored in the disk device 9 are respectively stored in each management IIIJ information holding unit.

FIG. 4 shows a level explanatory diagram of the management information holding section.

In the diagram, resident expectation level indication pointer (TOP) (0)
, fil, +21...(N) and the bottom pointer (BOTTOM) point to the management information holding unit that manages the data at the beginning of each level. Further, each management information holding section is ordered in a line by forward links and backward links. Therefore, it is possible to easily insert the management information holding unit that manages the data to which the host 10 has requested access at a position corresponding to the expected resident level to which the data belongs.

Here, the number of expected resident levels 0 to N and which type of data belongs to which expected resident level are determined optimally depending on the operating system used by the host. (registered trademark) system: Resident expectation level Q: 1-nod
E area resident expectation level and swap area resident expectation level 2: Define as in other areas. This is because the 1-node area, which is the management information area of the UNIX system disk, tends to be accessed most often, and when used by multiple users, access to the swap eM area increases. Although there is.

For MS-DO5 type (registration unit 41) system: Expected resident level O: FAT, directory block Expected resident level I: Define as in other areas. In the MS-DO5 type system, this is
This is because FAT and directory blocks tend to be accessed the most.

When combined with the block read ahead (brifetch) method: Resident expectation level 0; normal block resident expectation level l: The block read ahead method reads blocks that are expected to be read in the near future into the cache memory 8 in advance. This is the method of keeping it.

There is no problem if the block read ahead hits as expected.

If not, the block is cache memory 8
There is no need for it to be inside (because it is sufficient if it is permanently stationed for a certain short period of time).

Next, the operation of the present invention will be explained in detail using the flowchart shown in FIG.

5 indicates a state in which the host IO requests the disk cache device 1 to access block A in the cache memory 8. In FIG.

■ in the figure indicates a state in which a search is made to see if block A to which an access request has been made exists in the cache memory 8.
If YES, execute ■ in Figure 1. If the answer is No, execute ■ in Figure 2.

■ in the figure indicates the corresponding block A in the cache memory 8
Indicates the state in which `` is removed from the link. This means that the link updating section 4 in FIG. 1 removes the relevant item from the management information holding section 7 from the link.

■ in the figure shows the contents (data) of block A' in the system (
This shows the state of transfer to the host 10).

■ in the figure indicates a state in which the expected resident level is determined. This means that the expected resident level to which block A' belongs is determined.

In the figure, ■ indicates a state in which the block B' pointed to by the end pointer (BOTTOM) is removed from the link.

This means that the block B' pointed to by the end pointer 9 is removed from the link since no hint was given at ■ in Figure 3.

■ in the diagram shows the content to the block by the system (host 10)
This shows a state in which the data corresponding to the missed access request is read from the disk device 9 and transferred to the host (host) 10. Block B pointed to by the end pointer.

will be written to.

In the figure, ■ indicates a state in which block A' (or B') is reinserted into the link. This means that the link is reconfigured by inserting the data at the beginning of the expected resident level to which the access-requested data belongs.

■ in the figure is a resident expectation level indication pointer (T.

P) (0) or N), and the end pointer (BOT
This shows the state in which the value of TOM) is modified. this is.

In the figure, ■ indicates that the correction is to be made due to the insertion.

As described above, by controlling the data to be inserted at the beginning of the expected resident level to which the data to which the access request belongs belongs, it becomes possible to perform cache control in a manner that is optimal for the system. next.

A specific example will be explained using FIG. 6 for a hit and FIG. 7 for a miss.

Firstly, as shown in Figure 6 (a) when human.

When the data requested to be accessed by the host 10 is hinted, the hit data is transferred to the host 10, and the block A' in which the hit data exists is removed from the link.

Second, as shown in Figure 6 (b), this block A''
The resident expected level to which the block belongs is determined (in this case, the resident expected level l), and the block 8 is inserted at the position pointed to by the resident expected level indication pointer (TOP) (11) that points to the determined resident expected level.

Third, modify the value of each pointer after insertion.

As explained above, when a hit occurs, the hit data is transferred to the host 10.

Insert at the beginning of the resident expectation level to which this data belongs.

As shown in FIG. 7 (a) when a mistake occurs, first, the host lO
If the data requested for access is incorrect,
The missed data is read from the disk device 9 and transferred to the host 10.

Block B' pointed to by the end pointer (I30TTOM) is removed from the link. And this block B'
Write the data to.

Second, as shown in FIG. 7(B), the resident expected level to which the data written in this block B belongs is determined (in this case, resident expected level 1), and the resident resident that points to this determined resident expected level is Expected level indication pointer (TO
P) Insert the block B' at the position pointed to by +11.

Third, modify the value of each pointer after insertion.

As explained above, in the event of a miss, the miss data is read from the disk device 9 and transferred to the host IO, and the data is written to the block pointed to by the end pointer. Then, it is inserted at the beginning of the expected resident level to which this written data belongs.

〔Effect of the invention〕

As explained above, according to the present invention, when a disk cache device is accessed, the accessed data is controlled to be stored in a position (rank) corresponding to the expected resident level of the data, so the system Optimal cache control, for example, can be performed to maximize the hit rate.

[Brief explanation of drawings]

Fig. 1 is a configuration diagram of one embodiment of the present invention, Fig. 2 is a detailed explanatory diagram of the present invention, Fig. 3 is an explanatory diagram of the operation of the management information holding unit, and Fig. 4 is a level explanatory diagram of the management information holding unit. , FIG. 5 is an operation flowchart of the present invention. Figure 6 shows a specific example of operation when human (resident expectation level 1),
FIG. 7 shows a specific example of the operation at the time of a mistake (residency expectation level 1), and FIG. 8 shows an explanatory diagram of the operation concept of the conventional disk cache control system. In the figure, 1 is a disk cache device, 2 is a disk cache control unit, and 3 is a hit/miss search unit. 4 is a link update section, 5 is a link insertion section, 6 is a resident expected level indication pointer, and 7 is a management information holding section. 8 represents a cache memory, 9 represents a disk device, and 10 represents a host. Patent Applicant: Alps Electric Co., Ltd. Representative Patent Attorney Hiroshi Mori 1) (3 others) Book
21 (a)
(a) 4-F light operation sequence, explanatory diagram 'g H, to 1 fifi 7+ sound p /) l *
I￥ iX, II [2112°34[i1Mif,
1 house 1 group theory small Δrt i dumb character 1 animal p level turtle day M
[21 4th ward main gate movement 7 (f-t 5z (a) (b) I
C2v k S'F tn 'fin (l”J(h
f9'J α-442MA Y'rRehe/l, I)t!
, 6 Figure (a) (b) Mimata FJ now tn4 rii futaq (L horseshig 8 invitation σ le 1 u Fig. 7

Claims (1)

[Claims] If the data requested for access is stored in the cache memory, the data is transferred from the cache memory to the host, and if the data requested to be accessed is not stored in the cache memory, the data is transferred to the disk device. In a disk cache control method that controls data read from the host to be transferred to the host and also stored in the cache memory, each management information holding unit connected by a link that manages each data stored in the cache memory, A hit/miss search unit that searches each management information holding unit connected by this link to determine whether the data requested for access is stored in the cache memory; If it is determined that the data for which the access request has been requested exists, the management information retaining section that manages this determined data is removed from the link, or if it is determined that the data does not exist, the most A link update unit that removes a management information holding unit that manages data that is not expected to be resident from the link, and a resident expected level that points to a position corresponding to a plurality of resident expected levels when each management information holding unit is linked. a link insertion unit that refers to the expected resident level indication pointer and inserts the management information holding unit into a position corresponding to the expected resident level to which the data managed by the management information holding unit removed by the link updating unit belongs; 1. A disk cache control method characterized by comprising: a configuration in which desired data is accessed by searching respective management information holding units connected by links.