JPS6195500A - Signal transmitter for pulse width output detector - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a temperature or humidity detector used for air conditioning control in a building, etc., and uses temperature as a detection signal.

The present invention relates to a signal transmission device for a pulse width output detector that converts humidity or the like into a pulse width and outputs the converted signal.

Conventional configurations and their problems In recent years, the introduction of computer-based air conditioning control for buildings, etc. has been remarkable, but with the development of control technology, there has been a demand for even more comfortable living spaces. There is. Various signal transmission devices have been developed to transmit signals between detectors and control equipment in order to carefully collect air conditioning information of the target living space and achieve optimal control. A conventional signal transmission device for a pulse width output detector, which is one of the devices, will be described with reference to the drawings.

FIG. 6 is a connection diagram showing a wiring method of a signal transmission device for a conventional pulse width output detector. In Figure 6, 81~Sn
is a plurality of detector groups that detect air conditioning information to be controlled, and each detector and control device are connected by individual transmission lines.

FIG. 6 is a connection diagram showing a signal input device on the control equipment side of the signal transmission device of a conventional pulse width output detector. In FIG. 6, 101 is a group of detectors 81 to Sn. This mono multi-circuit selects and outputs one of a plurality of signal inputs according to the instruction of the address signal 102. 103
is a pulse selection circuit connected to the output section of the mono multi circuit 104, which receives the input from the mono multi circuit 104 and selects and outputs one pulse width signal from the continuous pulse width output of the detector. It is. Reference numeral 104 denotes a clock generation circuit, which always outputs clock pulses of a constant period. 105 is an AND gate which receives the outputs of the pulse selection circuit 103 and the clock generation circuit 104;
The output of the logic product is output to the counter circuit 106, and the counter circuit 106 converts the count number into digital information 1
Output as 07.

The operation of the signal transmission device configured as described above will be described below.

Each of the detectors 81 to Sn converts information such as temperature and humidity into pulse widths and outputs them as continuous pulse width signals. If the signal input device detects the signal,
The output of a desired detector is designated by an address signal 102 and selected by a monomulti circuit 101. Next, one pulse from among the continuous pulse width signals is selected by the pulse selection circuit 103 and ANDed with the output of the clock generation circuit 104.

By counting the number of clocks generated during this one pulse with a counter circuit 106, the pulse width can be converted into digital information 107 and measured.

However, in the above configuration, the electric wires connecting each detector and the control device are not wired independently, and the total length of the electric wires becomes very long. Also,
It is also necessary to install the conduit for each electric wire independently, and the total length of the conduit becomes long.

Further, there is a problem in that the number of man-hours required for installation work increases, and if the number of detectors is increased in order to obtain comfortable control, the cost will increase significantly. moreover.

The number of detectors that can be input to the signal input device is fixed at the time the software is designed, and if it becomes necessary to increase the number of detectors, the number of points can be expanded.
Another problem was that there was no degree of freedom.

Purpose of the Invention The present invention solves the above-mentioned conventional problems, and provides signal transmission for a pulse width output detector that can reduce the number of transmission lines that connect the detector and control equipment, and simplify construction work. It provides equipment.

Structure of the Invention In order to achieve this object, the signal transmission device of the pulse width output detector of the present invention is a pulse width specific force detector that outputs measurement data of temperature and humidity as a pulse width. The pulse width output circuit includes an enable signal generation circuit that generates a full signal, and an input signal measurement circuit that inputs the output signal from the pulse width output detector via a transmission line, digitizes it, and outputs it. After receiving the enable signal of the enable signal generating circuit,
The configuration is such that a predetermined number of equipment numbers are counted by repeating, and a pulse width signal is output. According to the above configuration, serial transmission of pulse width signals can be realized by adding a simple circuit to the conventional circuit, making the wiring connecting the detector and control equipment common, and branching from the main wiring to each detector. The total length of the transmission line can be significantly shortened by connecting it to control equipment.

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a connection diagram showing the connection method of the pulse width output detector in one embodiment of the present invention.
is a detector group as in the conventional example.

Each is connected in parallel.

Also, Figure 4 is a connection diagram of the same pulse width output detector, and the second
In the figure, a comparator circuit that receives the transmission line from the 11/i detector as an input distinguishes an enable signal that has a threshold level sufficiently higher than the signal level emitted from the signal input device, and inverts the output. be.

2 is a flip-flop having a set terminal 2a and a center terminal 2b.The set terminal 2a is connected to the output part of the comparator circuit 1, and the set terminal 2a receives the inverting input 2a of the comparator circuit 1 and outputs it by setting the output 2c. It is something that can be done. Reference numeral 3 designates a clock generation circuit which receives the output 2c of the flip-flop circuit 2 as an input, and receives the input from the flip-flop circuit 2 and generates a predetermined basic time clock to the detector group.

4 is a clock number determination circuit which receives the outputs of the clock generation circuit 3 and the address setting circuit 5 as input, and counts the basic time clock output from the clock generation circuit 3;
The output of the address setting circuit 5 and the count number are determined, and if they match, the reset terminal 2b of the flip-flop circuit 2 and the set terminal 6a of the flip-flop circuit 6
This is what is output to. The clip-flop circuit 6 has a set terminal 6a, a reset terminal 6b, and an output terminal 6c,
The output terminal 6c is for outputting to the input section of the AND gate 9. Further, 7 is a pulse width signal output circuit that converts analog information such as temperature detected by the detection element 8 into pulse width information, and always outputs the pulse width output to the input section of the AND gate 9. The AND gate 9 outputs the AND of the output from the output terminal 6C of the flip-flop circuit 6 and the output from the pulse width signal output circuit 7 to the transmission line common to other detectors via the puffer gate 1Q. It is also output to the reset terminal 6b of the circuit 6. The pulse width output detector 20 is configured as described above. In addition, FIG. 3 is a connection diagram of the same signal input device. In FIG. At the same time, one pulse is selected and outputted to the input section of the AND gate 12.

It is output at the time when the pulse width and signal are input to the enable terminal 13a of the counter circuit 13 and the control device. Reference numeral 14 denotes a clock generation circuit, which outputs a sufficiently short cycle clock to the input section of the AND gate 12. The counter circuit 13 inputs the AND output of the AND gate 12, counts the number of clocks, and converts the pulse width information into digital information 16.
Convert and output. Further, 16 is an enable signal generating circuit that generates an enable signal having a threshold level sufficiently higher than the signal level, and is used to amplify and output the signal 16a from the control device.

Reference numeral 17 denotes a signal switching circuit υ, which switches the connection between the output section of the enable signal generation circuit or the input section to the pulse selection circuit 11 and the transmission line from the pulse width output detector 20. 21 is an input signal measuring circuit. The signal input device is configured as described above.

Pulse width output detector 20 as described above. The operation of a signal transmission device constituted by a signal input device and a common transmission line will be described below. Figure 4 is a timing chart that supplements the explanation of the operation.

First, the signal input device is a pulse width output detector group 81 to Sn.
In order to notify the start of measurement, the signal switching circuit 17 is switched to the enable signal side, the signal 16a from the control device is amplified by the enable signal generating circuit 16, and the pulse signal shown in FIG. 4a is output onto the common transmission line. do. Since the enable signal has a threshold level v1t- which is sufficiently higher than the signal level 2 as shown in FIGS. 4a and CK, it can be reliably distinguished from the pulse width signal. Pulse width output detector group 8
1 to Sn, the enable signal trap causes the comparator circuit 1 to be inverted, the flip-flop circuit 2 to be set, and to start sending out the pulse width signal.

When the output of the clip-flop circuit 2 is set, the clock generating circuit 3 generates the clock shown in FIG. 6 at a period of the basic time T. The basic time T is common to the pulse width output detection groups 31 to SQ, and is set to a period sufficiently longer than the maximum value of the pulse width signal. The clock number determination circuit 4 counts the basic time clock number and compares it with the address number specific to the pulse width output detector set in advance by the address setting circuit 6. If the two match, it is output and the flip-flop circuit 2 is output. The flip-flop circuit 6 is set at the same time as the generation of the basic time clock is stopped by resetting. In each pulse width output detector, information such as temperature and humidity detected by the detection element 8 is sent from the pulse width signal output circuit 7 to the fourth pulse width output detector.
It is converted into pulse width information indicated by PWl and FW in Figure d and output continuously. Here, PWl is a pulse width signal output from the detector with body number 1, and FW2 is a pulse width signal output from the detector with body number 2. The continuous pulse width output signal and the output of the flip-flop 6 are ANDed by an AND gate 9 and sent to a signal input device as a detector signal output. Further, in the clip-flop θ, the reset terminal 6b becomes valid at the falling edge of the pulse width signal and resets the output 6C, so that the 1 pulse width signal shown in FIG. 4C is selected. However, the case where the address of the pulse width output detector is 2 is taken as an example.

Further, after the signal input device issues an enable signal, it switches the signal switching circuit 17 to the pulse selection circuit 11 side and waits for input of a pulse width signal. When a one-pulse width signal from the detector is input, the pulse selection circuit 11 enables the counter circuit 13 at the rising edge of the signal and simultaneously notifies the control device of the input of the pulse width signal. Further, the pulse selection circuit 11 outputs a pulse width signal shown in FIG. 4d to the AND gate. The counter circuit 13 is the clock generation circuit 1
4 and the pulse width signal, the pulse width information is converted into digital information 15 shown in FIG. 4e and output.

The pulse selection circuit 11 resets the counter circuit 13 at the falling edge of the pulse width signal and prepares for the input of the primary pulse width signal.

In this way, the pulse width output detector group 81 to Sn outputs the pulse width signal with a delay of the basic time TK times the predetermined number of addresses from the time when the enable signal is detected, so that multiple pulse width signals can be transmitted in common. It is also possible to transmit data one after another on a wire.

Effects of the Invention As described above, the present invention integrates the pulse width signals outputted from the pulse width output detector from the time when the enable signal is generated from the signal input device by the number of predetermined device numbers in the pulse width detector. By outputting and transmitting signals with a time delay, wiring can be greatly shortened and wires saved by simply adding simple circuits to both the detector and the signal input device. This reduction in wiring simplifies the construction of electric wires, etc., and can significantly reduce costs, which has great effects.

In addition, since the signal input device can obtain pulse width information in order, it is possible to avoid duplication of instrument body numbers in the detector group, and
As long as they are installed consecutively, the wiring does not necessarily have to be in the order of the unit numbers, and installation work and post-installation changes can be easily handled, and the program can be changed in response to an increase in the number of detectors. It also has great flexibility in that it can be easily dealt with.

[Brief explanation of drawings]

Fig. 1 is a connection diagram of a pulse width output detector in an embodiment of the present invention, Fig. 2 is a connection diagram of a pulse width output detector in an embodiment of the invention, and Fig. 3 is an embodiment of the invention. The connection diagram of the signal input device in FIG. Fig. 4 is a timing chart showing the operation of the signal transmission device, Fig. 5 is a connection diagram of a conventional pulse width output detector, and Fig. 6 is a timing chart showing the operation of the signal transmission device.
The figure is a connection diagram of a conventional signal input device. 16... Enable signal generation circuit, 20...
...Pulse width output detector, 21...Input signal measurement circuit. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 3
51 Figure 4 Figure 6

Claims (1)

[Claims] A pulse width output detector that outputs temperature and humidity measurement data as a pulse width, and an enable signal that starts transmitting the output signal from this pulse width output detector at a threshold level higher than the output level from the pulse width output detector. An enable signal generation circuit that generates a signal and an output signal from the pulse width output detector are inputted via a transmission line,
and an input signal measurement circuit that digitizes and outputs the input signal, and after receiving the enable signal from the enable signal generation circuit, the pulse width output detector counts a predetermined number of units using a basic clock and outputs a pulse width signal. A signal transmission device for a pulse width output detector configured to