JPS6191097A - Crystal growth - Google Patents

Abstract

PURPOSE:When crystalline layers with specific multilayer structures are alternately piled up, the crystal is allowed to grow at a specific low temperature, then growth is effected at a specific temperature to inhibit the mutual diffusion on the heterinterface in the multilayer structure whereby epitaxial crystals of high quality are obtained. CONSTITUTION:When a semiconductive wafer containing crystal layers which have less than 100Angstrom period and a multilayer structure alternately laminating layers of formula I and II (xnot equal to y; x=0.2-1.0 in Al composition), at first the crystal growth is effected at a temperature lower than 520 deg.C on the base, then heat treatment is carried out at 570-630 deg.C. Superlattice layers are formed with high reproducibility. This process inhibits structural disturbance caused by mutual diffusion on the interface between the layers of formulas I and II. Further, the crystal growth can be conducted at lower temperature to reduce contamination on the crystal growth. Further, restriction in the use of refractory materials can be removed to increase freedom to design the crystal growth devices.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to epitaxial crystal growth technology for ■-v compound semiconductors. By employing the method of the present invention, it is possible to improve crystal quality, control crystal composition, and increase the degree of freedom in designing a crystal growth furnace.

(Prior art and its problems) In recent years, single molecular beam epitaxial growth method (MBE method: Mo1
ecular beam epitaxy) and organic metal thermal decomposition vapor phase growth method (MOCVD method: Me
talOrganic Chemical Vap
Since it is effective for controlling the layer thickness of a thin film epitaxial layer, much research has been carried out on the technique. The most important feature of these crystal growth methods is that they enable the production of thin film epitaxy of several lOλ or less. From this point of view, these crystal growth methods are most effective in producing heteroepitaxy of ultra-thin film structures such as superlattices and quantum well structures, and so-called selective doping crystals.

However, in heteroepitaxy of these ultrathin films, when the crystal growth temperature is increased, interdiffusion of host constituent elements occurs at the hetero interface, and 5
A problem arises in that doping impurities from the crystalline layer diffuse into the adjacent layer, making it impossible to obtain a desired structure. Also, M
A particular problem in the BB method is that when the crystal growth temperature is increased, degassing from the vessel wall occurs due to an increase in the temperature of the pitaxy chamber, resulting in a decrease in the purity of the crystal. Furthermore, as the growth temperature increases, the materials constituting the epitaxy chamber are limited to heat-resistant materials, and the selection of materials constituting the epitaxy system is extremely limited.

However, there is a demand to lower the crystal growth temperature as much as possible. For example, if only one GaA layer with a thickness of several tens of λ is doped with St, and the undoped A layer with a thickness of several tens of
A! Since the superlattice structure consisting of the As layer does not generate the deep levels seen in the mixed crystal AJGa layer, it is extremely promising as an electron supply layer for field effect transistors that operate with two-dimensional electron gas. Unless the crystal growth is performed at a temperature of about 550° C. or lower, phenomena such as the inability to obtain the strong photoluminescence (PI) intensity inherent to the superlattice structure are observed, resulting in problems with crystallinity.

In other words, to summarize, crystal growth at low temperatures is desirable in order to prevent interdiffusion at the Peter interface, diffusion of doping impurities in selective doping, and contamination by residual impurities, but low-temperature growth may cause problems with crystal quality. many.

(Objective of the invention) A crystal growth method that can reliably prevent problems such as interdiffusion at the hetero interface of a multilayer structure when growing crystals on semiconductor wafers that contain them, and that can obtain high-quality epitaxial crystals. It is about providing law.

(Structure of the Invention) The gist of the present invention is to provide at least one period of G with a period of 100 or less.
aAs and human AlGaAs (AI composition X=0.2-1.
0) In the case of crystal growth of a semiconductor wafer including a crystal layer having a multi-MM structure in which layers are stacked alternately, the growth must first be performed at a low substrate temperature of 520°C or less, and then at a temperature of 570 to 630°C. A crystal growth method characterized by heat treatment.

(Example) Hereinafter, this invention will be explained in detail based on examples.

Here, an example will be described in which a superlattice structure consisting of 3i-doped GaAs In and an undoped AJAs layer is epitaxially grown.

FIG. 1 shows a cross-sectional view of a wafer containing a superlattice structure to be formed. @1 In the figure, 11 is a GaAs substrate, 12
1 is an AlGaAs layer which will be referred to as a buffer layer for avoiding impurity contamination from the GaAs substrate 11, 13 is a high-purity GaAs layer, and 14 is a superlattice layer made of GaAs and an extremely thin layer of As.

The thickness of each layer in the example is AJG, which is one buffer layer.
The aAs layer 12 has a thickness of 0.5 μm, and the high purity GaAs layer 13 has a thickness of 1 μm.
μm and superlattice layer 14 is 0.5 μm. Conceptually, the band diagram for approximately one period of the layer structure of the superlattice layer 14 is
As shown in the figure. )g of the superlattice m14 as shown in FIG.
The central portion 23 of the GaAs M 21 constituting the four-layer structure is doped with Si to 3xlO''cIIL, and is comprised of acitopic GaAs layers 24 sandwiching this. When the superlattice layer 14 is formed at a low temperature of 520° C. or lower, 8j,
1xG doped with donors such as Te, 8e, etc.
The concentration of deep levels called DX centers, which are universally observed in s1-xkm (k1 composition ratio
Photoconductivity)
There is also almost no photoconduction phenomenon that is thought to be correlated with deep levels called . For these reasons, mixed crystal AJGaAs
In contrast, a crystal layer with a high carrier concentration cannot be obtained even by doping donor impurities, whereas the carrier concentration can be easily increased in the superlattice structure.

On the other hand, when growing at a temperature higher than 520°C, DX centers or PP
The generation of C begins to be observed, and increases as the growth temperature increases, and even if the amount of doping is increased, the carrier concentration does not increase as expected. At present, the origin of the DX center or PPC is unknown, but the generation of these deep levels is due to the diffusion of 8i donors into the AlAs layer 22, or the formation of hl and Ga at the interface between the AlAs layer 22 and the GaAs layer 21. In any case, it is clear that mutual diffusion at the interface is involved, such as mutual diffusion, or even the simultaneous progress of both. As is clear from the above explanation, the superlattice grown at a temperature higher than 520°C does not have the superlattice structure shown in Figure 2, but rather due to interdiffusion of host constituent elements at the interface, diffusion of donor 8i, or It is likely that both are occurring.

Therefore, the fabrication of the superlattice structure shown in Figure 2 requires 5 steps.
It is necessary to perform crystal growth at a low temperature of 20° C. or lower. However, when epitaxial growth is performed at such low temperatures, good crystallinity is not necessarily obtained. For example, strong PL intensity, which is considered to be unique to superlattice structures, cannot be obtained, and PL
Changes in intensity over time are often observed, indicating problems with crystal stability. Moreover, although it was mentioned above that the carrier concentration can be easily increased with a superlattice structure, this is also not sufficient.

That is, Figures 3 and 4 show the superlattice layers obtained when an epitaxial wafer with the structure shown in Figure 1, grown by MBE at a substrate temperature of 520°C or less, is heat-treated in H1 at various temperatures for 30 minutes. showed changes in physical properties. Third
The figure shows the photoluminescence (PL) spectrum, but when heat treated at 650℃ or higher, P
It can be seen that the L peak wavelength has changed and the PL intensity has decreased significantly. The PL intensity of the sample heat-treated at 800°C is equivalent to that of mixed crystal AJGaAs made with similar old doping, and it is clear that interdiffusion of hl and Ga progresses with heat treatment above 650°C. be.

Furthermore, in FIG. 3, it is noteworthy that depending on the heat treatment at 600° C. or lower, the PL strength increases as the heat treatment temperature increases. Figure 4 shows carrier concentration, DX center concentration (
(a) Figure), and the PPC concentration measured at 77
K) and the carrier concentrations measured at 77 and 300, respectively, n776 and naoox ((
b) shows the dependence on heat treatment temperature (T') in Figure 1), and an increase in carrier concentration with increase in heat treatment temperature (T) can be seen even below about 650°C. However, Fig. 4(b)
The respective carrier concentration is the amount of addition 8i (CCs1)
It is standardized. Although both the DX center concentration and the PPC concentration increase even at a low temperature of 650° C. or lower, this amount is less than 1/10 of the carrier concentration and does not pose a practical problem. The slight decrease in PPC concentration and increase in carrier concentration in the low-temperature heat treatment at 650°C without grooves in FIG. 4 correspond well to the tendency of increase in PL intensity in the low-temperature heat treatment shown in FIG. The above results indicate that such low-temperature heat treatment improves crystallinity or activates inactive doping impurities.

Furthermore, according to the results of a detailed study of the dependence on heat treatment temperature, the upper limit of heat treatment temperature is around 630°C.
The lower limit of the heat treatment temperature at which heat treatment is effective is 570°C. Of course, if you increase the heat treatment time, it will be 570°GJ.
It is natural that the effect of improving crystallinity can be seen even under the skin.
J: Yes. In addition, instantaneous heat treatment at an upper limit temperature of 700'Ca degrees for about 10 seconds does not significantly change the physical properties of the superlattice structure. However, at a temperature of 30 minutes, which is considered to be a normal heat treatment time, the temperature ranges from about 570℃ to 630℃.
If heat treatment is performed at a temperature in the range of , it is possible to improve the crystallinity without impairing the physical properties of the superlattice structure.

To summarize the results described above, AlyGa 1-yAs and AJxG with at least one period with a period of 100λ or less
ap-xAs (x % y * AA! Composition X=0.
2-1.0) When growing a semiconductor waeno 1 crystal containing crystal layers having a multilayer structure, that is, a superlattice structure, in which layers are stacked alternately, the superlattice structure is produced by performing crystal growth at a temperature of 520°C or less. It was shown that a superlattice structure exhibiting excellent physical properties can be obtained with good reproducibility by using a method in which a heat treatment is subsequently performed at 570 to 630°C.

The present invention has a remarkable effect on superlattices with a period of 100 or less, and when creating a superlattice with a period of more than 100, it is not necessary to use low-temperature growth and G) means as in the present invention. do not have. However, it is difficult to create an M'fr element with a long period of 100λ or more, and even if the period is long, one material layer forming the 43 superlattice layer has several tens of layers.
It goes without saying that the present invention is effective in the following cases.

In addition, in the embodiment, an example of a superlattice layer made of GaAs and AlAs was described, but the present invention generally applies to AJ y Ga
1-yAs and Alx0a 1-xAs (x ~ y
It is also effective for superlattice layers consisting of l/〆0.2≦X≦1.0). In addition, superlattice l- by combination of other materials
Although the growth temperature and the subsequent heat treatment temperature differ depending on the material, the method of the present invention of heat treatment at a lower temperature after low-temperature growth is applicable and effective.

(Effect of the invention) By applying the present invention, A7. Ga
1-yAs (x'2y, AI composition X=0.2-1.0)
A crystal layer having a multilayer structure by stacking layers alternately, that is, a superlattice layer, can be manufactured with good reproducibility.

That is, (1) klyGa 1- yAs and AA!, which were problematic when producing a superlattice layer. xGal-
At the interface of the xAs (k1 composition X=0.2 to 1.0) layer...disturbance of the structure based on interdiffusion is prevented. Moreover, (2) a low-temperature growth method is used to prevent the problem of interdiffusion, and the problem of low crystal quality in this case can also be avoided. (3) When actually producing a superlattice layer, low-temperature growth is possible, so there is less contamination during crystal growth, and restrictions on heat-resistant materials in the growth equipment are lifted, so there is greater freedom in the design of the growth equipment. increases.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram showing the cross-sectional structure of a wafer containing a superlattice layer used in experiments to demonstrate the effects of the present invention, and Figure 2 is a schematic diagram of the cross-sectional structure of a wafer containing a superlattice layer used in experiments to demonstrate the effects of the present invention.
A schematic band diagram corresponding to approximately one period of the superlattice layer in the figure, Figure 3 is a graph showing photoluminescence spectra before and after heat treatment, and Figure 4(a) is a graph showing the net ionized impurity concentration and DX of the superlattice layer. Center heat treatment temperature (T)
The graph showing the dependence, Figure 4(b), shows the addition of 8131 degrees (
FIG. 3 is a diagram showing the dependence of carrier concentration and PPC concentration on heat treatment temperature ('r) normalized by C, . 11; GaAs substrate 12; buffer y AlGaAs layer 13; high purity GaAs layer 14; superlattice layer 21; GaAs forming superlattice layer 22; AA forming superlattice layer! As 23; region 24 of the GaAs forming the superlattice layer to which Si is added; region 24 of the GaAs forming the superlattice layer to which no impurities are added Figure 4(a) +000/T (K” ) Figure 4(b) +000/T (K)

Claims (1)

[Claims] At least one period of Al_yGa_ with a period of 100 Å or less
1_-_yAs and Al_xGa_1_-_xAs (x≠
y, Al composition
A crystal growth method characterized by performing heat treatment at a temperature of 70 to 630°C.