JPS618918A - Forming of semiconductor electrode - Google Patents
Forming of semiconductor electrodeInfo
- Publication number
- JPS618918A JPS618918A JP13052984A JP13052984A JPS618918A JP S618918 A JPS618918 A JP S618918A JP 13052984 A JP13052984 A JP 13052984A JP 13052984 A JP13052984 A JP 13052984A JP S618918 A JPS618918 A JP S618918A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- heat
- semiconductor
- substrate
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 45
- 229910052751 metal Inorganic materials 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims abstract description 24
- 239000013078 crystal Substances 0.000 claims abstract description 13
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 239000011248 coating agent Substances 0.000 claims abstract description 5
- 238000000576 coating method Methods 0.000 claims abstract description 5
- 229920006015 heat resistant resin Polymers 0.000 claims description 7
- 238000010438 heat treatment Methods 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 7
- 239000000758 substrate Substances 0.000 abstract description 25
- 239000004642 Polyimide Substances 0.000 abstract description 9
- 229920001721 polyimide Polymers 0.000 abstract description 9
- 230000001681 protective effect Effects 0.000 abstract description 6
- 239000007788 liquid Substances 0.000 abstract description 5
- 238000004544 sputter deposition Methods 0.000 abstract description 5
- 230000005496 eutectics Effects 0.000 abstract description 3
- PIICEJLVQHRZGT-UHFFFAOYSA-N Ethylenediamine Chemical compound NCCN PIICEJLVQHRZGT-UHFFFAOYSA-N 0.000 abstract description 2
- 239000011347 resin Substances 0.000 abstract 3
- 229920005989 resin Polymers 0.000 abstract 3
- NWZSZGALRFJKBT-KNIFDHDWSA-N (2s)-2,6-diaminohexanoic acid;(2s)-2-hydroxybutanedioic acid Chemical compound OC(=O)[C@@H](O)CC(O)=O.NCCCC[C@H](N)C(O)=O NWZSZGALRFJKBT-KNIFDHDWSA-N 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- IKDUDTNKRLTJSI-UHFFFAOYSA-N hydrazine monohydrate Substances O.NN IKDUDTNKRLTJSI-UHFFFAOYSA-N 0.000 abstract 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 7
- 238000005520 cutting process Methods 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000002845 discoloration Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体電極の形成方法に関し、特に電極接触面
が電圧と電流で比例関係となろオーム性の電極を形成す
る方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a semiconductor electrode, and more particularly to a method for forming an ohmic electrode in which the electrode contact surface has a proportional relationship between voltage and current.
半導体装置ではＰＮ接合等各回路を半導体基板に形成し
、各回路の領域は半導体装置内での細線による接続また
は外部回路との接続のため半導体装置のリード線に細線
で接続するため。In a semiconductor device, each circuit such as a PN junction is formed on a semiconductor substrate, and the area of each circuit is connected by a thin wire within the semiconductor device or to a lead wire of the semiconductor device for connection to an external circuit.
各領域の半導体結晶上に金属膜で電極が形成される。図
にこの一例を示す半導体装置、半導体基板の縦断面図を
示す。即ち図は発光ダイオードを製造丁べ（ＧａＡｓ半
導体基板にＰＮ接合を形成し、電極を形成した時点の断
面図を示すもので、１はＮ型ＧａＡｓ半導体基板、２は
Ｎ型ＧａＡｓ基板上にエピタキシャル成長したＮ型Ｇａ
Ａｓ結晶層、３は更に温度を低下してエピタキシャル成
長したＰ型のＧａＡｓ結晶層で、この半導体基板を切断
により小片に分離することにより多数の同一の半導体チ
ップを得るものである。An electrode is formed using a metal film on the semiconductor crystal in each region. The figure shows a vertical cross-sectional view of a semiconductor device and a semiconductor substrate showing an example of this. In other words, the figure shows a cross-sectional view of a light emitting diode being manufactured (a PN junction is formed on a GaAs semiconductor substrate and an electrode is formed). 1 is an N-type GaAs semiconductor substrate, 2 is an epitaxial growth on an N-type GaAs substrate. N-type Ga
The As crystal layer 3 is a P-type GaAs crystal layer epitaxially grown at a further lowered temperature, and a large number of identical semiconductor chips are obtained by separating this semiconductor substrate into small pieces by cutting.
この半導体結晶基板上に電極とすべき例えばＡｕＧｅ合
金をスパッタあるいは蒸着により全面に被着し、必要な
ところだけを残しく本実施例では各チノグの上電極５部
分）他は腐蝕除去あるいはリフトオンし９本実施例のよ
うに必要であれば半導体基板裏面にも下電極６用金属Ａ
ｕＺｎ等をスパッタあるいは蒸着により被着する。For example, an AuGe alloy to be used as an electrode is deposited on the entire surface of this semiconductor crystal substrate by sputtering or vapor deposition, leaving only the necessary parts (in this example, the upper electrode 5 of each chinog), and the rest is removed by corrosion or lift-on. 9 If necessary as in this embodiment, the metal A for the lower electrode 6 is also applied to the back surface of the semiconductor substrate.
UZn or the like is deposited by sputtering or vapor deposition.
上述の如く半導体結晶上に金属を被着すると金属と半導
体結晶の間にショットキ接合が形成されある電圧が印加
される迄は電流は流れず。As described above, when a metal is deposited on a semiconductor crystal, a Schottky junction is formed between the metal and the semiconductor crystal, and no current flows until a certain voltage is applied.
ある電圧以上になると急激に電流が流れ出し電極として
使用するには非常に不都合となる。そのためこのような
電極として用いるためには印加電圧の小さいうちから電
圧に比例した電流が得られるオーム性接触が硬求される
。このオーミックコンタクトを得るため通常半導体製造
においては電極用金属な被着した後昇温して熱処理する
ことにより金属と半導体結晶の接触面に一共晶を形成し
ている。この実施例のようにＡｕＧｅを電極として使う
場合はこの共晶を得るためには通常４００℃以上の熱処
理をしなければならない。しかしＡｕＧｅの共晶点は３
５６°Ｃでこの熱処４ 環中に電極形状が変形し
たり電極表面があれて平担性を失い、後ワイヤボンディ
ングなどに不都合を生ずる。これを解消するため従来は
電極用金属を被着した後、その周囲にＳ １０２ 、
Ａｌｌ ２０３ｒＳｉ３Ｎ４などの誘電体膜を保護膜と
して被覆し熱処理を行なっていた。When the voltage exceeds a certain level, current suddenly flows out, making it very inconvenient to use as an electrode. Therefore, in order to use it as such an electrode, an ohmic contact is required that can obtain a current proportional to the voltage even when the applied voltage is small. In order to obtain this ohmic contact, normally in semiconductor manufacturing, a metal for an electrode is deposited and then heated and heat treated to form a monoeutectic at the contact surface between the metal and the semiconductor crystal. When AuGe is used as an electrode as in this embodiment, heat treatment at 400° C. or higher is normally required to obtain this eutectic. However, the eutectic point of AuGe is 3
At 56.degree. C., the shape of the electrode is deformed during the heat treatment, and the surface of the electrode becomes rough, resulting in loss of flatness, which causes problems in subsequent wire bonding. To solve this problem, conventionally, after depositing the electrode metal, S102,
A dielectric film such as All 203rSi3N4 was coated as a protective film and heat treatment was performed.
しかしながら、この５ｉ０２やＡｌ２Ｏ３などの誘電体
膜を被覆する方法は２通常スパッタリングやＣＵＤ法が
とられており、高価な装置が必要と共に被着時に高温と
なり半導体素子そのものの特性を損なう危険性をはらん
でおり、またこれらの被着方法は長時間を要し全体的に
コストが大幅に上昇し、高温にさらされることにより半
導体装置の信頼性にも問題が出てくる。However, the method of coating dielectric films such as 5i02 and Al2O3 is usually sputtering or CUD, which requires expensive equipment and raises the risk of damaging the characteristics of the semiconductor element itself due to high temperatures during deposition. Furthermore, these deposition methods require a long time, significantly increasing the overall cost, and exposure to high temperatures poses problems in the reliability of the semiconductor device.
本発明はこのような欠点に鑑みなされたもので、電極用
金属を被着した後の保護膜を簡易に被着でき、しかも電
極用金属を有効に保護できるポリイミドなど耐熱性樹脂
で被覆するものである。以下実施例により詳細に説明す
る。 セ〔実施例〕
まず前述の如（図に示すように、半導体基板にＰＮ接合
４を形成し、電極用金属５，６をスパッタあるいは蒸着
により被着する。上電極５用金属は前述の如（半導体基
板表面全域に被着した後余計な所を腐蝕除去したもので
ある。次にこの半導・体基板全体を例えばスピナーの上
に載置し、３５００回／分のスピードで回転しながらポ
リイミドのような耐熱性樹脂を数滴１滴下する。ポリイ
ミドは粘性のある液状のため回転による遠心力により半
導体基板表面上に適当な厚みをもって拡がる。次にこれ
を２５０°Ｃ位で約６０分熱処理すると液状のポリイミ
ドは硬化し。The present invention has been made in view of these drawbacks, and it is a method in which a protective film can be easily applied after the electrode metal is coated, and the electrode metal is coated with a heat-resistant resin such as polyimide that can effectively protect the electrode metal. It is. This will be explained in detail below using examples. [Example] First, as described above (as shown in the figure), a PN junction 4 is formed on a semiconductor substrate, and electrode metals 5 and 6 are deposited by sputtering or vapor deposition.The upper electrode 5 metal is formed as described above. (After coating the entire surface of the semiconductor substrate, unnecessary parts were removed by corrosion.Next, the entire semiconductor/body substrate was placed on a spinner, for example, and rotated at a speed of 3500 times/min. Drop several drops of a heat-resistant resin such as polyimide. Polyimide is a viscous liquid, so it spreads to an appropriate thickness on the surface of the semiconductor substrate due to the centrifugal force caused by rotation. Next, this is heated at about 250°C for about 60 minutes. When heat treated, liquid polyimide hardens.
半導体基板上に保護膜が形成される。半導体基板裏面の
下電極６用金属についても同様に耐熱性樹脂で被覆する
。このポリイミドは５００℃位迄昇温しても変色等多少
変質はきたしてもクラックが入って剥れるとか燃えて灰
になるなど無形化することはないため電極用金属保護す
る目的は十分に達し得る。次に従来と同じく、電極用金
属と半導体結晶の共晶化のため４８０°Ｃ位で３分位熱
処理する。その後例えば抱水とドラジン、エチレンジア
ミンのような液に半導体基板全体を浸すことにより溶解
除去する。この保護膜の除去は熱処理後直ちに除去しな
くても１次の半導体基板から冬半導体チップに分離する
ための切断工程時の半導体基板表面保護をも兼ねて切断
後に除去しても良いことは言う迄もない。A protective film is formed on the semiconductor substrate. The metal for the lower electrode 6 on the back surface of the semiconductor substrate is similarly coated with a heat-resistant resin. Even if this polyimide is heated to about 500 degrees Celsius, it may undergo some changes in quality such as discoloration, but it will not become intangible such as cracking, peeling, or burning to ash, so it is sufficient to serve the purpose of protecting electrode metals. obtain. Next, as in the conventional case, heat treatment is performed at about 480° C. for about 3 minutes in order to eutecticize the electrode metal and the semiconductor crystal. Thereafter, the semiconductor substrate is dissolved and removed by immersing the entire semiconductor substrate in a liquid such as hydrated water, dorazine, or ethylenediamine. It should be noted that this protective film does not need to be removed immediately after heat treatment, but may be removed after cutting to also protect the surface of the semiconductor substrate during the cutting process to separate the primary semiconductor substrate into semiconductor chips. Not until now.
上記実施例ではポリイミドの例で説明したが。In the above embodiment, polyimide was used as an example.
その他の耐熱性樹脂で被着並びに剥離が容易で熱処理時
の５００℃位に耐え得るものであれば良い。Any other heat-resistant resin may be used as long as it is easy to adhere and peel off and can withstand temperatures of about 500° C. during heat treatment.
以上説明したように本発明によれば、電極用金属保護を
従来の誘電体膜でなく耐熱性樹脂で行なっているため、
その被着並びに除去が非常に容易で短時間でできると共
に設備も高価な設備は必要な（、また被着温度も低温で
できるため、この方法により製造した半導体装置はコス
トが安価であると共に品質の信頼性も向上するという利
点がある。As explained above, according to the present invention, since the metal protection for the electrode is performed with a heat-resistant resin instead of the conventional dielectric film,
The deposition and removal of this method is very easy and can be done in a short period of time, and expensive equipment is not required. This has the advantage of improving reliability.
図は半導体装置の電極用金属を被着した状態の断面図で
ある。
１−、・Ｎ型ＧａＡｓ半導体基板、２・Ｎ型ＧａＡｓエ
ピタキシャル成長層、３・・・Ｐ型ＧａＡｓエピタキシ
ャル成長層、４・・・ＰＮ接合、５・・・上電極。
６・・・下電極。
特許出願人 新日本無線株式会社
一〇にThe figure is a cross-sectional view of a state in which metal for electrodes of a semiconductor device is coated. 1-, N-type GaAs semiconductor substrate, 2-N-type GaAs epitaxial growth layer, 3... P-type GaAs epitaxial growth layer, 4... PN junction, 5... upper electrode. 6...lower electrode. Patent applicant: New Japan Radio Co., Ltd.
Claims (1)
成方法において、前記半導体結晶上に電極用金属を被着
する工程と、該電極用金属周囲に耐熱性樹脂を被覆する
工程と、前記半導体結晶全体を昇温して前記半導体結晶
と前記電極用金属との接触面を共晶化する熱処理工程と
、前記被覆した耐熱性樹脂を除去する工程とからなる半
導体電極の形成方法。A method for forming a semiconductor electrode in which an ohmic electrode is formed on a semiconductor crystal, comprising the steps of depositing an electrode metal on the semiconductor crystal, coating a heat-resistant resin around the electrode metal, and the semiconductor crystal. A method for forming a semiconductor electrode, comprising: a heat treatment step of raising the temperature of the entire structure to eutecticize the contact surface between the semiconductor crystal and the electrode metal; and a step of removing the coated heat-resistant resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13052984A JPS618918A (en) | 1984-06-25 | 1984-06-25 | Forming of semiconductor electrode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13052984A JPS618918A (en) | 1984-06-25 | 1984-06-25 | Forming of semiconductor electrode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS618918A true JPS618918A (en) | 1986-01-16 |
Family
ID=15036475
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13052984A Pending JPS618918A (en) | 1984-06-25 | 1984-06-25 | Forming of semiconductor electrode |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS618918A (en) |
-
1984
- 1984-06-25 JP JP13052984A patent/JPS618918A/en active Pending
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