JPS6183056U - - Google Patents
Info
- Publication number
- JPS6183056U JPS6183056U JP16882684U JP16882684U JPS6183056U JP S6183056 U JPS6183056 U JP S6183056U JP 16882684 U JP16882684 U JP 16882684U JP 16882684 U JP16882684 U JP 16882684U JP S6183056 U JPS6183056 U JP S6183056U
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- cavity
- lead
- ceramic case
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- 239000000919 ceramic Substances 0.000 claims description 4
- 238000005538 encapsulation Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 1
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Description
第１図ａは本考案の一実施例に係るリードフレ
ームを用いた半導体装置セラミツクケース封入を
説明するための断面図、同図ｂは同図ａと半導体
素子の寸法が異なる例の断面図、第２図は従来の
リードフレームを用いたセラミツクケース封入を
説明するための断面図である。
１……セラミツクケース、２……キヤビテイ、
３，４……半導体素子、５，６……リードフレー
ム、７……接続金属細線。
FIG. 1a is a cross-sectional view for explaining the encapsulation of a semiconductor device into a ceramic case using a lead frame according to an embodiment of the present invention, and FIG. 1b is a cross-sectional view of an example in which the dimensions of the semiconductor element are different from those in FIG. FIG. 2 is a sectional view illustrating the encapsulation of a ceramic case using a conventional lead frame. 1... Ceramic case, 2... Cavity,
3, 4...Semiconductor element, 5, 6...Lead frame, 7...Connection metal thin wire.
Claims (1)
収容固着された半導体素子のリード端子引出し組
立に用いるリードフレームにおいて、前記リード
フレームのインナーリード先端部が前記キヤビテ
イの深さ相当分だけほぼ直角に曲げられているこ
とを特徴とする半導体装置用リードフレーム。 In a lead frame used for assembling a lead terminal drawer of a semiconductor element housed and fixed in a cavity of a glass-sealed ceramic case, the inner lead tip of the lead frame is bent at a substantially right angle by an amount corresponding to the depth of the cavity. A lead frame for semiconductor devices characterized by the following.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16882684U JPS6183056U (en) | 1984-11-07 | 1984-11-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16882684U JPS6183056U (en) | 1984-11-07 | 1984-11-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6183056U true JPS6183056U (en) | 1986-06-02 |
Family
ID=30726588
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16882684U Pending JPS6183056U (en) | 1984-11-07 | 1984-11-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6183056U (en) |
-
1984
- 1984-11-07 JP JP16882684U patent/JPS6183056U/ja active Pending
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