JPS6181139A - Charger for secondary cell - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a charging device, and particularly to a charging device for a secondary battery such as nickel cadmium.

[Conventional technology]

When charging a secondary battery (storage battery) such as a nickel-cadmium battery, if the battery is charged beyond its specified capacity (overcharging), gas is generated within the battery. Due to this generated gas pressure, the secondary battery is in an expanded state as shown by the two-dot chain line in FIG. 4, and accordingly, cracks occur in the anode metal 41 or the cathode metal 40, and the battery is damaged. 42
shows a backing interposed between anode metal 41 and cathode metal 40. Moreover, overcharging causes the problem of shortening its life even if no cracks occur.

As a conventional charging device, for example, the Japanese Patent Publication No. 52-4828
As shown in Publication No. 4, when charging a secondary battery,
Some rechargeable batteries first discharge their remaining capacity to a predetermined final voltage, and then charge for a predetermined time corresponding to the capacity of the secondary battery.

In addition, some charging devices for large-capacity nickel-cadmium batteries detect the temperature rise of the battery during charging and stop supplying charging current when the temperature reaches a predetermined temperature to prevent overcharging. .

[Problem that the invention seeks to solve]

However, the nickel cadmium battery has solid line 43 in Figure 5.
As shown in the discharge characteristics shown by the broken lines 44a and 44b, the final voltage is influenced by temperature and varies, compared to the discharge characteristics of the manganese battery shown by the dashed line 45. For this reason,
Devices that judge the remaining capacity of a nickel-cadmium battery from the terminal voltage and charge it for a predetermined period of time have a risk of overcharging. Further, a detection circuit is required to detect that the terminal voltage has reached the final voltage, which has the disadvantage of complicating the circuit configuration.

In addition, for small-capacity nickel-cadmium batteries, the influence of external temperature is greater than the rise in battery temperature.
A device that detects temperature rise during charging and prevents overcharging is
It had the disadvantage that it did not work properly with small nickel-cadmium batteries.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a secondary battery charging device that is free from overcharging or undercharging and has a simple circuit configuration.

[Means for solving problems]

The present invention includes a timer circuit 1 that defines a first predetermined time and a second predetermined time following the first predetermined time;
a discharging circuit 22 that discharges the secondary battery 4 via a current limiting resistor 21 during a second predetermined time; and a charging circuit 1 that charges the secondary battery 4 with a constant current during a second predetermined time.
7. This is a secondary battery charging device comprising:

[Effect]

The timer circuit 1 operates the discharge circuit 22 for a first predetermined time (for example, 45 minutes), which is sufficient to reduce the remaining capacity to a predetermined final voltage or less, regardless of the remaining capacity of the secondary battery 4, thereby reducing the remaining capacity of the secondary battery 4. The constant current circuit 17 is operated by the timer circuit 1 for a second predetermined period of time (for example, 2 hours and 15 minutes) in order to discharge to a predetermined end voltage and then charge the secondary battery 4 with just the right amount.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a connection diagram showing the configuration of an embodiment of the present invention. In FIG. 1, 1 is a timer circuit,
Reference numeral 2 denotes a DC power supply consisting of a plurality of batteries connected in series.

3 is a power switch, and 4 is a secondary battery to be charged, such as a thin and small nickel cadmium battery with a diameter of 23.2 cm and a thickness of 2.0 cm, and has a capacity of 1 (I C = 4
0mA/hour).

One power line 2A is led out from the + side of the DC power supply 2 via the power switch 3, and the other power line 2B is led out from the - side.

This embodiment is configured as a portable charger dedicated to a small radio receiver, for example, and when the radio receiver is set in the charger storage section, the secondary battery 4 built in the radio receiver is connected to the terminal 5 and 6, and the power switch 3 is turned on in conjunction with this.

Terminal 5 connected to the power line 2A and the + side of the secondary battery 4
PN for forming a charging current for the secondary battery 4 between
A P-type transistor 17 is inserted. That is, the collector of transistor 17 is connected to terminal 5, and transistor 1
The emitter of 7 is connected to the power supply line 2A via a resistor 18, and a series connection of diodes 19 and 20 is inserted between the power supply line 2A and the base of the transistor 17 to give a forward base bias to the transistor 17. . When the transistor 17 is turned on, the value obtained by dividing the forward voltage drop of one diode by the value of the resistor 18, for example, O, S
A constant current of approximately C is generated, and the secondary battery 4 is charged by this constant current.

Further, a discharge current path is formed between the terminals 5 and 6 in parallel with the secondary battery 4. That is, terminal 5 is connected to resistor 2 with a small value.
1 to the collector of the NPN transistor 22, and the emitter of the transistor 22 and the terminal 6 are connected to each other. When the transistor 22 is turned on, the terminal 5 and the terminal 6 are short-circuited through the resistor 21, and the secondary battery 4 is connected to the resistor 21.
It is discharged by the current of the IC via the IC.

The timer circuit l is a circuit that generates a control signal for charging and discharging the secondary battery at a predetermined time, and is connected to terminals 7 to 13.
It has an IC circuit configuration. Terminals 7 and 8 are power supply terminals, and terminals 7 and 8 are connected to power supply lines 2A and 2A, respectively.
Connected to 2B.

Further, a time constant circuit 9 is connected to the timer circuit 1 . This time constant circuit 9 is composed of two resistors and one capacitor, and one hour of the timer is determined by this time constant circuit 9.

The output terminal 10 is a first output terminal that generates a low level output for a first predetermined period of time, for example, three hours, when the timer circuit 1 is turned on.

The terminal 11 is connected to a second terminal at which a low level output is generated for a second predetermined period of time, for example, 45 minutes after the timer circuit 1 is turned on.
This is the output terminal of The terminal 12 is a terminal to which the Q output of the R-S flip-flop 14 is supplied;
When a low level output is supplied to the timer circuit 1, the timer circuit 1 is turned on, and when a low level output is supplied again,
The timer circuit 1 is turned off. The terminal 13 is a terminal for initial reset, and when the DC power supply 3 is turned on, the timer circuit 1 is reset by a low level output.

First output terminal 10 of timer circuit 1 and power supply line 2
A resistor 23 and a resistor 24 connected in series are inserted between A, and this terminal 10 is connected to a π-S flip-flop 14.
and the emitter of transistor 28. A light emitting diode 25 is inserted between the connection point between the resistors 23 and 24 and the power supply line 2A. A resistor 26 is inserted between the second output terminal 11 of the timer circuit 1 and the power supply line 2A. This second output terminal 11 is connected to the input terminal of an inverter 27 and also to the base of an NPN transistor 28 via a base resistor. A resistor 29 connected in series between power lines 2A and 2B
and a capacitor 30 is inserted. A terminal 13 of a timer circuit I is connected to a connection point between a resistor 29 and a capacitor 30, and a reset input terminal R of a π-S flip-flop 14 is connected thereto. An output terminal Q of an R-S flip-flop 14 is connected to a terminal 12 of the timer circuit 1 .

The collector of the transistor 28, whose emitter and base are connected to the first output terminal 10 and the second output terminal 11 of the timer circuit 1 described above, is connected to the base of the transistor 17 via a resistor 31. This transistor 2
8 turns on, a constant current for charging is supplied to the secondary battery 4 via the transistor 17.

Further, the output terminal of the inverter 27 is connected to the base of the transistor 22. Therefore, the input of the inverter 27 (
When the output of the second output terminal 11 of the timer circuit 1 becomes low level, the transistor 22 turns on and the secondary battery 4
is discharged.

Note that the resistor 32 inserted between the power supply line 2A and the power supply line 2B is a discharge resistance of the entire charging circuit, and its value is set to a large value such as IMΩ.

FIG. 2 is a time chart of each output of each section in FIG. 1. When the secondary battery is connected to the terminals 4 and 5, the power switch 3 is turned on at timing t0, and the power line 2A rises to the power voltage as shown in FIG. 2A. From the DC power supply 2 to the terminal 7 of the timer circuit 1,
8, the voltage at the connection point between the resistor 29 and the capacitor 30 momentarily falls to a low level when the power switch 3 is turned on, and this voltage is applied to the terminal 13 and ]'(- of the flip-flop 14 reset input terminals R. At the same time, the first output terminals io, i
A power supply voltage is supplied to the set input terminal S of the -x flip-flop 14 and the emitter of the transistor 28. Furthermore, the power supply voltage is supplied to the second output terminal 11, the inverter 27, and the base of the transistor 28.

Power switch 3 is connected to the connection point of resistor 29 and capacitor 30.
Due to the negative voltage generated when the circuit is turned on, the timer circuit 1 is reset, and the output of the gate 16, that is, the output .alpha. of the R-S flip-flop 14 becomes high level as shown in FIG. 2B.

At this time, since a high level is being supplied to the cent input terminal S of the R-S flip-flop 14, the gate 15
The output Q of the R-S flip-flop 14 is at a low level as shown in FIG. 2C. This output Q is supplied to the terminal 12, and the timer circuit 1 starts timer operation.

That is, the first output terminal 10 and the second output terminal of the timer circuit 1
As shown in FIGS. 2F and 2B, the output terminal 11 of 1. becomes low level.

The light emitting diode 25 connected to the first output terminal 10 emits light while the power switch 3 is on and the first output terminal 10 is at a low level.

When the timer circuit 1 starts the timer operation and the first output terminal 10 and the second output terminal 11 are at a low level, the base and emitter of the transistor 28 are both at a low level and are non-conductive. Therefore, no base bias is applied to transistor 17, and transistor 17 is also non-conductive. On the other hand, the output of the inverter 27 is at a high level while the second output terminal 11 is at a low level, as shown in the second diagram, and the transistor 22 is turned on. The secondary battery 4 is discharged via the transistor 22 and the resistor 21.

Timing 1. A predetermined time from to timing t2,
In this embodiment, the timer circuit 1 starts operating at timing 1. When time t2 elapses after 45 minutes, the second output terminal 11 of the timer circuit 1 rises to a high level as shown in FIG. The output of the inverter 27 becomes a low level as shown in the second diagram, and as a result, the transistor 22 becomes non-conductive, and the discharge of the secondary battery 4 ends.

Further, the base of the transistor 28 is connected to the second output terminal 11
Since it is connected to , this base becomes high level. On the other hand, the emitter of the transistor 28 (first output terminal 1
0) remains at a low level, transistor 28 becomes conductive. Therefore, a forward bias is applied to the base of the transistor 17, and a constant current obtained by dividing the base-emitter voltage drop of one diode by the resistor 18 is supplied to the secondary battery 4, and charging is started.

At a predetermined time when the first output terminal 10 of the timer circuit 1 is at a low level, in this embodiment, at timing t3, which is three hours after the timing t1 at which the timer circuit 1 starts operating, this output terminal 10 becomes the second output terminal. The level becomes high as shown in Figure F.

As a result, the emitter of the transistor 28 is set to a high level, and the transistor 28 becomes non-conductive. Therefore, the transistor 17 becomes non-conductive, the supply of constant charging current to the secondary battery 4 is stopped, and charging ends. At this time, the first output terminal 10 becomes high level, so the light emitting diode 25 goes out and the end of the charging operation is displayed.

As is clear from the above description, in this embodiment, from the timing t when the timer circuit 1 starts operating, the second
Timing t2 when the output terminal 11 of rises to high level
The secondary battery 4 is discharged via the resistor 21 and the transistor 22 for 45 minutes. 3 shown by the solid line in Figure 3.
5 shows the change in terminal voltage when the fully charged secondary battery 4 is discharged. Further, in FIG. 3, a broken line 36 indicates a change in terminal voltage during discharging of the secondary battery 4, which has a considerably low remaining capacity. The time (j+"t2) is selected to be long enough to reliably discharge the fully charged secondary battery 4 to the final voltage under normal temperature conditions.

For example, for 2 hours and 15 minutes from timing t2 to timing t3 by the constant current generated by the transistor 17,
The secondary battery 4 is charged, and its terminal voltage rises slightly as shown in FIG. This (tz~tz) time is
The length is selected to fully charge the secondary battery 4 discharged to the final voltage with the above-mentioned constant current.

Note that the present invention can be similarly applied to a charging device that charges a lithium battery.

〔Effect of the invention〕

According to this invention, when charging a secondary battery, the remaining capacity of the secondary battery is discharged in advance to ensure that it is below a predetermined final voltage, and then the charging is performed, so that overcharging is avoided ( It is possible to reliably bring the secondary battery into a fully charged state.

Further, according to the present invention, there is no need for a detection circuit that detects that a predetermined final voltage has been reached, unlike in conventional charging devices, so the circuit configuration can be simplified.

[Brief explanation of the drawing]

Fig. 1 is a connection diagram showing an embodiment of this invention, Fig. 2 is a time chart used to explain an embodiment of this invention, and Fig. 3 is a connection diagram showing an embodiment of this invention.
The figure is a graph used to explain one embodiment of the present invention, FIG. 4 is a cross-sectional view used to explain a secondary battery, and FIG. 5 is a graph used to explain a conventional charging device. 1: Timer circuit, 2: DC power supply, 3: Power switch,
4: Secondary battery, 10: First output terminal, 11: Second output terminal, 14: W-X free knob flop, 17:
Transistor for forming a constant current, 22: Transistor for forming a discharge path, 27: Inverter.

Claims (1)

[Claims] a first predetermined time and a second predetermined time following the first predetermined time;
a discharge circuit that discharges the secondary battery via a current limiting resistor during the first predetermined time; and a discharge circuit that discharges the secondary battery via a current limiting resistor during the second predetermined time; A charging device for a secondary battery, comprising a charging circuit for charging.