JPS6175465A - マルチプロセサシステム - Google Patents

マルチプロセサシステム

Info

Publication number
JPS6175465A
JPS6175465A JP59197040A JP19704084A JPS6175465A JP S6175465 A JPS6175465 A JP S6175465A JP 59197040 A JP59197040 A JP 59197040A JP 19704084 A JP19704084 A JP 19704084A JP S6175465 A JPS6175465 A JP S6175465A
Authority
JP
Japan
Prior art keywords
bus
arbiter
memory
data
ips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59197040A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0149982B2 (cg-RX-API-DMAC10.html
Inventor
Ritsu Katayama
片山 立
Hiroshi Shimizu
博 清水
Hiroaki Tanaka
広明 田仲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Science and Technology Agency
Original Assignee
Research Development Corp of Japan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Research Development Corp of Japan filed Critical Research Development Corp of Japan
Priority to JP59197040A priority Critical patent/JPS6175465A/ja
Publication of JPS6175465A publication Critical patent/JPS6175465A/ja
Publication of JPH0149982B2 publication Critical patent/JPH0149982B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/17Interprocessor communication using an input/output type connection, e.g. channel, I/O port

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Processing Or Creating Images (AREA)
  • Multi Processors (AREA)
JP59197040A 1984-09-20 1984-09-20 マルチプロセサシステム Granted JPS6175465A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59197040A JPS6175465A (ja) 1984-09-20 1984-09-20 マルチプロセサシステム

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59197040A JPS6175465A (ja) 1984-09-20 1984-09-20 マルチプロセサシステム

Publications (2)

Publication Number Publication Date
JPS6175465A true JPS6175465A (ja) 1986-04-17
JPH0149982B2 JPH0149982B2 (cg-RX-API-DMAC10.html) 1989-10-26

Family

ID=16367721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59197040A Granted JPS6175465A (ja) 1984-09-20 1984-09-20 マルチプロセサシステム

Country Status (1)

Country Link
JP (1) JPS6175465A (cg-RX-API-DMAC10.html)

Also Published As

Publication number Publication date
JPH0149982B2 (cg-RX-API-DMAC10.html) 1989-10-26

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term