JPS6166175A - Search radar - Google Patents

Search radar

Info

Publication number
JPS6166175A
JPS6166175A JP59187469A JP18746984A JPS6166175A JP S6166175 A JPS6166175 A JP S6166175A JP 59187469 A JP59187469 A JP 59187469A JP 18746984 A JP18746984 A JP 18746984A JP S6166175 A JPS6166175 A JP S6166175A
Authority
JP
Japan
Prior art keywords
area
signal
circuit
video signal
area number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59187469A
Other languages
Japanese (ja)
Inventor
Takashi Ishigaki
石垣 隆司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP59187469A priority Critical patent/JPS6166175A/en
Publication of JPS6166175A publication Critical patent/JPS6166175A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/04Display arrangements
    • G01S7/06Cathode-ray tube displays or other two dimensional or three-dimensional displays
    • G01S7/10Providing two-dimensional and co-ordinated display of distance and direction
    • G01S7/12Plan-position indicators, i.e. P.P.I.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

PURPOSE:To control clutter with a simple construction and enable indication of only a target of an aircraft, etc., by handling a received video signal as the 2-dimensional image and allowing only a small-area video signal to be displayed in a PPI. CONSTITUTION:To a binary video signal-receiving signal by a binarized video signal an area number is provided for a non-signal-sending-pulse period by an area number allocating circuit 22 responding to a signal sending pulse 2 and an area measuring circuit measures its area by handling the signal-receiving video signal as a 2-dimensional image. Comparison is made on this measured area and the reference area and a display identifying circuit 27 identifies an area as clutter when the area exceeds the specified value and indication in a PPI indicating apparatus 5 corresponding to a delay transmitting pulse and a delay bearing antenna angular signal through a delay circuit 28 is be eliminat ed. By these arrangements, a simple construction becomes available for control ling clutters of mountains and architectural structures, etc. and limiting indica tion only to a target echo of aircrafts, etc.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は、山や建物等のクラッタを消去し。[Detailed description of the invention] [Technical field of invention] This invention eliminates clutter such as mountains and buildings.

航空機等の点目標を探知するレーダ捜索装置の改良に関
するものである。
This invention relates to the improvement of radar search equipment for detecting point targets such as aircraft.

〔従来技術〕[Prior art]

従来のレーダ捜索装置は捜索レーダの受信ビデオ信号を
pp工表示器に表示していた。
Conventional radar search devices display the received video signal of the search radar on a PP display.

第1図は従来の装置の構成の一例を示す図であって、(
1)は捜索レーダ、 121Fi送信パルス信号、(3
)は受信ビデオ信号、(4)はベアリングアンテナ角度
信号、 (5+id P p I表示器である。
FIG. 1 is a diagram showing an example of the configuration of a conventional device.
1) is a search radar, 121Fi transmission pulse signal, (3
) is the received video signal, (4) is the bearing antenna angle signal, and (5+id P p I indicator).

第1図において、捜索レーダ(11ハベアリンク方向に
一定回転しておりその回転角度をベアリングアンテナ角
度信号(4)として送出しながら周期的に電磁波を放射
し、同時に送信パルス信号+21を送出する。目標から
の反射電磁波は捜索レータ(11から受信ビデオ信号(
3)として送出され、FPI表示器(5)に表示される
In Fig. 1, the search radar (11) rotates at a constant rate in the direction of the Habea link, and periodically radiates electromagnetic waves while transmitting the rotation angle as a bearing antenna angle signal (4), and at the same time transmits a transmission pulse signal +21.Target The reflected electromagnetic waves from the search radar (11)
3) and displayed on the FPI display (5).

第2図は送信パルス信号(2)と受信ビデオ信号(3)
との関係管示j1例であって、(6)は目標エコー1゜
(71はクラッタエコー1である。
Figure 2 shows the transmitted pulse signal (2) and received video signal (3)
In this example, (6) is the target echo 1° (71 is the clutter echo 1).

第2図において、送信パルス信号(21のタイミングで
捜索レーダ(11から電磁波を放射し、航空機等の点目
標で反射された電磁波は送信パルス信号(2)とほぼ同
じパルス幅の目標エコー1(6)として得られる。また
山や大きな建物等で反射された電磁波け、送信パルス信
号(2)よりも大きなパルス幅のクラッタエコー1(7
)として得られる。
In Fig. 2, an electromagnetic wave is emitted from the search radar (11) at the timing of the transmission pulse signal (21), and the electromagnetic wave reflected by a point target such as an aircraft is a target echo 1 (with approximately the same pulse width as the transmission pulse signal (2)). Also, electromagnetic waves reflected by mountains, large buildings, etc., clutter echo 1 (7) with a pulse width larger than the transmitted pulse signal (2)
) is obtained as

第3図は第1図に示す従来のレーダ捜索装置のPPI衣
示器(5)のCFIT管面上の1表示例を示す図であっ
て、(8)はPPI表示例、(9)は目標エコー2、(
l[IFiクラッタエコー2である。
FIG. 3 is a diagram showing an example of display on the CFIT tube surface of the PPI display device (5) of the conventional radar search device shown in FIG. 1, in which (8) is an example of PPI display, and (9) is Target echo 2, (
l [IFi clutter echo 2.

第3図において、航空機等の点目標は送信パルス信号(
21のパルス幅とほぼ同じ大きさの目標エコー 1 (
61,目標エコー2(9)として表示δれる。″また山
等のクラッタは送信パルス信号(2)のパルス幅よす大
きなりラツタエコー1(71,クラッタエコー2a1と
して表示される。また強度(振幅)的にもクラッタの反
射が大きい。
In Figure 3, a point target such as an aircraft is a transmitted pulse signal (
The target echo 1 (
61, displayed as target echo 2 (9). ``In addition, clutter such as mountains has a pulse width larger than the pulse width of the transmission pulse signal (2) and is displayed as a rattle echo 1 (71, clutter echo 2a1). Also, the reflection of the clutter is large in terms of intensity (amplitude).

従って、第1図1に示す様な従来のレーダ捜索装置では
pp工表示器(5)のCRT管面上で航空機等の目標を
探知する事は熟練を要し、また困難でもあった。
Therefore, with the conventional radar search device as shown in FIG. 1, it is difficult and requires skill to detect targets such as aircraft on the CRT screen of the PP display (5).

〔発明の概要〕[Summary of the invention]

この発明は、受信ビデオ信号を2次元の画像として扱い
、同一の塊りに対して領域番号(ラベル)を付与し領域
番号毎σ)面積を計測し1面積の大きい領域番号の2値
ビデオ信号を消去し1面積の不埒な領域番号の2値ビデ
オ信号をPPI表示器上に表示する事によって、従来の
欠点を除去する手段を提供するものである。
This invention treats a received video signal as a two-dimensional image, assigns an area number (label) to the same block, measures the area for each area number (σ), and generates a binary video signal with an area number that has a larger area. The present invention provides a means for eliminating the drawbacks of the conventional method by displaying a binary video signal of an unreasonable area number of one area on a PPI display.

〔発明の実施例〕[Embodiments of the invention]

第4図は、第3図に示す表示例を2値化した時のビデオ
配列例を説明するための図であり、01ノは2値ビデオ
配列例、azは画素である。
FIG. 4 is a diagram for explaining a video arrangement example when the display example shown in FIG. 3 is binarized, where 01 is an example of a binary video arrangement, and az is a pixel.

第4図において1画素0zの横方向の太き芒はルンジビ
ンに相当し、縦はレーダの送信周期とし。
In FIG. 4, the horizontal thick awn of one pixel 0z corresponds to a lungi bin, and the vertical one is the radar transmission period.

第3図に示j表示例を2値化すると第4図に示す画素配
列例となる。
When the display example shown in FIG. 3 is binarized, it becomes the pixel arrangement example shown in FIG. 4.

第5図は第1図に示す領域番号付与回路のの動作の概略
を説明するだめの図であり、巣5図(a)は領域検出窓
を説明するための図、第5図(11))は領域番号記憶
1/ジスタ列を説明するための図であって。
FIG. 5 is a diagram for explaining the outline of the operation of the area number assigning circuit shown in FIG. 1, and FIG. 5(a) is a diagram for explaining the area detection window. ) is a diagram for explaining area number storage 1/register string.

oiFi領域検出窓、04は領域番号記憶レジスタ列で
ある。
The oiFi area detection window 04 is an area number storage register string.

領域検出窓031において、Aはこれ力)ら領域番号を
付与される画素の位置にあり、Cれに隣接し既に領域番
号が付与式れた画素の位置にB、  0.  D。
In the area detection window 031, A is located at the position of a pixel to which an area number has been assigned, and B, 0. D.

Eがある。また、躇離方向の画素幅をm画素とすると、
既に領域番号が付与含れた画素の領域番号は、@域番号
記憶用しジスタ列Iによって−i+4去m十1画素分に
わたって記憶はれている。A、 B。
There is an E. Also, if the pixel width in the direction of separation is m pixels, then
The area numbers of the pixels to which area numbers have already been assigned are stored in the area number storage register column I over -i+4 m11 pixels. A, B.

0、  D、  Bの位置にある2値ビデオの値を各々
The binary video values at positions 0, D, and B, respectively.

F(A)  F(琲 ”(C)  、F(Ill、  
F(E)とし、B、O,D。
F(A) F(琲”(C), F(Ill,
F(E), B, O, D.

Eの位置にある画素の領域番号を示j領域記憶レジスタ
列Iの内容を各々Ru+ e R(m  * ) + 
n(ml IR(m+1)  とし、芒らにAの位置に
ある画素の領域番号をNとすると、領域番号付けの理論
は下記のOI式〜(9)式で表現される。
Indicates the area number of the pixel at position E, and the contents of j area storage register column I are respectively Ru+ e R(m*) +
When n(ml IR(m+1)) and the area number of the pixel at position A in the awn are N, the theory of area numbering is expressed by the following OI equations to equations (9).

F(A) = 0  リN=0           
・・・1llF(A)= 1・F(B)−F(C庁F(
1)庁F (B)= 0→1i=k  ・・・(2)但
し、には領域番号記憶レジスタ列(141に記憶されて
いない領域番号のうちで最小の自然数、F(A)=F’
(B)=1−1”(cl=F(nl−’F(gl−09
N= R(n =(31F (A)= F (ml= 
1 、 F (cl= F (D)= 0→N=R(m
l 1 )”’(”F(Al=FfD)=1− F(0
)=0  →N = R(ml     −(51F(
Al−F(cl−1、F(Bl−F(Dl= F(E)
−0→N=R(m−1)・・・(6) ’(A)=F(0)=FtD>=’−=)M=R(m−
1)−(1)F (A)= P (C)= F (E)
= 1 、 F(Dl−’  →N=R(m  1)。
F(A) = 0 RiN=0
...1llF(A)=1・F(B)-F(C Agency F(
1) Agency F (B) = 0 → 1i = k ... (2) However, is the area number storage register column (the smallest natural number among the area numbers not stored in 141, F (A) = F '
(B)=1-1"(cl=F(nl-'F(gl-09
N= R(n=(31F(A)=F(ml=
1, F (cl= F (D)= 0→N=R(m
l 1 )"'("F(Al=FfD)=1-F(0
)=0 →N=R(ml −(51F(
Al-F(cl-1, F(Bl-F(Dl=F(E)
-0→N=R(m-1)...(6) '(A)=F(0)=FtD>='-=)M=R(m-
1)-(1)F (A)=P (C)=F (E)
= 1, F(Dl-' →N=R(m 1).

R(ml 1 )=R(m−1)         ’
−181F(A)=F(Bl=F(c)= ’ 、’(
D)−F(El−0=)N =R(m−i ) 。
R(ml1)=R(m-1)'
-181F(A)=F(Bl=F(c)=','(
D)-F(El-0=)N=R(m-i).

R(+i=R(ro−1)             
 ・・−(91従って、領域検出窓a3でスキャンした
事は8連−結でスキャンした事と同等となり、2値ビデ
オ信号が連結している部分は同一の領域番号が付与され
る。
R(+i=R(ro-1)
(91) Therefore, scanning with the area detection window a3 is equivalent to scanning with 8 concatenations, and the same area number is assigned to the portion where the binary video signals are concatenated.

第6図は第4図の2値ビデオ配列例αbを入力した時に
第1図に示す領域番号付与回路@の出力の概略を説明す
るだめの図であり、 69は領域番号付与例、 6eは
領域番号1.鰭は領域番号2.鱈は領域番号3.Q9I
r1領域番号4である。
FIG. 6 is a diagram for explaining the outline of the output of the area numbering circuit @ shown in FIG. 1 when the binary video array example αb of FIG. 4 is input, 69 is an example of area numbering, 6e is an example of area numbering. Area number 1. The fin is area number 2. Cod is area number 3. Q9I
The r1 area number is 4.

第7図に示す2値ビデオ信号a11Fi、第4図に示す
2値ビデオ配列例α1+に相当し、2値ビデオ配列例0
11を領域番号付与回路(至)に入力すると、(11式
〜(9)式によって目標エコー1(61H領域番号20
D、クラッタエコー1(7)は領域番号IQG、  目
標エコー2(9)は領域番号409.クラッタエコ−2
01!’i領域番号3QInとして出力される。尚、上
端と下端のクラッタエフ−201は、第1図に示す捜索
レーダi11がベアリング方向にエンドレスで回転して
いるため結合したビデオ信号として入力式れるため、第
6図に示す様に同一の領域番号30秒が付与される。
The binary video signal a11Fi shown in FIG. 7 corresponds to the binary video array example α1+ shown in FIG. 4, and corresponds to the binary video array example 0.
11 to the area number assigning circuit (to), the target echo 1 (61H area number 20
D, clutter echo 1 (7) has area number IQG, target echo 2 (9) has area number 409. clutter eco-2
01! 'i area number 3QIn is output. Note that the clutter F-201 at the upper and lower ends are in the same area as shown in FIG. 6 because the search radar i11 shown in FIG. 1 rotates endlessly in the bearing direction and is input as a combined video signal. A number of 30 seconds will be given.

第1図は、この発明の1実施例を示すものであって、■
は2値化回路、 Ollは2値ビデオ信号、器は領域番
号付与回路、(ハ)は領域番号信号、(財)は面積計測
回路、(ハ)は領域面積信号、翰は遅延領域番号信号、
@は表示判定回路、@は遅延回路、翰は遅延送信パルス
信号、mFi遅延ベアリングアンテナ角度信号、 C3
1)は2値表示ビデオ信号でおる。
FIG. 1 shows one embodiment of the present invention, which includes:
is a binarization circuit, Oll is a binary video signal, container is an area number assigning circuit, (c) is an area number signal, (goods) is an area measurement circuit, (c) is an area area signal, and 翺 is a delayed area number signal. ,
@ is display judgment circuit, @ is delay circuit, kiln is delayed transmission pulse signal, mFi delayed bearing antenna angle signal, C3
1) is a binary display video signal.

第7図において、受信ビデオ信号(3)を2値化回路■
で2値化し、2値ビデオ信号c21+ ’e生成する。
In Figure 7, the received video signal (3) is binarized by a circuit
to generate a binary video signal c21+'e.

領域番号付与回路いは、送信パルス毎に送信パルス信号
(2)が「1」から「0」になった時から「0」から「
1」になる時までの間、(11式から(9)式に従って
1画素毎に領域番号を付与し、領域番号信号(ハ)を生
成する。面積計測回路Qメは1画素毎に領域番号信号(
ハ)が0以外の時に該当する領域番号の面積を1増加芒
ぜ格納する。遅延回路(ハ)は領域番号信号(ハ)、送
信パルス信号(2)、ベアリングアンテナ角度信号(4
)の各々の信号を’14たけ遅延し、遅延領域番号信号
(イ)、遅延送信パルス信号器、遅延ベアリンクアンテ
ナ角度信号(至)を送出する。尚、  TddO1式に
よって表現でれる。但し、T(iは捜索レーダの送信繰
返し時間の整数倍とする。
In other words, the area number assigning circuit changes from "0" to "0" from the time the transmission pulse signal (2) changes from "1" to "0" for each transmission pulse.
1'', a region number is assigned to each pixel according to formulas (11 to (9)) and a region number signal (c) is generated.The area measuring circuit Qme assigns a region number to each pixel. signal(
c) When 0 is other than 0, the area of the corresponding area number is increased by 1 and stored. The delay circuit (C) receives the area number signal (C), the transmission pulse signal (2), and the bearing antenna angle signal (4).
) are delayed by 14 times, and a delayed region number signal (a), a delayed transmission pulse signal generator, and a delayed bare link antenna angle signal (to) are transmitted. In addition, it can be expressed by the TddO1 formula. However, T(i is an integral multiple of the transmission repetition time of the search radar.

Td〉θB /l)B θB ;捜索レーダのベアリング方向の送信ビーム幅 δB :捜索レーダのベアリング方向の回転速度面積計
測回路Q4は遅延領域番号信号(ハ)をアドレスとして
該当する領域番号の面積を領域面積信号(ハ)として送
出する。表示判定回路哨は領域面積信号(ハ)と基準面
積とを比較し、基準面積以上の時は無効、基準面積以下
の時は有効と判定し、無効時又は遅延領域番号信号が「
0」の時に「0」を、有効時には「1」の2値表示ビデ
オ信号01)全送出する。PPI表示器(5)は遅延送
信パルス信号@、遅延ベアリングアンテナ角度信号(至
)、2値表示ビデオ信号C311を受は表示する。
Td〉θB /l)B θB ; Transmission beam width δB in the bearing direction of the search radar: Rotational speed in the bearing direction of the search radar Area measuring circuit Q4 uses the delay area number signal (c) as an address to calculate the area of the corresponding area number. It is sent as a region area signal (c). The display judgment circuit compares the area area signal (c) with the reference area, and judges it as invalid when the area is greater than or equal to the reference area, and as valid when it is less than the reference area.
The binary display video signal 01), which is "0" when it is "0" and "1" when it is valid, is transmitted in its entirety. The PPI display (5) displays the delayed transmission pulse signal @, the delayed bearing antenna angle signal (to), and the binary display video signal C311.

第8図は第1図に示すPPI表示器(5)のCRT管面
上の表示例を示す図である。
FIG. 8 is a diagram showing an example of the display of the PPI display (5) shown in FIG. 1 on the CRT tube surface.

第8図において、第3図に示すクラッタエコー1 (7
1,クラッタエコー2帥は消去され、目標エコー 1 
+61.  目標エコー2(9)のみ表示嘔れる。
In FIG. 8, the clutter echo 1 (7
1. Two clutter echoes are erased and the target echo 1
+61. Only target echo 2 (9) is displayed.

〔発明の効果〕〔Effect of the invention〕

この様に、この発明によれば比較的簡単な信号処理で、
山や建物等のクラッタを抑圧し、航空機等の点目標のみ
を表示する事が出来るため、航空機等の探知が容易に出
来るためオペレータの負荷の軽減に大きく寄与すること
が出来る。
In this way, according to the present invention, with relatively simple signal processing,
Since clutter such as mountains and buildings can be suppressed and only point targets such as aircraft can be displayed, aircraft can be easily detected, which can greatly contribute to reducing the burden on the operator.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の装置の構成の一例を示j(!¥1.第(
9)J^・ 2図は送信パルス信号と受信ビデオ信号の関係の一例を
示す図、第3し1け従来の装置の1表示例を示す図、第
4図はビデオ配列例を示す図、第5図は領域番号付与回
路の動作の概略を説明するための図、第6図は領域番号
付与回路の出力の概略を説明するための図、第1図はこ
の発明の1実施例の構成を示す図、第8図はこの発明の
装置の1表示例を示す図であって、(11は捜索レーダ
、(5)はPPI表示器、(2)は2 (iff化回路
、 (221は領域番号付与回路、Q4)は面積計測回
路、@は表示’1111000QQは遅延回路である。 尚9図中、同一あるいは相当部分には、同一符号を付し
て示しである。
Figure 1 shows an example of the configuration of a conventional device.
9) J^・ Figure 2 is a diagram showing an example of the relationship between a transmitted pulse signal and a received video signal, Figure 3 is a diagram showing an example of a display of a conventional device, and Figure 4 is a diagram showing an example of a video arrangement. FIG. 5 is a diagram for explaining the outline of the operation of the area number assigning circuit, FIG. 6 is a diagram for explaining the outline of the output of the area number assigning circuit, and FIG. 1 is the configuration of one embodiment of the present invention. FIG. 8 is a diagram showing one display example of the device of the present invention, in which (11 is a search radar, (5) is a PPI display, (2) is a 2 (if conversion circuit), (221 is a The area number assigning circuit, Q4) is an area measuring circuit, and the @ symbol '1111000QQ is a delay circuit. In Figure 9, the same or corresponding parts are indicated by the same reference numerals.

Claims (1)

【特許請求の範囲】[Claims] 航空機等の目標物体からの反射による受信ビデオ信号を
得るための捜索レーダと、この捜索レーダの受信ビデオ
信号を2値化する2値化回路と、この2値化回路の2値
ビデオ信号に領域番号を付与する領域番号付与回路と、
この領域番号付与回路の領域番号毎に面積(画素数)を
計測する面積計測回路と、この領域番号付与回路の領域
番号信号を遅延する遅延回路と、この遅延回路の遅延領
域番号信号毎の面積に応じて、遅延領域番号信号を有効
、又は無効と判定する表示判定回路と、この表示判定回
路の2値表示ビデオをCRTの管面上に表示するPPI
表示器とを備えたことを特徴とするレーダ捜索装置。
A search radar for obtaining a received video signal reflected from a target object such as an aircraft; a binarization circuit for binarizing the received video signal of the search radar; an area numbering circuit that assigns a number;
An area measuring circuit that measures the area (number of pixels) for each area number of this area numbering circuit, a delay circuit that delays the area number signal of this area numbering circuit, and an area for each delayed area number signal of this delay circuit. A display determination circuit that determines whether a delay area number signal is valid or invalid according to
A radar search device comprising a display device.
JP59187469A 1984-09-07 1984-09-07 Search radar Pending JPS6166175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59187469A JPS6166175A (en) 1984-09-07 1984-09-07 Search radar

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59187469A JPS6166175A (en) 1984-09-07 1984-09-07 Search radar

Publications (1)

Publication Number Publication Date
JPS6166175A true JPS6166175A (en) 1986-04-04

Family

ID=16206625

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59187469A Pending JPS6166175A (en) 1984-09-07 1984-09-07 Search radar

Country Status (1)

Country Link
JP (1) JPS6166175A (en)

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