JPS6163163A - Signal binary coding device - Google Patents

Abstract

PURPOSE:To make action of plural level comparators by one level comparator by making the reference level of a level comparator for binary coding input signals variable according to the object of reading of a picture etc. CONSTITUTION:Values of resistance of resistances R9, R10...R14 are determined so as to set reference level when switches B, C, D, E, F are closed singly, for instance, to 6, 5, 3, 2. 5, 2V. When the switch B is closed and the reference level is selected to 6V, a comparative output becomes high-order when output of an amplifier is more than 6V. Accordingly, a level comparator 14 is used for detecting the lamp state. When reading an original, if N is the number of times of reading scanning made by 1 line, a gain of the amplifier 1 is deter mined by reading scanning until (N-1) times, and binary coding of the read signal is made by Nth reading scanning. By making determination of amplified gain and binary coding of read signal alternately, binary coding of picture reading signal 11 is made while keeping gain of the amplifier properly at all times.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a signal binarization device used to binarize a document reading signal in, for example, a facsimile machine.

Conventional Structures and Problems Therewith, for example, a facsimile machine uses a signal binarization device that binarizes and outputs an analog image signal read by a document reading section of the facsimile machine.

As shown in FIG. 1, a conventional signal binarization device of this type includes an amplifier 1, a plurality of level comparators 6, 6°7.8, a selection circuit 9, an active voltage converter 2, and a potential holding device. capacitor 3
, and a variable attenuator 4.

An image reading signal 11 from the original reading section is amplified by an amplifier 1 and distributed and input to each comparison input of a plurality of level comparators 6, 6, 7.8. The comparator circuit 5°6.7.8 compares the input signal with a reference level and binarizes it. The binarized output from each comparator 5, 6, 7.8 is output to a selection circuit 9.
is input.

The selection circuit 9 selects one of the binary outputs based on a control signal 10 from the outside. Then, the selected binary output of 1 becomes the output signal 12 of the signal binary conversion device.

On the other hand, the amplifier 1 is subjected to automatic gain control (AGC) so that the peak level of its amplified output becomes a predetermined level. This gain control is performed by active voltage converter 2. Voltage holding capacitor 3. This is done by a variable attenuator 4.

The output voltage of the amplifier 1 is applied to the potential holding capacitor 3 via the active voltage converter 2 and the diode 13. The potential holding capacitor 3 holds a potential corresponding to the peak value of the output voltage of the amplifier 1. The attenuation rate of the variable attenuator 4 is controlled by this holding potential.

Thereby, the peak level of the read signal input to the level comparators 5, 6, 7.8 can always be maintained at an appropriate level. In this case, the accuracy of the gain control of the amplifier 1 depends on the accuracy of the variable degree attenuator 4. Therefore, the variable attenuator 4 must be of particularly high precision.

The plurality of level comparators 6, 6. Different reference levels are input to each of the reference inputs a and 8, respectively. Each reference level is resistor R1 and R2, R3 and R4, R5 and R
6, R7 level is input. Each reference level is a resistance R
1 and R2, R3 and R4, R5 and Re, and R7 and R8 are set individually for each comparator.

The threshold value for binarizing the read signal 11 is different for each comparator. The plurality of level comparators 5, 6, and 7.8 are used depending on the purpose, with the comparator 6 being used for detecting the lamp state, the comparator 6 being used for colored originals, and the comparator 7 being used for normal originals. The comparators 8 can be used for thin originals. The lamp condition detection comparator 6 is given a high reference level suitable for detecting insufficient light intensity or disconnection of the original illumination lamp, and the colored original comparator 6 is given a A slightly lower reference level is given to match the level of the read signal of the image drawn on the image.

Further, the comparator 7 for normal originals is given an intermediate reference level that almost matches the level of the read signal from an image with average contrast, and the comparator 8 for thin originals is given a whitish reference level. A higher reference level is given in accordance with the level of the read signal from the original image.

As described above, the conventional signal binarization device uses a plurality of level comparators 5.6. It was designed to handle the situation.

However, the conventional signal binarization device described above includes a plurality of level comparators for binarizing an input signal such as an image reading signal, and a peak level t- of the signal input to the plurality of level comparators. A highly accurate variable attenuator is required to maintain 1LE, which increases the number of parts, increases the cost of the device, and complicates the configuration.
Furthermore, a problem arises in that power consumption also increases.

OBJECT OF THE INVENTION The present invention solves the above-mentioned conventional problems, and makes it possible to significantly reduce the number of level comparators used to binarize an input signal such as an image reading signal without deteriorating its function. It is an object of the present invention to provide a signal binarization device that can reduce the number of parts, thereby reducing costs, simplifying the configuration, and reducing power consumption.

Structure of the Invention The present invention enables multiple level comparisons by varying the reference level of a level comparator for binarizing an input signal such as an image reading signal depending on the purpose of reading the image or the reading conditions. The purpose of the present invention is to enable the operation of the device to be carried out by a single level comparator, thereby achieving the above-mentioned object.

DESCRIPTION OF THE EMBODIMENTS FIG. 2 shows the configuration of a signal binarization device according to an embodiment of the present invention. Level comparator 141 selection circuit 9. Diode 13. Potential holding capacitor 3,
and a variable attenuator 4.

An amplifier 1 amplifies an image reading signal 11 input from a document reading section of a facsimile machine. This signal 11 is an analog signal. The level comparator 14 compares the amplified analog image reading 11 with a reference level and binarizes it. This binarized signal is the output signal 1 of the signal binarization device.
It becomes 2.

The selection circuit 9 includes a large number of analog switches I B IC
,D,1! :, has F. These switch people and B
is controlled to open or close by an external selection control signal 1o. In this case, only one of the switches B-F is selected and closed. Also, the switch person opens and closes in synchronization with switch C, and remains open at other times. Diode 13. The potential holding capacitor 3 and the variable attenuator 4 control the amplification gain of the amplifier 1 by negative feedback. A type of automatic gain control (AG)
C:) Form a circuit. This gain control is performed based on the comparison output of the leveler 14.

Here, among the switches ON to F of the selection circuit 9, the switch connects the comparison output of the level comparator 14 and the automatic gain control circuit. Further, the switches BF select one of the resistors R10 to Rl4 and connect it to the resistor Rg. As a result, a variable voltage dividing circuit in which the voltage dividing ratio is variably controlled in a stepwise manner is formed. Then, the voltage divided by this divisible voltage circuit is the comparison voltage G of the level comparator 14.
is given as a reference level. As a result, the reference level of the level comparator 140, that is, the threshold value for performing binarization, is variably controlled in a stepwise manner.

Next, the operation will be explained.

First, the above switches B, C, D,! ! , , the reference levels when F are single closed are eV and 6V, respectively.

3V, 2.6V, 2V, the above resistance Rg
and the respective resistance values of R10 to R14 are determined in advance.

Now, close switch B and set the reference level to the highest 6v.
If you select , the comparison output will be 'H' (high level) when the output of amplifier 1 is 6V or higher.This will check whether there is enough light from the lamp for document illumination or if the lamp is broken. It is possible to determine whether or not the

That is, the level comparator 14 at this time operates as the above-mentioned lamp state detection comparator.

Next, the case of reading a document will be explained. The original is read by scanning. This reading scanning difference is performed multiple times for each line of the document. If the number of reading scans performed on one line is N (N is 2 or more), the amplifier 1 is
The amplification gain is determined, and the read signal is binarized during the final N-th read scan. When the last N-th reading scan is completed, the document is advanced by one line and the same process is repeated again. In this way, by alternately determining the amplification gain of the amplifier 1 and binarizing the read signal, the image read signal
Binaryization of 1 is performed.

Here, when determining the amplification gain of amplifier 1, the switch is closed. Also, close switch C and select the reference level to 5V. In this state, reading scans are performed (N-1) times. When the comparison output of the comparator 14 becomes "H" during these (N-1) reading scans, the holding capacitor 3 is charged from the comparison output via the switch and the diode 13. As a result, the potential held in the capacitor 3 increases with a predetermined time constant.

As the holding potential increases, the attenuation rate by the variable attenuator 4 increases and the amplification gain of the amplifier 1 decreases. As a result, the gain of the amplifier 1 is controlled so that the peak level of its amplified output becomes the reference level of 6V while (N-1) reading scans are performed. Further, the gain control at this time is performed by a kind of negative feedback from the comparison output of the level comparator 14 for performing binarization. Therefore, the variable attenuator 4 only needs to operate linearly, and its accuracy may be low. Therefore, the variable attenuator 4 can be constructed very simply using, for example, a single MO8 field effect transistor.

On the other hand, when the read signal 11 is to be binarized, the switch is opened. Also, any one of switches D, E, F
Close one and set the reference level to 3V', 2.5V.

Choose from 2v. Then, using this selected reference level, the read signal during the N-th read scan is binarized. At this time, the switch person is open,
The potential of the potential holding capacitor 13 continues to be held, and thereby the amplification gain determined during the (N-1)th reading scan is held. In this case, the reference level at which the binarization is performed is appropriately selected depending on the condition of the document. For example, when converting a read signal from a thin document into a binary value, it is preferable to close switch D and select a slightly higher reference level of 3V. Further, when converting a read signal from an ordinary original into a binary value, it is preferable to close the switch E and select the intermediate level of 2.6 V as the reference level. Further, when converting a read signal from a dark original into a binary value, it is preferable to close switch F and select a slightly lower reference level of 2V. As mentioned above,
Binarization corresponding to the seeding conditions can be performed using one level comparator 14.

As described in detail, according to the present invention, the number of level comparators for binarizing a signal can be significantly reduced without deteriorating its function, and the number of input level comparators to the level comparators can be significantly reduced. A variable attenuator to maintain the appropriate peak level of the signal being transmitted can be easily constructed using, for example, a single transistor.This reduces the number of parts and reduces costs. This has the effect of reducing power consumption.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the configuration of a conventional signal binarization device, and FIG. 2 is a circuit diagram of a signal binarization device showing an embodiment of the present invention. 1...Amplifier, 3...Potential holding capacitor, 4...Variable attenuator, 10...
... Selection control signal, 11 ... Read signal, 12
...Output signal, 14...Level comparator, A to F...Analog switch.

Claims (3)

[Claims] (1) An amplifier that amplifies an input signal, a level comparator that compares the signal amplified by this amplifier with a reference level and binarizes it, a means for variably controlling the reference level of this comparator, and A signal binarization device comprising means for negative feedback control of amplification gain based on the comparison output of the level comparator. (2) means for alternately performing the operation of binarizing the input signal and the operation of controlling the amplification gain; and means for maintaining the controlled amplification gain while the binarization operation is being performed; A signal binarization device according to claim 1, having the following. (3) The signal binarization device according to claim 1 or 2, further comprising a voltage dividing circuit whose voltage dividing ratio is controlled by an analog switch as means for varying the reference level.