JPS6161527B2 - - Google Patents
Info
- Publication number
- JPS6161527B2 JPS6161527B2 JP14863180A JP14863180A JPS6161527B2 JP S6161527 B2 JPS6161527 B2 JP S6161527B2 JP 14863180 A JP14863180 A JP 14863180A JP 14863180 A JP14863180 A JP 14863180A JP S6161527 B2 JPS6161527 B2 JP S6161527B2
- Authority
- JP
- Japan
- Prior art keywords
- inductive load
- voltage
- transistor
- diode
- load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000001939 inductive effect Effects 0.000 claims description 15
- 238000009877 rendering Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 5
- 230000001052 transient effect Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F7/00—Magnets
- H01F7/06—Electromagnets; Actuators including electromagnets
- H01F7/08—Electromagnets; Actuators including electromagnets with armatures
- H01F7/18—Circuit arrangements for obtaining desired operating characteristics, e.g. for slow operation, for sequential energisation of windings, for high-speed energisation of windings
Landscapes
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
- Power Conversion In General (AREA)
Description
【発明の詳細な説明】
この発明は、パルスモータのコイル、プリンタ
のワイヤドライブソレノイド等の誘導性負荷を作
動状態から不作動状態とした時に誘導性負荷の両
端に発生するフライバツク電圧の減衰回路に関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit for attenuating flyback voltage generated across an inductive load such as a coil of a pulse motor or a wire drive solenoid of a printer when the inductive load is changed from an activated state to an inactive state. .
従来、トランジスタ等の半導体スイツチング素
子で誘導性負荷を作動状態から不作動状態に切換
える時、誘導性負荷の両端に発生するフライバツ
ク電圧による半導体スイツチング素子の損傷を防
止するための手段として、第1図および第2図の
ような方式が知られる。 Conventionally, when switching an inductive load from an operating state to an inactive state using a semiconductor switching element such as a transistor, a method of preventing damage to the semiconductor switching element due to flyback voltage generated across the inductive load has been proposed. A method as shown in FIG. 2 is also known.
すなわち第1図の方式においては、スイツチン
グ用のトランジスタTr1を不導通にすると、抵抗
rとインダクタンスLを持つ誘導性の負荷1とダ
イオードD1とで閉ループが形成され、発生した
フライバツク電圧がこの閉ループでクランプされ
減衰するのでトランジスターTr1の損傷が防止さ
れる。 That is, in the system shown in Fig. 1, when the switching transistor Tr 1 is made non-conductive, a closed loop is formed between the inductive load 1 having a resistance r and an inductance L, and the diode D 1 , and the flyback voltage generated is caused by this. Damage to transistor Tr 1 is prevented because it is clamped and attenuated in a closed loop.
このときのトランジスタTr1のコレクタVA点
の電圧と、負荷電流iLの時間変化を見ると、トラ
ンジスタTr1が不導通となつた直後のVA点の電
圧は電源電圧VCにダイオードD1のフオワード電
圧VFが加わつたものとなる。また、iLは過渡現
象において周知の式EXP(−rt/L)(tは時
間)の従い減衰時間T1で減衰するが、なだらか
な減衰であるため例えばドツトプリンタのワイヤ
ードライブの様な高速動作が要求される回路にお
いてはソレノイドが作動信号に追従できないとい
う欠点があつた。この欠点を除くために考案され
た第2図の方式は、原理的には第1図の方式と同
じであるがダイオードD1と逆向きに且つ直列に
ツエナーダイオードZDを設けることにより、第
4図A,Bに示すようにツエナーダイオードZD
の両端に加わる電圧がVZを超すまで負荷の両端
を定電圧VZに保持し、周知の式−LdiL/dt=V
(VはインダクタンスLの両端の電圧)に示され
るようにインダクタンスLの電流iLの減衰速度は
Vに比例し、このときV=VZであるので減衰時
間T2を短縮できる。 Looking at the voltage at the collector point VA of the transistor Tr 1 and the time change of the load current iL at this time, the voltage at the VA point immediately after the transistor Tr 1 becomes non-conductive is equal to the power supply voltage VC and the forward voltage of the diode D 1 . V F is added. In addition, in a transient phenomenon, iL attenuates with a decay time T 1 according to the well-known formula EXP(-rt/L) (t is time), but because it is a gradual attenuation, high-speed operation such as the wire drive of a dot printer is The drawback was that the solenoid could not follow the activation signal in the required circuit. The method shown in FIG. 2 devised to eliminate this drawback is in principle the same as the method shown in FIG . Zener diode ZD as shown in Figures A and B
Keep both ends of the load at a constant voltage V Z until the voltage applied across the inductance L exceeds V Z , and as shown in the well-known formula -LdiL/dt=V (V is the voltage across the inductance L), The decay speed of the current iL is proportional to V, and since V=V Z at this time, the decay time T 2 can be shortened.
しかし第2図の方式においても、ツエナーダイ
オードZDに加わる電圧の負担が大きく、ツエナ
ーダイオードZDが発熱し破損することがあり、
そのため定格の大きいツエナーダイオードを必要
としコストがかさむという欠点があつた。 However, even in the method shown in Figure 2, the voltage applied to the Zener diode ZD is large, and the Zener diode ZD may generate heat and be damaged.
Therefore, a Zener diode with a high rating is required, which has the disadvantage of increasing costs.
この発明は上記従来のものの欠点を除去するこ
とを目的とする。 The object of the present invention is to eliminate the drawbacks of the above-mentioned conventional devices.
この発明の実施例を説明すると、第5図におい
て、抵抗rとインダクタンスLとを持つ負荷1の
一方の端子にトランジスタTr1のコレクタを接続
し、他方の端子にトランジスタTr2のエミツタを
接続する。トランジスタTr1は前記したように負
荷1を作動または不作動とするためのものであ
り、トランジスタTr2はスイツチングすることに
より電流iLを一定にするためのものである。トラ
ンジスタTr1のコレクタとトランジスタTr2のコ
レクタとの間に前記第2図に示したダイオード
D1とツエナーダイオードZDの直列回路を接続す
る。また、トランジスタTr2のコレクタには負荷
1作動時の電流と逆向きのダイオードD2を介し
てアースするように接続し、負荷1動作時の電流
をフライホールする。トランジスタTr1,Tr2の
ベースに接続した切換制御回路SCは、負荷1を
作動させるときはトランジスタTr1,Tr2の両方
のベースに電圧を与えそれぞれを導通させ、負荷
1を作動状態から不作動状態へ切り換えるときは
トランジスタTr1,Tr2の両方のベース電流を同
時に零にし、それぞれを非導通とする。 To explain an embodiment of the present invention, in FIG. 5, the collector of a transistor Tr 1 is connected to one terminal of a load 1 having a resistance r and an inductance L, and the emitter of a transistor Tr 2 is connected to the other terminal. . The transistor Tr 1 is used to activate or deactivate the load 1 as described above, and the transistor Tr 2 is used to make the current iL constant by switching. A diode shown in FIG. 2 is connected between the collector of transistor Tr 1 and the collector of transistor Tr 2 .
Connect the series circuit of D 1 and Zener diode ZD. Further, the collector of the transistor Tr 2 is connected to the ground through a diode D 2 having a direction opposite to that of the current when the load 1 is operating, so that the current when the load 1 is operating is fly-hauled. When operating load 1 , the switching control circuit SC connected to the bases of transistors Tr 1 and Tr 2 applies voltage to the bases of both transistors Tr 1 and Tr 2 to make them conductive, thereby switching load 1 from an operating state to an inactive state. When switching to the operating state, the base currents of both transistors Tr 1 and Tr 2 are simultaneously set to zero, making each of them non-conductive.
以上の構成において、スイツチング制御回路
SCによりトランジスタTr1,Tr2を導通させると
負荷1が作動状態となる。 In the above configuration, the switching control circuit
When the transistors Tr 1 and Tr 2 are made conductive by SC, the load 1 becomes activated.
このとき、ダイオードD1のはたらきでダイオ
ードD1とツエナーダイオードZDの直列回路には
電流は流れない。 At this time, due to the function of diode D1 , no current flows through the series circuit of diode D1 and Zener diode ZD.
また、例えば高周波パルス電圧で負荷1を作動
させる場合、パルス電圧の間隙時間にインダクタ
ンスLの両端に生じる電圧をダイオードD2でフ
ライホールする。 Further, for example, when the load 1 is operated with a high-frequency pulse voltage, the voltage generated across the inductance L during the gap time between the pulse voltages is fly-hauled by the diode D2 .
さて、切換制御回路SCによりトランジスタ
Tr1,Tr2を同時に非導通にすると、負荷1は不
作動になり、そのときインダクタンスLの両端に
生じるフライバツク電圧は、トランジスタTr2が
非導通になつたことにより、第7図に示すよう
な、負荷1、ツエナーダイオードZD、ダイオー
ドD1、電源Vc、そしてダイオードD2で形成され
るループを通り、このときの各点の電位は第8図
のようになる。 Now, with the switching control circuit SC, the transistor
When Tr 1 and Tr 2 are made non-conductive at the same time, the load 1 becomes inactive, and the flyback voltage generated across the inductance L becomes as shown in Fig. 7 because the transistor Tr 2 becomes non-conductive. It passes through a loop formed by load 1, Zener diode ZD, diode D 1 , power supply Vc, and diode D 2 , and the potential at each point at this time becomes as shown in FIG.
すなわち、負荷1の両端の電圧はV4−V5=Vc
+Vzとなり、周知の式−LdiL/dt=V(Vはイン
ダ
クタンスLの両端の電圧)に示されるようにイン
ダクタンスLの電流iLの減衰速度はVに比例し、
このときV=Vc+Vzであるので、前記第2図の
回路に較べ第6図A,Bに示すように電流iLの減
衰時間T3は短縮される。 In other words, the voltage across load 1 is V 4 −V 5 =Vc
+Vz, and as shown in the well-known formula -LdiL/dt=V (V is the voltage across the inductance L), the decay rate of the current iL in the inductance L is proportional to V,
At this time, since V=Vc+Vz, the decay time T3 of the current iL is shortened as shown in FIGS. 6A and 6B compared to the circuit shown in FIG. 2.
以上のように、この発明によれば誘導性負荷を
作動状態から不作動状態に切り換えたときその負
荷の両端に発生するフライバツク電圧をツエナー
ダイオード、ダイオード、電源とで形成される経
路でクランプするようにしたので、ツエナーダイ
オードの消費電力の一部を電源が負担しツエナー
ダイオードの発熱が低減され、従つてツエナーダ
イオードとして定格電圧の大きいものを使用する
必要がなくコストを低減できるとともに、誘導性
負荷の両端にはツエナーダイオードの両端の電圧
と電源電圧とが加わり、従つて従来よりも大きい
電圧となるためフライバツク電圧をさらに速く減
衰させるので、パルスモータの励磁コイルやドツ
トプリンタのワイヤドライブソレノイド等の誘導
性負荷において高速動作を可能とし性能を向上さ
せる効果がある。 As described above, according to the present invention, when an inductive load is switched from an operating state to an inactive state, the flyback voltage generated across the load is clamped by a path formed by a Zener diode, a diode, and a power supply. As a result, part of the power consumption of the Zener diode is borne by the power supply, and the heat generation of the Zener diode is reduced.Therefore, there is no need to use a Zener diode with a high rated voltage, which reduces costs and reduces the need for inductive loads. The voltage across the Zener diode and the power supply voltage are applied to both ends of the zener diode, and the voltage is therefore higher than before, causing the flyback voltage to attenuate more quickly. This has the effect of enabling high-speed operation and improving performance under heavy loads.
尚、上記実施例において直列に接続したダイオ
ードとツエナーダイオードは、1つの双方向ツエ
ナーダイオードで置き換えてもよい。 Note that the diode and Zener diode connected in series in the above embodiment may be replaced with one bidirectional Zener diode.
第1図、第2図は従来のフライバツク電圧の減
衰回路の図、第3図、第4図のAはそれぞれ第1
図、第2図の回路における電圧の過渡図、第3、
第4図のBはそれぞれ第1図、第2図の回路にお
ける電流の過渡図、第5図はこの発明のフライバ
ツク電圧の減衰回路の回路図、第6図Aは第5図
の回路における電圧の過渡図、第6図のBは第5
図の回路における電流の過渡図、第7図は第6図
において、負荷を不動作状態にした時フライバツ
ク電流が通過する経路を示す図、第8図は第7図
の各点の電位を示す図である。
図において、1は負荷、Tr1,Tr2はトランジ
スタ、D1,D2はダイオード、ZDはツエナーダイ
オード、SCは切換制御回路である。
Figures 1 and 2 are diagrams of conventional flyback voltage attenuation circuits, and A in Figures 3 and 4 respectively shows the first attenuation circuit.
3. Voltage transient diagram in the circuit of FIG. 2,
B in FIG. 4 is a current transient diagram in the circuits shown in FIGS. 1 and 2, respectively, FIG. 5 is a circuit diagram of a flyback voltage attenuation circuit of the present invention, and FIG. 6A is a voltage diagram in the circuit shown in FIG. B in Figure 6 is the 5th transition diagram.
A transient diagram of the current in the circuit shown in Fig. 7. Fig. 7 shows the path through which the flyback current passes when the load is in an inactive state in Fig. 6. Fig. 8 shows the potential at each point in Fig. 7. It is a diagram. In the figure, 1 is a load, Tr 1 and Tr 2 are transistors, D 1 and D 2 are diodes, ZD is a Zener diode, and SC is a switching control circuit.
Claims (1)
いて、誘導性負荷の一端に誘導性負荷を作動また
は不作動とするように接続したトランジスタTr1
と、誘導性負荷の他端と電源との間に接続したト
ランジスタTr2と、誘導性負荷の作動電圧の極性
と逆方向のダイオードD1と順方向の定電圧ダイ
オードとを直列に配列し誘導性負荷の一端と電源
との間に接続した直列回路と、誘導性負荷の作動
電圧の極性と逆方向とし誘導性負荷の他端をアー
スするように接続したダイオードD2と、トラン
ジスタTr1,Tr2それぞれのベースに接続しトラ
ンジスタTr1,Tr2を同時に非導通とすることを
可能とした切換手段SC、とを備えたフライバツ
ク電圧の減衰回路。1 In a circuit that switches and drives an inductive load, a transistor Tr 1 is connected to one end of the inductive load so as to activate or deactivate the inductive load.
A transistor Tr 2 connected between the other end of the inductive load and the power supply, a diode D 1 with the polarity opposite to the operating voltage of the inductive load, and a constant voltage diode with the forward direction are arranged in series. A series circuit connected between one end of the inductive load and the power supply, a diode D 2 connected in the opposite direction to the polarity of the operating voltage of the inductive load and the other end of the inductive load grounded, and a transistor Tr 1 , A flyback voltage attenuation circuit comprising a switching means SC connected to each base of Tr 2 and capable of simultaneously rendering transistors Tr 1 and Tr 2 non-conductive.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14863180A JPS5771109A (en) | 1980-10-22 | 1980-10-22 | Attenuation circuit for flyback voltage |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14863180A JPS5771109A (en) | 1980-10-22 | 1980-10-22 | Attenuation circuit for flyback voltage |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5771109A JPS5771109A (en) | 1982-05-01 |
JPS6161527B2 true JPS6161527B2 (en) | 1986-12-26 |
Family
ID=15457102
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14863180A Granted JPS5771109A (en) | 1980-10-22 | 1980-10-22 | Attenuation circuit for flyback voltage |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5771109A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4329981A1 (en) * | 1993-09-04 | 1995-03-09 | Bosch Gmbh Robert | Method and device for controlling an electromagnetic consumer |
JP2003047287A (en) * | 2001-07-26 | 2003-02-14 | Auto Network Gijutsu Kenkyusho:Kk | Protective circuit |
JP2015065377A (en) * | 2013-09-26 | 2015-04-09 | カヤバ工業株式会社 | Electric circuit |
-
1980
- 1980-10-22 JP JP14863180A patent/JPS5771109A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5771109A (en) | 1982-05-01 |
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