JPS6160574U - - Google Patents
Info
- Publication number
- JPS6160574U JPS6160574U JP14395584U JP14395584U JPS6160574U JP S6160574 U JPS6160574 U JP S6160574U JP 14395584 U JP14395584 U JP 14395584U JP 14395584 U JP14395584 U JP 14395584U JP S6160574 U JPS6160574 U JP S6160574U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- latch
- display device
- circuit
- display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
Landscapes
- Color Television Image Signal Generators (AREA)
Description
図は本考案の実施例として本考案を電子ステイ
ル・カメラに適用した場合の電気回路のブロツク
図を示したものである。
１…撮像レンズ、２…絞り装置、３…シヤツタ
ー装置、４…絞り装置駆動回路、５…シヤツター
装置駆動回路、６…受光素子、７…シヤツター秒
時設定装置、８…絞り制御回路、９…撮像素子、
１０…撮像素子駆動回路、１１…処理回路、１２
…同期信号発生回路、１３…電子ビユーフアイン
ダー、１４…記録装置、１５…Ａ−Ｄ変換器、１
６…ラツチ回路、１７…分周器、１８…表示器駆
動回路、１９…表示器。
The figure shows a block diagram of an electric circuit when the present invention is applied to an electronic still camera as an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Imaging lens, 2... Aperture device, 3... Shutter device, 4... Aperture device drive circuit, 5... Shutter device drive circuit, 6... Light receiving element, 7... Shutter time setting device, 8... Aperture control circuit, 9... image sensor,
10...Image sensor drive circuit, 11...Processing circuit, 12
... Synchronization signal generation circuit, 13 ... Electronic view finder, 14 ... Recording device, 15 ... A-D converter, 1
6... Latch circuit, 17... Frequency divider, 18... Display drive circuit, 19... Display.
Claims (1)
器における表示装置であつて、前記垂直同期信号
に基づく所定周期のラツチ信号を形成するラツチ
信号形成回路と、非周期的に変動する表示用情報
を前記ラツチ信号に応答してラツチするラツチ回
路と、該ラツチ回路でラツチされた表示用情報を
表示する表示器とを、具えたことを特徴とする表
示装置。 A display device for a video device that handles a video signal including a vertical synchronization signal, the display device comprising: a latch signal forming circuit that forms a latch signal with a predetermined period based on the vertical synchronization signal; 1. A display device comprising: a latch circuit that latches in response to a signal; and a display that displays display information latched by the latch circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14395584U JPS6160574U (en) | 1984-09-22 | 1984-09-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14395584U JPS6160574U (en) | 1984-09-22 | 1984-09-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6160574U true JPS6160574U (en) | 1986-04-23 |
Family
ID=30702243
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14395584U Pending JPS6160574U (en) | 1984-09-22 | 1984-09-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6160574U (en) |
-
1984
- 1984-09-22 JP JP14395584U patent/JPS6160574U/ja active Pending
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