JPS6160113A - Power supply controlling for decentralized processing system - Google Patents

Abstract

PURPOSE:To prevent the interruption of the decentralized processing job of a work station WS as well as the loss due to said interruption, by holding the working information on each work station and inhibiting the power OFF operation of a host computer in case at least one of those work station is working. CONSTITUTION:The BUSY status of each of work stations WS2-4 is used to check whether or not the BUSY statuses are all set at '0' (END) at a NOR gate 12. When '0' is shown, an all-END signal is delivered to an AND gate 13 to secure an AND with the power switch signal (set at '1' in an OFF mode) of a host computer 1. In other words, an inadvertent power OFF operation of an operator invalidates the drive of a relay 15 only when the output of the gape 12 is set at '1' (all-END) and turns off a contact with the output set at an H (high) level. The signal supplied to a power supply device 16 indicates the make and the break of the power supply in an L (low) and H modes. In such a way of control, the inadvertent power OFF operation can be invalidated at the host computer when at least one of stations WS is working.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a power supply control device suitable for use in a distributed processing system.

[Technical background of the invention and its problems]

With the recent trend toward distributed processing, workstations have made remarkable progress. Since workstations that perform distributed processing are usually installed at a location separate from the host computer, some systems are starting to appear in which the power to the workstation is turned on and off from the host computer.

However, a serious drawback of the above system is that the power to the workstation can easily be inadvertently shut off due to the host converter's convenience. This invalidates the currently running job and causes a lot of losses.

[Purpose of the invention]

The present invention has been made in view of the above drawbacks, and provides a power control device in a distributed processing system and system that prevents the interruption of distributed processing operations at workstations currently in operation due to an inadvertent power cut-off operation on the host converter side. The purpose is to provide.

[Summary of the invention]

The present invention provides a distributed processing system consisting of a host computer and a plurality of work stages, in which the host computer holds status information indicating the operating status of each workstation, and by checking this status information, the workstation can be powered off. The structure was designed to do this.

In other words, when any one of the above statuses indicates the operating status, the power output in the host combinator
Powering off the workstation by the FF operation is prohibited, and the power OFF operation is enabled only when all of the statuses no longer indicate operating status.

This makes it possible to prevent the interruption of the distributed processing operations currently being executed on the workstations and the resulting losses.

[Embodiments of the invention]

Hereinafter, embodiments of the present invention will be described in detail using the drawings. FIG. 1 is a block diagram showing an example of the configuration of a distributed processing system to which the present invention is adopted. In the distributed processing system to which the present invention is applied, one host combinator 1 has, for example, three workstations! , 3.4 are connected, and each of the workstations 2 and 3.4 shares the resources owned by the host computer 1.

FIG. 2 is a block diagram showing an embodiment of the present invention. Specifically, a power control device built into the host computer 1 shown in FIG. 1 is shown.

In the figure, 11 is a status register. Each bit constituting the status register 11 is assigned to each of the workstations 2, 3.4, and the respective Bt
Indicates J 8Y status. 12 is Noah Gate.

NOR Gate 12 makes each bit information forming the status register 11 manually, and the output obtained by taking the logical conditions is supplied to one input terminal of the AND gate 13. That is, in Noah Gate 12, each workstation 2
, 3.4 are all not in operation status.

The output of the power switch 14 is supplied to the other input terminal of the AND gate 13. Here a logical condition is taken,
The result is supplied to relay 15. The relay 15 output is 0, which is supplied to the power supply 16, that is, the AND gate 13
When the power switch 14 is OFF and the Noah gate 12
When the output shows the "II (I G H" level), the relay 15 is activated.The signal supplied to the 'NL source device 16 is the power ON10 F F signal, and the "LOW
``Noto's power QN, ``HIGH'''s power OF
Let it be F.

FIG. 3 is a conceptual diagram showing the operation of the embodiment of the present invention in chronological order. Specifically, host combinator 1 and workstation? , J, 4 and the BUOY status of the workstation 2.3.4 recognized by the host computer 1 thereby. Also, in case a, all workstations are operating (
Case b illustrates a case where the workstation 3 is in an unused state due to the power being turned off.

Hereinafter, the operation of the embodiment of the present invention will be explained in detail with reference to FIG. I will explain the case strictly.

First, the host computer 1 sequentially polls (selects) the workstations 11, 3.4, which serve as secondary stations, and provides services. Workstations 2, 3 and 4 make some kind of response to the polling of the host computer 1 mentioned above. In the case, all workstations j, J, and 4 are in the operational state, so the host combiator 1 has the status of each workstation; 1, 3.4 as BU8.
I am aware that it is Y.

Next, workstation 3 turns off the power to finish the work.
FF L, as shown in case b,
A timeout error occurs because no response to polling P□ arrives.

After retrying several times, host computer 1
The workstation 3 recognizes that the work has been completed, sets the corresponding status of the corresponding workstation to "0#," and performs termination settings.The status of each workstation thus confirmed is set in the register 11.

Incidentally, the cause of setting the BU8Y status to 0# is not limited to this, but it can also be done by issuing a ship end message from the workstation side, or by instructing the host computer 1 to end the operation. It is easy to imagine that.

As explained above, the feature of the present invention is to prevent the host computer 1 from being inadvertently turned off by using the BU8Y bus of each work stage 2, 3.4. In Noah Gate 12, the above-mentioned BU8Y status is checked to see if all are showing "0" (icND), and when all are '0#', all END
It is output to the AND gate 13 as a signal. This signal is ANDed by the AND gate 13 with the power switch signal of the host computer 1 ("1" when OFF).

In other words, the operator's careless power OFF operation is only possible when the Noah gate 12 output is 1" (all END).
The drive of the relay 15 is disabled, therefore, the relay drive contact is turned OFF and the output is set to the "HIGH" level. When the signal supplied to the power supply device 16 is "LOW", it instructs to turn on the power, and when it is "HIGH", it instructs to cut off the power.

By controlling this flK, when any one of the workstations is in operation, an inadvertent power-off operation on the host computer side can be disabled.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to prevent interruption of distributed processing operations due to an inadvertent power-off operation on the host computer side, and therefore, a decrease in performance on the work stage screen side can be prevented.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a configuration example of a distributed processing system to which the present invention is adopted, Fig. 2 is a block diagram showing an embodiment of the present invention, and Fig. 3 shows the operation of the embodiment of the present invention in chronological order. The operational conceptual diagram shown is 0 1...hot computer, 1! , 3.4... Workstation (W8), 11... Status register, 12... Noah gate, 13... AND gate,
14...Power switch, 15...Relay, 16.
...Power supply device. Applicant's representative Patent attorney Takehiko Suzue Figure 3 BUSY+ 3LJ':)Y2

Claims (1)

[Claims] The host computer holds status information indicating the operating status of a host computer and one or more workstations connected to the host computer that perform distributed processing while using instructions from the host computer and various resources possessed by the host computer. , when any one of these statuses indicates an operating status, the power OFF operation by powering off the host computer is prohibited, and the above power OFF operation is performed only when all of the above statuses no longer indicate an operating status. A power control device in a distributed processing system that enables