JPS6156130B2 - - Google Patents

Info

Publication number
JPS6156130B2
JPS6156130B2 JP9757981A JP9757981A JPS6156130B2 JP S6156130 B2 JPS6156130 B2 JP S6156130B2 JP 9757981 A JP9757981 A JP 9757981A JP 9757981 A JP9757981 A JP 9757981A JP S6156130 B2 JPS6156130 B2 JP S6156130B2
Authority
JP
Japan
Prior art keywords
pulse
pulses
difference
transfer device
pulse train
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9757981A
Other languages
Japanese (ja)
Other versions
JPS582108A (en
Inventor
Masazumi Murai
Mitsuru Matsunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tsubakimoto Chain Co
Original Assignee
Tsubakimoto Chain Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tsubakimoto Chain Co filed Critical Tsubakimoto Chain Co
Priority to JP9757981A priority Critical patent/JPS582108A/en
Publication of JPS582108A publication Critical patent/JPS582108A/en
Publication of JPS6156130B2 publication Critical patent/JPS6156130B2/ja
Granted legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B65CONVEYING; PACKING; STORING; HANDLING THIN OR FILAMENTARY MATERIAL
    • B65GTRANSPORT OR STORAGE DEVICES, e.g. CONVEYORS FOR LOADING OR TIPPING, SHOP CONVEYOR SYSTEMS OR PNEUMATIC TUBE CONVEYORS
    • B65G43/00Control devices, e.g. for safety, warning or fault-correcting
    • B65G43/10Sequence control of conveyors operating in combination

Description

【発明の詳細な説明】 この発明は、移送装置間の物品移載や、移送物
品をこれと平行移動する加工機械によつて加工す
る場合等に用いるデジタル同期移送制御方法及び
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital synchronous transfer control method and apparatus used for transferring articles between transfer devices and processing transferred articles by a processing machine that moves parallel to the transferred articles.

例えば、2台の移送装置を同期運転する場合、
従来は各移送装置に取付けたセルシン等の正弦状
アナログ電圧の差を利用していたので、移送装置
を起動する場合は、上記アナログ電圧の位相が一
致するように予め移送装置の始動点の位置合せを
したのち同時起動させねばならない面倒があり、
更に両移送装置の速度比を変化させる自由がない
から、例えば一方の移送装置を増速して、移送ラ
インにおける一時的滞貨を早急に処理した後、平
常の同期運転を戻すという運転操作ができず、実
用的に不便である等の欠点があつた。
For example, when operating two transfer devices synchronously,
Conventionally, the difference between the sinusoidal analog voltages of cellsin, etc. attached to each transfer device was used, so when starting the transfer device, the starting point position of the transfer device was adjusted in advance so that the phases of the analog voltages matched. There is the trouble of having to start them at the same time after matching them.
Furthermore, since there is no freedom to change the speed ratio of both transfer devices, it is not possible, for example, to increase the speed of one of the transfer devices to quickly dispose of temporary cargo accumulation in the transfer line, and then return to normal synchronous operation. However, there were disadvantages such as being practically inconvenient.

本発明の目的は従来の上記欠点を除去したデジ
タル同期移送制御方法及び装置を提供するにあ
る。
SUMMARY OF THE INVENTION An object of the present invention is to provide a digital synchronous transfer control method and apparatus that eliminates the above-mentioned drawbacks of the conventional technology.

以下本発明の実施例を図面を参照して説明す
る。
Embodiments of the present invention will be described below with reference to the drawings.

先づ本発明の原理を説明すると、第1図におい
て、駆動モータM1を有する主コンベヤC1に対
し駆動モータM2を有する従コンベヤC2を同期
運転するものとし、コンベヤC1,C2にそれぞ
れパルス発生機S1,S2を結合する。S1,S
2はコンベヤC1,C2の物品移送ピツチP1,
P2に対して同数のN個のパルスを発生するもの
とする。したがつて、P1=P2で、両コンベヤ
C1,C2が同速ならば、S1,S2の発生パル
スの時間的間隔は等しく、コンベヤ移送能力も等
しい。
First, to explain the principle of the present invention, in FIG. 1, it is assumed that a main conveyor C1 having a drive motor M1 is operated synchronously with a slave conveyor C2 having a drive motor M2, and a pulse generator S1 is provided for each of the conveyors C1 and C2. , S2. S1,S
2 is the article transfer pitch P1 of the conveyors C1 and C2,
Assume that the same number of N pulses are generated for P2. Therefore, if P1=P2 and both conveyors C1 and C2 have the same speed, the time intervals between the generated pulses of S1 and S2 are equal, and the conveyor transfer capacities are also equal.

第2図はコンベヤC1よりC2の速度が大なる
場合のS1,S2の発生パルス列を示し、両パル
ス列のパルス数を積算器I1,I2にてそれぞれ
積算すれば、両積算値の差は負の方向に階段状に
漸増していくし、逆にコンベヤC1よりC2の速
度が小なれば上記差は正の方向に漸増していく。
そこで電圧設定器Eにより設定されたモータM1
の電圧に対し、上記差の大きさ及び該差の符号に
従い制御器Rによつて前記差が零となる方向にモ
ータM2の速度制御をすれば、コンベヤC1,C
2は一定速度比P1/P2をもつて同期運転され
る。
Figure 2 shows the generated pulse trains of S1 and S2 when the speed of conveyor C2 is higher than that of conveyor C1.If the number of pulses of both pulse trains is integrated by integrators I1 and I2, respectively, the difference between the two integrated values is negative. Conversely, if the speed of conveyor C2 is smaller than that of conveyor C1, the above-mentioned difference gradually increases in the positive direction.
Therefore, motor M1 is set by voltage setting device E.
If the speed of the motor M2 is controlled by the controller R in the direction in which the difference becomes zero according to the magnitude of the difference and the sign of the difference, the conveyors C1 and C
2 are operated synchronously with a constant speed ratio P1/P2.

しかし、一方の上記パルス列に対しパルスを周
期的に削減又は付加して前記積算値、したがつて
前記差を変化させれば、コンベヤC2はパルス削
減数又は付加数に応じた別の速度をもつてコンベ
ヤC1と同期運転される。パルス間隔或はパルス
数Nは同期精度とコンベヤC2の慣性等を含むモ
ータM2の応答性とによつて適宜に定められる。
However, if the integrated value and therefore the difference are changed by periodically reducing or adding pulses to one of the above pulse trains, the conveyor C2 will have a different speed depending on the number of reduced or added pulses. The conveyor C1 is operated in synchronization with the conveyor C1. The pulse interval or the number of pulses N is appropriately determined depending on the synchronization accuracy and the responsiveness of the motor M2 including the inertia of the conveyor C2.

例えば、自動車工場のボデー移送ラインの場合
には同期精度は低くてもよいので、コンベヤC
1,C2の位置ずれの許容値をボデー移送ピツチ
5500mmにつき200mmとし、パルス発生機S1,S
2のパルスピツチを40mmとすれば、1移送ピツチ
間の発生パルス数は5500/40≒137であり、前記許
容値200に対するパルス数は200/40=4であり、
前記積算値の差1パルス分ごとに増減すべきモー
タM2の供給電圧等を定めておけば、M2を4段
階に速度制御することによつて所望の許容限度内
の速度制御が可能となる。
For example, in the case of a body transfer line in an automobile factory, the synchronization accuracy may be low, so conveyor C
1. Set the allowable value of positional deviation of C2 as body transfer pitch.
200mm per 5500mm, pulse generator S1, S
If the pulse pitch of 2 is 40 mm, the number of pulses generated between 1 transfer pitch is 5500/40≒137, and the number of pulses for the above tolerance value of 200 is 200/40=4,
If the supply voltage of the motor M2 to be increased or decreased for each pulse of the difference in the integrated value is determined, the speed of M2 can be controlled within a desired allowable limit by controlling the speed of M2 in four steps.

第2図において、パルス発生機S1,S2のパ
ルスピツチをそれぞれt1,t2(t1>t2)
とすれば、これらの積算値の差のレベルは同図D
の如くパルス1個分、2個分、3個分と増加して
いくから、各レベルについてコンベヤC2の速度
操作量、例えばモータM2の供給電圧を増加する
等の手段によりコンベヤC2の速度制御をすれば
よい。
In Fig. 2, the pulse pitches of pulse generators S1 and S2 are t1 and t2 (t1>t2), respectively.
Then, the level of the difference between these integrated values is D
Since the pulses increase by 1 pulse, 2 pulses, and 3 pulses as shown in FIG. do it.

第3図は、パルス発生機S1又はS2の発生パ
ルスを周期的に削減してモータM2を減速又は増
速させることによりコンベヤC1,C2を削減パ
ルス数に応じて同期運転させる場合のブロツク制
御回路を示す。同図において、TGは定速側のモ
ータM1に結合したタコメータ、の如き速度検出
器、A1,A2はそれぞれパルス発生器S1,S
2の発生パルス数Nごとにα個のパルスを削減す
るパルス削減装置である。
FIG. 3 shows a block control circuit when the conveyors C1 and C2 are operated synchronously according to the number of reduced pulses by periodically reducing the pulses generated by the pulse generator S1 or S2 and decelerating or speeding up the motor M2. shows. In the figure, TG is a speed detector such as a tachometer connected to the constant speed motor M1, and A1 and A2 are pulse generators S1 and S, respectively.
This is a pulse reduction device that reduces α pulses for every N number of generated pulses.

いま、定速運転している移送装置C1に対し、
C2を同期運転制御するものとし、移送装置C
1,C2の速度比を定めるため、デジタルスイツ
チよりなる速度比設定器1によりパルス発生機S
2のパルス削減数αを設定すると、数αはパルス
削減装置A2のエンコーダ2を介してメモリ3に
セツトされる。N進プリセツトリングカウンタ4
はパルス発生機S2の発生パルス数をカウント
し、カウントがNに達すると出力1を生ずると共
に、メモリ3から数αがプリセツトされる。した
がつて、カウンタ4は入力パルス数N−αごとに
出力1を生じてゲート5を閉じ、ゲート5の出力
は入力パルスN−αごとにパルス1個が削減され
た削減パルス列P〓となる。
For the transfer device C1 that is currently operating at a constant speed,
C2 shall be controlled in synchronous operation, and the transfer device C
1. In order to determine the speed ratio of C2, a speed ratio setting device 1 consisting of a digital switch is used to set the pulse generator S.
When the pulse reduction number α of 2 is set, the number α is set in the memory 3 via the encoder 2 of the pulse reduction device A2. N-ary presetting counter 4
counts the number of pulses generated by the pulse generator S2, and when the count reaches N, outputs 1 and a number α is preset from the memory 3. Therefore, the counter 4 generates an output 1 for each input pulse number N-α and closes the gate 5, and the output of the gate 5 becomes a reduced pulse train P〓 in which one pulse is reduced for every input pulse N-α. .

該パルス列P〓は加減算カウンタ6の減算端子
nに入力し、一方のパルス発生機S1のパルス列
Nは削減されることなく加減算カウンタ6の加
算端子mに入力し、該カウンタ6は両パルス列P
N,P〓のパルス数の積分値の差のレベルを示す
信号aとその符号信号bとを出力する。
The pulse train P〓 is input to the subtraction terminal n of the addition/subtraction counter 6, and the pulse train P N of one pulse generator S1 is inputted to the addition terminal m of the addition/subtraction counter 6 without being reduced.
A signal a indicating the level of the difference in the integral value of the number of pulses N and P〓 and its sign signal b are output.

第4図はNを10、αを1、2、3と変えた場合
のパルス列PNとP〓とを例示したもので、前記
差信号aはパルス数N−αごとにパルス1個分づ
つ増加していくことがわかる。同図では両パルス
列のパルス位相を一致させて示したが、位相が不
一致の場合でも差信号aが増加していくことに変
りはない。そして差信号aはαが大なるほど早く
累増していく。
Figure 4 shows examples of pulse trains P N and P when N is changed to 10 and α is changed to 1, 2, 3, and the difference signal a is one pulse for each pulse number N-α. You can see that it is increasing. In the figure, the pulse phases of both pulse trains are shown to match, but even if the phases do not match, the difference signal a continues to increase. The difference signal a increases faster as α becomes larger.

調整電圧発生器Bにおいては、速度検出器TG
のアナログ出力を平滑整流回路7及び分圧調整器
8により適当な電圧eに変え、これをD/A変換
器9において、差信号aと共に増加していく補正
電圧vに変換する。電圧加減算器10は電圧設定
器11にて設定されたモータM1,M2の設圧電
圧Vと補正電圧v及び符号信号bとを入力し、α
が正ならば、符号信号bに従つて電圧Vとvとの
和電圧をモータM2に給電してこれを増速させ
る。モータM2が増速するとパルス列P〓のパル
ス間隔は小さくなり、その積分値がパルス列PN
の積分値と一致したとき信号aは消失し、D/A
変換器9は一定の補正電圧vを出力してモータM
2を定の増速状態に保持する。したがつて、コン
ベヤC2の移送能力は従前よりも増加する。
In the regulating voltage generator B, the speed detector TG
The analog output of is converted into an appropriate voltage e by a smoothing rectifier circuit 7 and a voltage dividing regulator 8, and this is converted by a D/A converter 9 into a correction voltage v which increases together with the difference signal a. The voltage adder/subtractor 10 inputs the set voltage V of the motors M1 and M2 set by the voltage setting device 11, the correction voltage v, and the sign signal b, and α
If is positive, the sum voltage of voltages V and v is supplied to the motor M2 according to the sign signal b to speed it up. When the motor M2 speeds up, the pulse interval of the pulse train P becomes smaller, and its integral value becomes the pulse train P N
When it matches the integral value of D/A, signal a disappears and D/A
The converter 9 outputs a constant correction voltage v to the motor M.
2 is maintained at a constant speed increase state. Therefore, the transfer capacity of conveyor C2 is increased compared to before.

上記と反対に、定速運転しているモータM1に
対してモータM2を減速させたい場合は、速度比
率設定器1により設定したパルス削減数αをパル
ス削減装置A1に与える。しかるときは、前記と
同様にして加減算カウンタ6の加算端子mにはパ
ルス削減装置A1のゲート5からパルス列P〓
が、また減算端子nにはパルス削減装置A2のゲ
ート5からパルス列PNが入力する。この場合は
加減算カウンタ6の減算結果が負となるから、符
号信号bは反転し、電圧加減算器10は設定電圧
Vと補正電圧vとの差の電圧をモータM2に給電
してこれを減速させる。モータM2が減速すると
パルス列PNのパルス間隔は大となり、その積分
値がパルス列P〓の積分値と一致したとき信号a
は消失し、モータM2は一定の減速状態に保持さ
れる。したがつてコンベヤC2の移送能力は従前
よりも減少する。
In contrast to the above, when it is desired to decelerate the motor M2 with respect to the motor M1 operating at a constant speed, the pulse reduction number α set by the speed ratio setting device 1 is given to the pulse reduction device A1. In this case, in the same manner as described above, the addition terminal m of the addition/subtraction counter 6 receives the pulse train P
However, the pulse train P N is also input to the subtraction terminal n from the gate 5 of the pulse reduction device A2. In this case, the subtraction result of the addition/subtraction counter 6 becomes negative, so the sign signal b is inverted, and the voltage adder/subtractor 10 supplies power to the motor M2 with a voltage equal to the difference between the set voltage V and the correction voltage v to decelerate it. . When the motor M2 decelerates, the pulse interval of the pulse train P N increases, and when its integral value matches the integral value of the pulse train P〓, the signal a
disappears, and motor M2 is maintained in a constant deceleration state. Therefore, the conveyance capacity of conveyor C2 is reduced compared to before.

本発明は上記構成を有し、同期運転される主従
両移送装置のそれぞれの移動距離に比例して発生
するパルス列のうち、一方のパルス列から周期的
にパルスを加減することによつて両移送装置を同
期運転制御するから、移送装置の始動に際して両
移送装置の位置合せをする必要がなく、したがつ
て移送位置に拘わらず両移送装置の速度比を任意
に変更することができる効果があり、更にデジタ
ル制御方式であるから制御配線の長さに関係なく
正確な同期運転制御が可能である効果がある。
The present invention has the above-mentioned configuration, and by periodically adding or subtracting pulses from one of the pulse trains generated in proportion to the moving distance of each of the master and slave transport devices operated synchronously, both the master and slave transport devices can be controlled. Since the synchronous operation of the transfer devices is controlled, there is no need to align the two transfer devices when starting the transfer devices, and therefore, the speed ratio of both transfer devices can be arbitrarily changed regardless of the transfer position. Furthermore, since it is a digital control system, accurate synchronous operation control is possible regardless of the length of the control wiring.

【図面の簡単な説明】[Brief explanation of the drawing]

図面は本発明の一実施例を示し、第1図は基本
原理説明図、第2図はパルス発生機の発生パルス
の積分値の変化説明図、第3図はブロツク制御回
路図、第4図は第3図の作用説明図である。 A1,A2……パルス削減装置、B……調整電
圧発生器、C1……主移送装置、C2……従移送
装置、M1……主移送装置の駆動モータ、M2…
…従移送装置の駆動モータ、S1,S2……パル
ス発生機、TG……主移送装置の速度検出器、1
……速度比設定器、6……加減算カウンタ、9…
…変換装置、10……電圧加減算器。
The drawings show an embodiment of the present invention; FIG. 1 is a diagram explaining the basic principle, FIG. 2 is a diagram explaining changes in the integral value of pulses generated by the pulse generator, FIG. 3 is a block control circuit diagram, and FIG. is an explanatory diagram of the action of FIG. 3. A1, A2... Pulse reduction device, B... Adjustment voltage generator, C1... Main transfer device, C2... Slave transfer device, M1... Drive motor of main transfer device, M2...
...Drive motor of the slave transfer device, S1, S2...Pulse generator, TG...Speed detector of the main transfer device, 1
...Speed ratio setter, 6...Addition/subtraction counter, 9...
... Conversion device, 10... Voltage adder/subtractor.

Claims (1)

【特許請求の範囲】 1 設定速度を有する主移送装置に対し従移送装
置を同期運転制御する制御方法において、パルス
数が前記両移送装置のそれぞれの移動距離に比例
する2つのパルス列のうち一方のパルス列のパル
スを周期的に削減することにより両パルス列のパ
ルス数の積分値に差を生じさせ、該差を零とする
ように従移送装置を速度制御するデジタル同期移
送制御方法。 2 設定速度を有する主移送装置に対し従移送装
置を同期運転制御する制御装置において、パルス
数が前記両移送装置のそれぞれの移動距離に比例
するパルス列を生ずる2個のパルス発生機と、一
方の前記パルス列に対するパルスの周期的削減数
を定める速度比設定器と、前記周期的削減数のパ
ルスを前記一方のパルス列から周期的に削減して
削減パルス列を発生するパルス削減装置と、パル
スが削減されない他方のパルス列と前記削減パル
ス列との各パルス数の積分値の差信号及び該差の
符号信号とを出力する加減算カウンタと、主移送
装置の速度検出電圧を前記差と共に増加する補正
電圧に変換する変換装置と、主移送装置の駆動モ
ータの設定供給電圧に対し前記差の符号に従つて
前記補正電圧を加減して前記差が零となるように
従移送装置の駆動モータの供給電圧を制御する電
圧加減算器とを有するデジタル同期移送制御装
置。
[Scope of Claims] 1. In a control method for synchronously controlling a slave transfer device with respect to a main transfer device having a set speed, one of two pulse trains whose number of pulses is proportional to the distance traveled by each of the two transfer devices is provided. A digital synchronous transfer control method for periodically reducing the number of pulses in a pulse train to create a difference in the integral value of the number of pulses in both pulse trains, and controlling the speed of a slave transfer device so as to reduce the difference to zero. 2. In a control device that controls the synchronous operation of a slave transfer device with respect to a main transfer device having a set speed, two pulse generators generate a pulse train whose number of pulses is proportional to the distance traveled by each of the two transfer devices; a speed ratio setting device that determines the number of pulses to be periodically reduced with respect to the pulse train; a pulse reduction device that periodically reduces the number of pulses to be periodically reduced from the one pulse train to generate a reduced pulse train; an addition/subtraction counter that outputs a difference signal of the integral value of each pulse number between the other pulse train and the reduced pulse train and a sign signal of the difference, and converts the speed detection voltage of the main transfer device into a correction voltage that increases with the difference. The supply voltage of the drive motor of the secondary transfer device is controlled so that the difference becomes zero by adding or subtracting the correction voltage to the set supply voltage of the drive motor of the converter and the main transfer device according to the sign of the difference. Digital synchronous transfer control device with voltage adder/subtractor.
JP9757981A 1981-06-25 1981-06-25 Digital synchronous transfer control method and apparatus Granted JPS582108A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9757981A JPS582108A (en) 1981-06-25 1981-06-25 Digital synchronous transfer control method and apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9757981A JPS582108A (en) 1981-06-25 1981-06-25 Digital synchronous transfer control method and apparatus

Publications (2)

Publication Number Publication Date
JPS582108A JPS582108A (en) 1983-01-07
JPS6156130B2 true JPS6156130B2 (en) 1986-12-01

Family

ID=14196148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9757981A Granted JPS582108A (en) 1981-06-25 1981-06-25 Digital synchronous transfer control method and apparatus

Country Status (1)

Country Link
JP (1) JPS582108A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58139910A (en) * 1982-02-15 1983-08-19 Daifuku Co Ltd Synchronous driving method of conveyer

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Publication number Publication date
JPS582108A (en) 1983-01-07

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