JPS6154289B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a variable equalization circuit for equalizing the transmission characteristics of a cable.

Conventionally, there are a wide variety of equalizer circuits that equalize the transmission characteristics of cables, but typical circuits include circuits that use feedback loops, circuits that use inductance, variable resistors, and circuits that use inductance. An example of this is a circuit using a variable capacitor. However, circuits using feedback loops are difficult to implement in high frequency ranges exceeding 4 MHz due to the risk of oscillation, and circuits using inductances are unsuitable for IC implementation because it is difficult to make the elements small. It is. In addition, circuits using variable resistors conventionally use two sets of variable low resistance elements, which make variable control difficult and complicate the circuit, and in circuits using variable capacitors, the variable capacitor is a very special component. It was becoming.

In order to solve these drawbacks, the present invention realizes a variable equalization circuit that uses only one set of variable resistors and does not include a feedback loop or inductance and operates stably over a wide band, and will be described in detail below.

Figure 1 is a block diagram of the present invention. In the figure, 1 is a first impedance that equalizes the transmission characteristics of the cable, 2 is a second impedance, 3 is a circuit that matches the phase and adds it, and 4 is a variable A resistance element, 5 is an input terminal, 6, 7, 8 are connection points between circuits 9 is an output terminal, 10 is a DC current bypass circuit that biases transistor Q ₁ , Q ₁ is the first transistor, Q ₂ is the 2 transistors, R ₁ ,
R ₂ and R ₃ are resistors, V ₊ , VV _- are power supplies, and V _B is a bias power supply.

Further, the value of the first impedance 1 is Z ₁ , the value of the second impedance 2 is Z ₂ , and the value of the variable resistance element 4 is r.

The input from input terminal 5 is the first transistor
The adder circuit 3 is divided by the first impedance 1 (Z ₁ ) that equalizes the transmission characteristics of the cable connected to the emitter of Q ₁ and the variable resistance element 4 (r).
, that is, the output of connection point 7 in the figure, the frequency transmission characteristic between input terminal 5 and connection point 7 is given by the condition r/Z ₁ +.

Further, the input signal is amplified by the first transistor _Q1 , and the frequency transmission characteristic between the input terminal 5 and the collector output of the first transistor _Q1 , that is, the connection point 6 in the figure is _-R1 / _Z1 +r. given conditionally. The signal at the connection point 6 is given a transmission characteristic under the condition of -R ₂ /Z ₂ by the second transistor Q ₂ and the second impedance 2 (Z _{2 )} connected to the emitter of the transistor Q 2. , the frequency transmission characteristic between the input terminal 5 and the collector output point of the second transistor Q ₂ , that is, the connection point 8 in the figure, is under the condition of R ₁ R ₂ /Z ₂ (Z ₁ +r). The signals outputted to the connection points 7 and 8 are analog-added by the adder circuit 3 to become a signal at the output terminal 9.
That is, if the condition given to the frequency transmission characteristic between the input and output terminals (5-9) is H, then H=(r/Z ₁ +r+ R ₁ R ₂ /Z ₂ (Z ₁ +r)).

The condition H given to this frequency transmission characteristic varies depending on the variable resistance value r as follows. That is, when r≒0, H≒R ₁ R ₂ /Z ₁ Z ₂ When r≒∞, H≒1. In other words, r≒0
Conditions given to the frequency transmission characteristics when H≒R ₁ R ₂ /Z
If the value of ₁ Z ₂ is set to equalize the value at the maximum loss of the cable, r≈0 at the maximum loss of the cable, and the maximum loss characteristics of the cable will be equalized. When there is no cable loss, r≒∞, the frequency transmission characteristics are flat, and the cable operates as a variable equalizer.

To operate as an ideal variable equalizer, Z=
The cable frequency characteristics must be accurately approximated by Z as Z ₁ = Z ₂ , but the circuit becomes complicated and
Normally, for example, for equalization that is satisfactory in PCM transmission, it is practically sufficient and a good idea to reduce the number of elements and simplify the circuit by setting Z ₁ ≠ Z ₂ .

FIG. 2 shows a circuit embodiment of the invention.

5 is an input terminal, 9 is an output terminal, Q ₁ , Q ₂ , Q ₃ ,
_Q4 is a transistor, _R1 to _R12 are resistors, _C1 to _C5 are capacitors, _D1 and _D2 are diodes, V _CONT is a control voltage terminal, and V ₊ and V _- are power supplies. Note that the bias power supply V _B shown in FIG. 1, the V _- power supply to which one end of the second impedance 2 is connected, and the V _- power supply to which one end of the variable resistance element 4 is connected are determined by considering the input signal and bias conditions. It is possible to take it from the ground. Transistor Q ₃ , Resistor R ₈ ,
The circuit composed of R ₉ and R ₁₀ is a constant current circuit and corresponds to the DC current bypass circuit ₁₀ in FIG. There is. The circuit corresponding to impedance 1 (Z ₁ ) in Figure 1 consists of a capacitor C ₂ and a resistor R ₆ , and the circuit corresponding to impedance 2 (Z ₂ ) in Figure 1 consists of a capacitor C ₁ and a resistor R 6. Consists of ₄ . The input signal from the input terminal 5 is sent to a circuit corresponding to impedance 1 in Fig. 1, which is composed of a capacitor C ₂ and a resistor R ₆ , and diodes D ₁ , D ₂ ,
It is divided by a circuit corresponding to the variable resistance element 4 in FIG. 1, which is composed of a capacitor _C5 , and is connected to a transistor _Q5 for phase inversion. On the other hand, the output signal on the collector side of transistor _Q1 is
Q ₂ , the capacitor C ₁ , and the resistor R ₄ provide equalization characteristics, and the collector side output signal of the transistor Q ₅ as well as the transistors Q ₂ , Q ₄ , and the resistor
It was composed of R ₂ , R ₄ , and R ₅ . The signals are added by the analog adder circuit and sent to the output terminal 9 as an output signal. That is, in this circuit, the phase matching and addition circuit shown in FIG. 1 corresponds to the transistor Q ₄ , the resistor R ₅ , the transistor Q ₅ and its operating circuit. The circuit of diodes D ₁ and D ₂ and capacitor C ₅ corresponding to the variable resistance element 4 in FIG. 1 changes the bias point of the diodes D ₁ and D ₂ depending on the input voltage from the control voltage terminal V _CONT . The diode's differential resistance changes to function as a variable resistance.

That is, when the loss in the cable is large, the input voltage from the control voltage terminal V _CCONT is automatically increased by the output of a control circuit (not shown), such as a level detection circuit, and the differential resistance of the diodes D ₁ and D ₂ is increased. Make it smaller. Therefore, the input signal is mostly transistor Q ₁
Since it flows to the collector side of the cable, the frequency transmission characteristics are amplified in the high frequency range, and the cable operates to compensate for the loss in the high frequency range of the cable. When there is no cable loss, the voltage at the control voltage terminal V _CONT decreases, so the differential resistance of the diodes D ₁ and D ₂ increases. Therefore, most of the input signal flows from the emitter of the transistor _Q1 to the path of the transistor _Q5 , and the frequency transmission characteristic becomes flat, and the input signal is outputted to the output terminal 9 as it is.

As explained above, according to the variable equalization circuit of the present invention, only one set of variable low resistance elements is used, making it easy to control, and since no inductance is used unlike in the past, it can be easily integrated into an IC. Moreover, since it does not include a feedback loop, it operates stably over a wide frequency range. In addition, since special parts such as variable capacitance elements are not used, it is possible to realize an economical variable equalization circuit that is easy to manufacture.

[Brief explanation of the drawing]

FIG. 1 shows a block diagram of the invention, and FIG. 2 shows a circuit embodiment of the invention. 1... First impedance, 2... Second impedance, 3... Phase matching and addition circuit, 4... Variable resistance element, 5... Input terminal, 6,
7, 8... Connection point, 9... Output terminal, 10... DC current bypass circuit, V ₊ , V _-... Power supply, V _B ...
Bias power supply, Q ₁ ...first transistor, Q ₂
... Second transistor, R ₁ , R ₂ ... Resistance.

Claims (1)

[Claims] 1. In a variable equalization circuit that equalizes the transmission characteristics of a cable by controlling a variable resistance element, a first transistor that equalizes the transmission characteristics of the cable is connected to the emitter of the first transistor. An impedance and a variable resistance element are connected in series, and a first resistor whose one end is connected to a positive power supply is further connected to the collector of the first transistor, and the first impedance and the variable resistance element are connected in series. a first means for extracting a first signal from a connection point; an element having a high impedance in a frequency region to be equalized is connected between the emitter of the first transistor and a negative power supply; a second means for applying a DC bias to the collector of the first transistor; and applying a second signal taken out from the collector of the first transistor to the base of the second transistor, between the emitter of the second transistor and the negative power supply; A second impedance for equalizing transmission characteristics is connected to the second impedance, and a second resistor whose one end is connected to a positive power supply is connected to the collector of the second transistor. a third means for amplifying the signal; and a fourth means for adding the first signal and the second signal amplified by the third means with the same phase.
A variable equalization circuit comprising means for.