JPS6151350B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic device having at least a calculation function, a clock function and a tape recorder function, and more particularly to a device capable of searching for a predetermined designated address on a recording medium at a set time.

This device specifies any address at any time and reproduces the desired information on the recording medium, so the time and address information can be freely set, and the desired address information can be searched and reproduced at the set time. It is an object.

Such information may include, for example, messages, memories, schedule information, and the like.

Conventionally, when reproducing information recorded on a tape at a set time, time information, etc., is recorded on the tape itself, but this method requires complicated operations to record message information, etc. on the tape. It had drawbacks such as.

The present invention aims to eliminate the above-mentioned drawbacks and to obtain a new device.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

As shown in the block diagram of Fig. 1, this device is roughly divided into an input key section 1, a clock section 2, a computer section 3, and a tape recorder section 4, which are organically combined to realize the desired device. .

FIG. 2 shows a specific circuit configuration diagram of FIG. 1,
The key input section has a single key operation section K that includes numerical values, function keys, clock keys, etc. Based on this operation section K, for example, a designated tape address or a set time (such as 4:00 PM) can be entered. I'm starting to be able to do it. SK is a key that selectively switches these addresses and times, and the above key input information is encoded.
Code converted by EC. Then, by switching-SK, the gate G is selectively switched to the address (designated address) input state or the time (set time) input state, and when the gate G is in the designated address input state, the address information is When the gate G is in the set time input state, time information is stored in the address register AR and in the time setting register TR.

In addition, the clock section includes a clock generator CG, a frequency divider DV, a clock counter CO, and a comparison time memory circuit.
It consists of COB and constitutes a normal clock function. JT is a circuit that compares the time content set in the register TR with the time content of the comparison time storage circuit COB that stores the current time, and detects a match between them.

The computer section includes a flip-flop FT which is set by the outputs of the registers TR, AR and the match circuit JT, and reset by the output of an AND gate _A4 , which will be described later, which is also set by the FT output.
Includes flip-flop FD, AND gate _{A 1 ,} gate GA, address control circuit ADC, address counter AC, AND gate A ₂ , A ₃ , A ₄ OR gate OR, flip-flop FP, etc., which is reset by A 4 gate output, AND gate A The input of ₁ is the set output of the flip-flop FT and a signal ms indicating that the tape is running (if ms = 1, the tape is running,
If ms = 0, the tape is stopped), and the gate _A1 output is generated when the tape is stopped. These will be described later. The output of gate _A1 also opens gate GA and transfers the contents of the address register to gate GA.
Introduced to the address control circuit ADC via.

Furthermore, the tape recorder section is indicated by TPR.

In addition, this device is equipped with various notification means. That is, when the set time arrives, an alarm sound can be sounded from the speaker SP via the timer circuit TM and the alarm sound output control circuit ALM, and the display section LE, such as a light emitting diode, can be turned on via the display control circuit DL. This alerts the operator and enables automatic or manual regeneration by selecting a switch. This switch is designated as SWA, SWM.

These can be set to automatic playback when used as an alarm, for example, and when the set time comes, the alarm can be sounded and then an appropriate sound can be played back. In addition, when using the device for scheduling purposes, if the operator is not near the device, if the alarm goes off and it plays automatically, you will not be able to see the schedule contents, so if you can do it manually, you can check the display to see when the set time has arrived. For example, playback can be performed by pressing a start switch.

Figure 3 shows the address control circuit shown in Figure 2.
FIG. 3 is a block diagram showing in detail the relationship among the ADC, address counter AC, and tape recorder unit TPR.

The address control circuit ADC is composed of a set address buffer register ARB, a match detection circuit JA that detects a match between the contents of the address counter AC and the buffer register ARB, and flip-flops FF and FB. The above coincidence detection circuit outputs the signal _S1 if ARB=SC (both contents match), sets FF if ARB>SC, and sets FB if ARB<SC. It consists of a counter fc and a second counter sc, and these counters operate as an up counter with the FF output and as a down counter with the FB output. On the other hand, the tape recorder section TPR has the functions of a normal tape recorder, and these will be omitted. SE indicates a rotation sensor of the rotation detection mechanism, 5 indicates a reel stand, 6 indicates a rotary plate having a detection hole, 7 indicates a detection hole, and 8 indicates photoelectric conversion means such as a photocoupler. In other words, it outputs the number of rotation pulses corresponding to the rotation of the reel stand. This pulse is a counter
It is counted by fc, and if the predetermined number of pulses are counted, the signal is
Output S ₂ . After signal S ₂ is output, the next signal
The period during which _S2 is output corresponds to the length of one address. For example, one pulse is generated every time the reel table rotates once,
20 to 30 pulses can be set as one address. MD is a motor control circuit that moves the tape forward or backward according to the outputs of the flip-flops FF and FB, and M is a motor.

Next, the operation will be explained.

Now, for example, if you want to automatically play the specified address "7" on the tape at 4 o'clock.

□Use the k key and the address/time selection switch key to input and store the code signal corresponding to "7" in the address register AR and the code signal corresponding to "4" in the time setting register TR. Turn on the automatic playback switch SWA. The contents of the clock counter CO represent the time, and FT adds a predetermined time (for example, 1 minute) to the contents and stores it in the comparison time storage register.
The contents are transferred to COB. Therefore, the contents of the COB register change every moment, and the match detection circuit JT
When the content of the COB register reaches "4", a coincidence detection signal is output and flip-flops FT and FD are set. This set output lights up the light emitting diode LE to notify the operator that the tape is running.

On the other hand, the signal ms indicating that the tape is running is output from the tape recorder section TPR, and when ms is not output, that is, when the tape is stopped and ms = 0, the contents of the address register AR (address 7) are output from the AND gate AG ₁ . ) is the address control circuit through the gate GA
Transferred to ADC. The address control circuit ADC determines whether the tape should move forward or backward based on the contents of the address counter AC of the tape recorder section TPR, and stops the tape at address 7. At the same time, ARB
The tape recorder section TPR sets the flip-flop FP via the AND gate A ₂ (SWA ON) and the OR gate using a signal S ₁ indicating an address match, that is, a match signal between the contents of the register and the SC counter. Starts playback of number 7. When the content of address counter AC changes from address 7 to address 8, that is, when the reproduction of the message content at address 7 is completed, signal _S2 is generated, AND gate _A4 is opened, and flip-flop FP is activated at the output of _A1 . It is reset and playback ends. At the same time, flip-flops FT and FD are also reset and display LE goes out.

These will be further clarified by the explanation below.

On the other hand, the contents of the address register AR are transferred to the address control circuit ADC, and the timer circuit TM drives the timer control circuit ALM for a certain period of time to issue an alarm sound.

If you turn off the automatic playback switch SWA,
It can be played manually. That is, after the address control circuit ADC sets the tape address to address "7" and stops the tape, address "7" can be reproduced in the same way as described above by turning on the manual reproduction switch SWM.

If the set time is reached while the tape is running, such as recording, erasing, or playing, the flip-flop FT
FD is set, but the signal indicating that the tape is running
With the output of ms, that is, with ms=1 while the tape is running, the gate GA is not opened and no alarm sound is output, and only the display section LE is lit. When the tape stops, ms=0, but since the output of AND gate _A1 is generated, address "7", which is the content of address register AR, is reproduced in the same way as described above. Note that if the alarm sound is broadcast before the set address is reproduced, it can be distinguished from the case of normal reproduction. The address designation operation can be understood with reference to FIG. In other words, as mentioned earlier, address specification can be achieved by detecting a match between the contents of address register ARB and address counter AC.
The two counters fc and sc in AC perform the following functions. That is, the counter fc outputs a signal _S2 every time it counts a predetermined number of output pulses from the rotation sensor SE (for example, 30 pulses). S ₂ is output and then the next
The period until _S2 is output corresponds to the so-called 1 address length. On the other hand, since the sc counter counts the signal _S2 , the contents of the sc counter represent the tape address. The JA circuit compares the contents of this sc counter and the contents of the ARB register, and if ARB > sc, the flip-flop FF is set by the output of the JA circuit, and the motor is driven via the motor control circuit to move the tape to the set address. Move forward until they match. Also, if ARB<sc, the tape is sent backward by the FB output. If there is a match, the JA circuit will output a match output S ₁
is output to reset the FF and FB flip-flops, thereby stopping the motor drive and tape feeding. For example, when address 7 is designated and the current tape position corresponds to address 4, the sc counter stores address 4. Therefore, by executing tape feeding from this address and advancing the tape to address 7, the set address can be retrieved.

In this way, the present apparatus can be realized, and these can be realized as a tape recorder with an electronic computer, or as other equipment suitable for sailing.

As explained above, according to the electronic device of the present invention, a single key operation unit is provided for inputting a designated address and a set time, and selection of the input state of the designated address and the input state of the set time can be switched. Since this is done using a key, the key for inputting the set address and the key for inputting the set time can be the same.
Reduce the number of input keys for designated addresses and set times.
A generous key arrangement is possible, making it convenient to use.

[Brief explanation of the drawing]

FIG. 1 is a schematic block diagram of an example of an electronic device according to the present invention, FIG. 2 is a specific circuit configuration diagram of FIG. 1,
FIG. 3 is a detailed configuration diagram of the main part of FIG. 2, and FIG. 4 is a diagram showing an example of a rotation detection mechanism used in the device. In the figure, 1: input key, 2: clock section, 3: computer section, 4: tape recorder section, K: key section, SK:
Address/time selection switch key, EC: encoder,
AR: address register, TR: time setting register,
CG: clock generator, DV: frequency divider,
CO: Clock counter, COB: Comparison time storage register, JT: Coincidence detection circuit, G: Switching gate, AC:
Address counter, FD, FT, FP: flip-flop, TM: timer circuit, ALM: alarm sound output control circuit, TPR: tape recorder section, SP:
Speaker, SWA: Automatic playback switch, SWM: Manual playback switch, ARB: Setting address buffer register, JA: Comparison circuit, fc, sc: Counter, SE:
Rotation sensor, MD: Motor control circuit, M: Motor, FF, FB: Flip-flop.

Claims (1)

[Scope of Claims] 1. It has at least a calculation function, a clock function, and a tape recorder function, and addresses the medium at every predetermined pulse interval of the rotation speed of the recording medium drive unit, and presets a predetermined designated address of the medium. A device for searching at a set time, comprising a single key operation section for inputting a designated address and set time, and a switching key for selectively switching between inputting the designated address and inputting the set time using the key operation section. and a gate that switches to a designated address input state or a set time input state in response to an operation of the switching key; an address register that stores designated address information; a set time register that stores set time information input using the key operation section when the gate is in a set time input state; An electronic device comprising: means for searching for an address of the medium specified at a set time based on stored contents.