JPS6145190B2 - - Google Patents

Info

Publication number
JPS6145190B2
JPS6145190B2 JP868485A JP868485A JPS6145190B2 JP S6145190 B2 JPS6145190 B2 JP S6145190B2 JP 868485 A JP868485 A JP 868485A JP 868485 A JP868485 A JP 868485A JP S6145190 B2 JPS6145190 B2 JP S6145190B2
Authority
JP
Japan
Prior art keywords
time
circuit
signal
date
day
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP868485A
Other languages
Japanese (ja)
Other versions
JPS60173491A (en
Inventor
Yasushi Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP868485A priority Critical patent/JPS60173491A/en
Publication of JPS60173491A publication Critical patent/JPS60173491A/en
Publication of JPS6145190B2 publication Critical patent/JPS6145190B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04CELECTROMECHANICAL CLOCKS OR WATCHES
    • G04C17/00Indicating the time optically by electric means
    • G04C17/005Indicating the time optically by electric means by discs
    • G04C17/0058Indicating the time optically by electric means by discs with date indication
    • G04C17/0066Indicating the time optically by electric means by discs with date indication electromagnetically driven, e.g. intermittently

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Electromechanical Clocks (AREA)

Description

【発明の詳細な説明】 本発明は時刻表示が指針式アナログ表示で、カ
レンダー機構を内蔵し駆動源として正逆運転可能
なモータをもつた月末無修正機構付電子時計に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece with a month-end non-correction mechanism, which has a pointer-type analog time display, has a built-in calendar mechanism, and has a motor capable of forward and reverse operation as a driving source.

従来のカレンダー機構を内蔵した電子時計では
もちろん電子時計に限つた訳ではなく機械時計に
於いてもカレンダーの切り換えに数時間かかつて
いた。
In conventional electronic watches with a built-in calendar mechanism, it takes several hours to change the calendar, not only in electronic watches but also in mechanical watches.

そこで本発明では以下のような構成の電子時計
を考えた。
Therefore, in the present invention, an electronic timepiece having the following configuration was considered.

指針式アナログ表示を備えカレンダー機構を保
持した電子時計に於て正逆転可能なモータ、該モ
ータの正転駆動力を受けて回転駆動する時刻系輪
列、該モータの逆転駆動力を受けて回転駆動する
日板と月板、該時刻系輪例からの信号を受けて1
日の特定時刻を検出する検出機構、前記日板と月
板から小の月の31日を検出するカレンダー検出機
構、該両検出機構の信号を記憶しその記憶状態を
出力する記憶回路と該記憶状態を制御するタイマ
回路とを含む制御回路、該制御回路からの信号を
受け、分周回路からの計時パルスと早送り信号と
を切り換え前記駆動回路に送る切り換え手段、前
記制御回路からの信号を受け前記駆動回路に正逆
切り換信号を送る正逆切り換え手段とからなり、
前記時刻検出機構で1日の特定時刻を検出したと
き、もしくは前記カレンダー検出機構で小の月の
31日を検出したときには、前記制御回路の働きで
前記駆動回路が逆転早送りによつて、前記日板を
1日進めるようにした月末無修正機構付電子時
計。
An electronic watch with a pointer-type analog display and a calendar mechanism has a motor capable of forward and reverse rotation, a time series wheel train that rotates in response to the forward rotation driving force of the motor, and a time series wheel train that rotates in response to the reverse rotation driving force of the motor. 1 after receiving signals from the driving date plate and moon plate, and the time system wheel.
A detection mechanism that detects a specific time of the day; a calendar detection mechanism that detects the 31st day of a small month from the date plate and the moon plate; a memory circuit that stores the signals of both detection mechanisms and outputs the memory state; and the memory. a control circuit including a timer circuit for controlling a state; a switching means that receives a signal from the control circuit and switches between a clock pulse from a frequency dividing circuit and a fast-forward signal and sends it to the drive circuit; a switching means that receives a signal from the control circuit; forward/reverse switching means for sending a forward/reverse switching signal to the drive circuit;
When the time detection mechanism detects a specific time of the day, or when the calendar detection mechanism detects a small month.
When the 31st is detected, the control circuit causes the drive circuit to advance the date plate by one day by reversing and fast forwarding the date plate.

第1図は、本発明による電子時計の1例で、そ
のブロツク図である。
FIG. 1 is a block diagram of an example of an electronic timepiece according to the present invention.

2は、基準信号発生源、4は分周回路、6は切
り換え手段、8は駆動回路、9はモータ、10は
輪列、12は指針、14は日付表示機構、16は
月表示機構、18はカレンダー検出機構、19は
時刻検出機構、20は制御回路、22は正逆切り
換え手段である。
2 is a reference signal generation source, 4 is a frequency dividing circuit, 6 is a switching means, 8 is a drive circuit, 9 is a motor, 10 is a wheel train, 12 is a pointer, 14 is a date display mechanism, 16 is a month display mechanism, 18 19 is a calendar detection mechanism, 19 is a time detection mechanism, 20 is a control circuit, and 22 is forward/reverse switching means.

この電子時計は通常状態では分周回路4からの
1Hzの時計パルスを受けて駆動回路8で正転パル
スを作りモータ9を正転させてこの力を輪列10
に伝え、輪列10を介して時針、分針、秒針等の
指針12を動作させる。モータ9が正転している
時は、この輪列10からの力は日付表示機構14
には伝達されないように構成している。そして、
指針12がモータ9の正転によつて1定の時刻を
表示する時には、輪列10の位置によつて時刻検
出機構19でその時刻を検出しその検出信号によ
つて制御回路20が働き、切り換え手段6を制御
して分周回路4から早送り用の信号を駆動回路8
に伝送するようにするとともに、正逆切り換え手
段22を制御して駆動回路8に伝送されてくる早
送り信号によつてモータ9を逆転で早く回転する
ように構成している。モータ9が逆転すると輪列
10が正転時とは反対に回転し指針7が逆廻りす
ると同時に、この輪列10の回転力が日付表示機
構14に伝達され日付を切り換える。この時輪列
10は早送り回転しているため日付の切り換えは
極めて短い時間で行なわれる。一方制御回路20
が自動的に働き、輪列10が日付け切り換えに要
するだけ回転した後は、正逆切り換え手段22を
制御し駆動回路8で早送りの正転用の信号が作製
されるようにしモータ9を正転早送りし、輪列1
0を正転方向に早く回転する。制御回路20では
日付け切り換えに要した時間と正転早送り分の時
時間を考慮に入れ、時間の遅れをとりもどすまで
正転方向に早送りした後、切り換え手段6を制御
し、通常1Hzの時刻信号を駆動回路8に伝送する
ようにし指針12を通常運針に戻すようにしてい
る。
Under normal conditions, this electronic clock receives a 1Hz clock pulse from the frequency dividing circuit 4, generates a normal rotation pulse in the drive circuit 8, rotates the motor 9 in the normal direction, and transfers this force to the wheel train 10.
The hands 12 such as the hour hand, minute hand, second hand, etc. are operated via the wheel train 10. When the motor 9 is rotating normally, the force from this gear train 10 is applied to the date display mechanism 14.
It is configured so that it is not transmitted. and,
When the pointer 12 displays a fixed time due to the normal rotation of the motor 9, the time is detected by the time detection mechanism 19 based on the position of the wheel train 10, and the control circuit 20 is operated based on the detection signal. The switching means 6 is controlled to send the fast forward signal from the frequency dividing circuit 4 to the drive circuit 8.
At the same time, the forward/reverse switching means 22 is controlled so that the motor 9 is rotated quickly in the reverse direction by the fast forward signal transmitted to the drive circuit 8. When the motor 9 rotates in the reverse direction, the wheel train 10 rotates in the opposite direction to the normal rotation, causing the pointer 7 to rotate in the opposite direction. At the same time, the rotational force of the wheel train 10 is transmitted to the date display mechanism 14 to change the date. At this time, since the wheel train 10 is rotating in fast forward motion, the date can be changed in an extremely short time. On the other hand, the control circuit 20
automatically operates and after the wheel train 10 has rotated as much as necessary to change the date, the forward/reverse switching means 22 is controlled so that the drive circuit 8 generates a signal for forward rotation for fast forwarding, and the motor 9 is rotated forward. Fast forward, gear train 1
0 rotates quickly in the normal rotation direction. The control circuit 20 takes into account the time required to change the date and the time and time required for forward rotation fast forwarding, and after fast forwarding in the forward rotation direction until the time delay is recovered, controls the switching means 6 and outputs a normally 1Hz time signal. is transmitted to the drive circuit 8 to return the pointer 12 to normal movement.

なおこの実施例では月末無修正機構も付加して
あり、小の月の時に日付が31日になるとそれをカ
レンダー検出機構で検出して制御回路22を制御
し、日付をもう1日伝送するようにしている。
In this embodiment, a month-end non-correction mechanism is also added, and when the date reaches the 31st in a small month, the calendar detection mechanism detects this and controls the control circuit 22 to transmit the date for one more day. I have to.

第2図は第1図に基づく電子時計の1平面図で
ある。時計を装着する筒車24は、日回伝車2
6、日回伝えカナ28、日回車30を介して日回
爪32により、約3時間半分通常回転方向とは逆
転して動いた時に、日板34を1歯駆動する。
FIG. 2 is a plan view of the electronic timepiece based on FIG. 1. The hour wheel 24 on which the clock is attached is the daily transmission 2.
6. The date dial 34 is driven by one tooth by the date dial 32 via the date transmission pinion 28 and the date wheel 30 when the date plate 34 moves in the opposite direction to the normal rotation direction for about three and a half hours.

通常時の運針では日板34に日回爪32がかか
つてもバネ36で力が逃げてしまうため日板34
は回らない。この筒車24にはピン38を装着し
時針が12時位置にくると、このピン38が、バネ
40を押してこのバネ40が別に設けた接点42
に接触し、12時の時刻を検出するようにしてい
る。1日に2度このバネ40と接点42が接触
し、あらかじめ夜、昼の区別を回路的に判別する
ようにし、夜の12時の時刻を検出した時には、輪
列が逆転で早回転し、短時間のうちに日板34を
1歯駆動し、日付を切り換え切り換えが終つたこ
ろ、再び正転方向で輪列を早回転し、時刻を合せ
た後、通常回転に戻る。またこの時計では日板3
4には導電性の月板送りピン44を装着し31日か
ら1日に切り換える時点で月表示板46を送るよ
うにしている。
During normal hand movement, even if the date claw 32 is attached to the date plate 34, the force is released by the spring 36, so the date plate 34
It doesn't turn. A pin 38 is attached to this hour wheel 24, and when the hour hand comes to the 12 o'clock position, this pin 38 pushes a spring 40, and this spring 40 connects a separately provided contact 40.
to detect the time of 12 o'clock. Twice a day, this spring 40 and the contact point 42 come into contact, and the circuit determines whether it is night or day in advance, and when the time of 12 o'clock is detected, the gear train rotates quickly in reverse. Within a short time, the date plate 34 is driven by one tooth to change the date, and when the change is completed, the wheel train is quickly rotated again in the forward rotation direction, and after setting the time, it returns to normal rotation. Also, on this watch, the date plate is 3.
4 is equipped with a conductive moon plate feed pin 44, so that the month display plate 46 is fed when the change is made from the 31st to the 1st.

月表示板46には、月曜制レバー48を設けて
ある。
The month display board 46 is provided with a Monday system lever 48.

スイツチバネ50は、日板34が31日を表示す
る位置にくるとピン44と接触する位置に設けて
あるが月表示板46の表示が大の月の時には月曜
制レバー48が、このスイツチバネ50の絶縁部
52を外側に押し上げスイツチバネ50とピン4
4は接触しない。しかし、月表示板46の表示が
小の月の時には月曜制レバー48は、絶縁部52
を押し上げないためスイツチバネ50とピン44
は接触し、小の月の31日のカレンダーを検出す
る。これが検出されると輪列が、逆転早回転し、
もう1日分日付を送るように構成している。
The switch spring 50 is provided at a position where it comes into contact with the pin 44 when the date plate 34 comes to the position where the 31st is displayed, but when the month display plate 46 displays a large month, the Monday system lever 48 is Push up the insulating part 52 to the outside, switch spring 50 and pin 4.
4 does not make contact. However, when the month display board 46 displays a small month, the Monday system lever 48 is moved by the insulating section 52.
switch spring 50 and pin 44 to prevent pushing up the
contacts and detects the 31 day calendar of the lesser month. When this is detected, the gear train rotates rapidly in reverse,
It is configured to send the date for one more day.

第3図は、この時計の制御回路20を中心とす
る部分回路ブロツク図である。
FIG. 3 is a partial circuit block diagram centered on the control circuit 20 of this timepiece.

通常状態では、分周回路4から線54を通り切
り換え手段6を介して駆動回路8に1Hzの時刻パ
ルス信号が伝送されている。
In a normal state, a 1 Hz time pulse signal is transmitted from the frequency dividing circuit 4 to the drive circuit 8 via the line 54 and the switching means 6.

駆動回路8ではアンドゲート56,58のそれ
ぞれの出力線60,62に時刻パルス信号が出力
するとトリガーセツト・トリガーリセツトタイプ
のフリツプフロツプ64をその信号によつて制御
する。出力線60に時刻パルス信号が出力しオア
ゲート66を介してフリツプフロツプ64のTS
入力に入力されると、フリツプフロツプ64のQ
出力はパルス信号がHからLに立ち下るときに
「H」レベルとなり、アンドゲート58が開き
出力は「L」レベルとなるためアンドゲート56
を閉じる。このため分周回路4から伝送される時
刻パルス信号の次のパルスはアンドゲート58を
通つて出力線62に出力される。
In the drive circuit 8, when a time pulse signal is output to the output lines 60, 62 of the AND gates 56, 58, a trigger set/trigger reset type flip-flop 64 is controlled by the signal. A time pulse signal is output to the output line 60, and the TS of the flip-flop 64 is output via the OR gate 66.
When input to the input, the Q of flip-flop 64
The output becomes "H" level when the pulse signal falls from H to L, and the AND gate 58 opens and the output becomes "L" level.
Close. Therefore, the next pulse of the time pulse signal transmitted from the frequency dividing circuit 4 is outputted to the output line 62 through the AND gate 58.

この時には、オアゲート68を介してこの信号
はフリツプフロツプ64のTR入力に送られパル
ス信号の立ち下りでQ出力が「L」レベル出力
が「H」レベルとなるため今度はアンドゲート5
6が開きアンドゲート58が閉じる。
At this time, this signal is sent to the TR input of the flip-flop 64 via the OR gate 68, and at the falling edge of the pulse signal, the Q output becomes "L" level and the output becomes "H" level.
6 opens and AND gate 58 closes.

従つて次の時刻パルス信号のパルスは出力線6
0に出力されこのようにして出力線60、出力線
62に交互にパルスが出力されることにより、モ
ータに付加しているコイル70にそのたびごとに
逆向きの電流が流れ、モータの極性を変化させモ
ータのロータが回転することになる。
Therefore, the pulse of the next time pulse signal is output from output line 6.
By outputting pulses alternately to the output line 60 and output line 62 in this way, a current in the opposite direction flows through the coil 70 attached to the motor each time, changing the polarity of the motor. This will cause the rotor of the motor to rotate.

第2図に示したバネ40が接点42に接触し、
12時の時刻が検出されると制御回路20の線72
が「L」から「H」へと変化しフリツプフロツプ
74の出力線76が「L」から「H」となる。さ
らにもう1度バネ40が接点42に接触すると出
力線76が「H」から「L」へ変化するとともに
フリツプフロツプ78,82のそれぞれの出力線
80,84が「L」から「H」へと変化する。こ
のフリツプフロツプ78は時刻検出機構19から
の検出信号を記憶するとともに、後でも触れるが
カレンダー検出機構18からの検出信号も記憶
し、その記憶状態を切り換え手段6に出力する記
憶回路になつている。
The spring 40 shown in FIG. 2 contacts the contact 42,
When the time of 12 o'clock is detected, the line 72 of the control circuit 20
changes from "L" to "H", and the output line 76 of the flip-flop 74 changes from "L" to "H". When the spring 40 contacts the contact point 42 again, the output line 76 changes from "H" to "L" and the output lines 80, 84 of the flip-flops 78, 82 change from "L" to "H". do. The flip-flop 78 serves as a storage circuit that stores the detection signal from the time detection mechanism 19 and also stores the detection signal from the calendar detection mechanism 18, which will be mentioned later, and outputs the stored state to the switching means 6.

このフリツプフロツプ74は制御回路20への
外部からの制御端子81によつてリセツトできる
ようにし、昼の12時の時刻の検出時には、フリツ
プフロツプ74の出力線76が「H」へ、夜の12
時の時刻検出時には「L」へ変化するようにあら
かじめ調整しておく。
This flip-flop 74 can be reset by an external control terminal 81 to the control circuit 20, and when the time of 12 o'clock in the daytime is detected, the output line 76 of the flip-flop 74 goes to "H",
Adjust in advance so that it changes to "L" when detecting the hour.

出力線80が「H」レベルとなると、切り換え
手段6のアンドゲート86を閉じアンドゲート8
8を開き、分周回路4から駆動回路8に伝送する
パルス信号は線90を通して送られる早送り用の
信号に切り換えられる。
When the output line 80 becomes "H" level, the AND gate 86 of the switching means 6 is closed.
8 is opened, and the pulse signal transmitted from the frequency dividing circuit 4 to the drive circuit 8 is switched to a signal for fast forwarding transmitted through the line 90.

一方、出力線84が「H」となるとアンドゲー
ト92が開き、分周回路4から伝送されるa信号
によつてすぐフリツプフロツプ82はリセツトさ
れるため出力線84には細いパルス信号が出力さ
れたことになるが、この信号は正逆切り換え手段
22に伝送されオアゲート94を介してアンドゲ
ート96,98のうち開いている方を介してそれ
ぞれの出力線100,102から信号出力され
る。
On the other hand, when the output line 84 becomes "H", the AND gate 92 opens and the flip-flop 82 is immediately reset by the a signal transmitted from the frequency dividing circuit 4, so that a thin pulse signal is output to the output line 84. However, this signal is transmitted to the forward/reverse switching means 22, passed through the OR gate 94, and is output as a signal from the respective output lines 100, 102 via the open one of the AND gates 96, 98.

アンドゲート96は駆動回路8のフリツプフロ
ツプ64のQ出力がHのとき、アンドゲート98
は出力がHのときそれぞれ開くようになつてい
るが、出力線100に信号が出力されるとオアゲ
ート68を介してフリツプフロツプ64のTR入
力にその信号が伝送され、Q出力をL,出力を
Hに変化させ、出力線102に信号が出力される
とオアゲート66を介してフリツプフロツプの
TS入力に信号が伝送され、Q出力をH,出力
をLに変化させる。即ちフリツプフロツプ64の
出力状態を逆転させることになる。この状態で分
周回路6から線90を通して早送り用のパルス信
号が切り換え手段6で切り換えられて伝送されて
くるが、フリツプフロツプ64の出力状態が逆転
し従つて、その出力状態によつて制御されるアン
ドゲート56,58の開閉状態も逆転しているた
め、出力線60、出力線62に出力されるパルス
信号は通常状態で送つていた時に最後にパルスを
出力した出力線60,62の側に、続いてパルス
が出力される。このため、モータは逆転し、それ
以後は逆転状態で早送りすることになる。
When the Q output of the flip-flop 64 of the drive circuit 8 is H, the AND gate 96
are designed to open when the output is H, but when a signal is output to the output line 100, that signal is transmitted to the TR input of the flip-flop 64 via the OR gate 68, causing the Q output to be L and the output to be H. When the signal is output to the output line 102, the flip-flop is output via the OR gate 66.
A signal is transmitted to the TS input, changing the Q output to H and the output to L. That is, the output state of flip-flop 64 is reversed. In this state, a pulse signal for fast forwarding is transmitted from the frequency divider circuit 6 through the line 90 after being switched by the switching means 6, but the output state of the flip-flop 64 is reversed, and therefore, it is controlled by the output state. Since the open/close states of the AND gates 56 and 58 are also reversed, the pulse signals output to the output lines 60 and 62 are on the side of the output lines 60 and 62 that last outputted pulses when they were being sent in the normal state. Then, a pulse is output. As a result, the motor rotates in reverse, and from then on, the motor performs rapid forwarding in the reverse direction.

一方出力線80がHになるとアンドゲート10
4が開き、線90から早送り信号が、タイマ1
06に伝送される。
On the other hand, when the output line 80 becomes H, the AND gate 10
4 opens and a fast forward signal is sent from line 90 to timer 1.
06.

このタイマ106はあらかじめ輪列の逆転に
よつて日板34を一歯駆動できる時間を計算し、
構成している。日板34を一歯駆動でき、日付を
切り換えた後にタイマ106は、その出力線1
08をLからHに変化させる。出力線108がL
からHに変化すると、フリツプフロツプ110の
出力線112がLからHになりフリツプフロツプ
114の出力線116に細いパルス信号が出力さ
れる。この信号は正逆切り換え手段22に伝送さ
れ、出力線84にパルス信号が出力したと同様
に、駆動回路8を正逆転制御し、今度は、逆転早
送りしていたモータを正転早送りする。
This timer 106 calculates in advance the time that the date plate 34 can be driven by one tooth by reversing the gear train.
It consists of The date plate 34 can be driven by one tooth, and after changing the date, the timer 106 outputs its output line 1.
Change 08 from L to H. Output line 108 is L
When the level changes from L to H, the output line 112 of the flip-flop 110 changes from L to H, and a thin pulse signal is output to the output line 116 of the flip-flop 114. This signal is transmitted to the forward/reverse switching means 22, and in the same way as the pulse signal is output to the output line 84, the drive circuit 8 is controlled to be forward/reverse, and the motor which was being fast forwarded in the reverse rotation is now fast forwarded in the forward rotation.

一方、出力線116に細いパルス信号が出力す
るとタイマ106はリセツトされ、再びタイマ
時間計測し、丁度、逆転させた時間だけ経過する
と再び、タイマI106の出力線108はLから
Hとなるが、今度はフリツプフロツプ110の出
力線112がHのため、この出力線112をHか
らLに変えるにとどまり、フリツプフロツプ11
4からは細いパルス信号は出力しない。そのため
線90を通して伝送される早送り用信号によつ
て、タイマ118が計数を始め、逆転早送りと
正転早送りをしていた時間分の遅れをとりもどす
だけ計数した後、出力線120をLからHへと変
化し、フリツプフロツプ78をリセツトし、出力
線80をHからLへと戻し、切り換え手段6のア
ンドゲート86を開き、アンドゲート88を閉じ
ることによつて正転早送りを止め通常送りに戻
す。このとき同時にフリツプフロツプ78をリセ
ツトする。このリセツトが行なわれるまでフリツ
プフロツプ78では時刻検出機構19あるいはカ
レンダー検出機構18からの検出信号を記憶して
いる状態がつづくわけで、タイマ106とタイ
マ118とからなるタイマ回路119によつて
この記憶時間が制御されている。
On the other hand, when a thin pulse signal is output to the output line 116, the timer 106 is reset, the timer time is measured again, and when exactly the reversed time has elapsed, the output line 108 of the timer I 106 changes from L to H again, but this time Since the output line 112 of the flip-flop 110 is H, only the output line 112 is changed from H to L, and the flip-flop 11
No thin pulse signal is output from 4 onwards. Therefore, the timer 118 starts counting by the fast-forward signal transmitted through the line 90, and after counting enough to recover the time delay of the reverse fast-forward and forward fast-forward, the output line 120 is changed from L to H. Then, the flip-flop 78 is reset, the output line 80 is returned from H to L, the AND gate 86 of the switching means 6 is opened, and the AND gate 88 is closed, thereby stopping normal rotation fast forwarding and returning to normal forwarding. At this time, flip-flop 78 is reset at the same time. Until this reset is performed, the flip-flop 78 continues to store the detection signal from the time detection mechanism 19 or the calendar detection mechanism 18. is controlled.

この出力線120がHとなることによつてタイ
マ106とタイマ118はリセツトされる。
一方、逆転早送りし再び正転早送りするときに、
第2図で、バネ40と接点42が接触し、12時の
時刻の検出信号が入力するが、線80がHのとき
には、ゲート122が閉じるように構成している
ためこの信号入力による影響は受けない。
When the output line 120 becomes H, the timer 106 and the timer 118 are reset.
On the other hand, when fast forwarding in reverse and forward again,
In FIG. 2, the spring 40 and the contact 42 come into contact and a detection signal of 12 o'clock is input, but since the gate 122 is configured to close when the line 80 is H, the influence of this signal input is I don't accept it.

なお、小の月の31日の検出機構による検出信号
は、制御回路20の入力端124から入力されオ
アゲート126を介し、信号入力時はフリツプフ
ロツプ78,82をLからHへと変化させること
により、時刻検出機構19からの信号によつて日
付を送つた時と同様に制御回路20が働く。
The detection signal from the detection mechanism for the 31st day of the small month is input from the input terminal 124 of the control circuit 20 and passed through the OR gate 126, and when the signal is input, the flip-flops 78 and 82 are changed from L to H. The control circuit 20 operates in the same manner as when the date is sent by the signal from the time detection mechanism 19.

以上説明して来たように、本発明による電子時
計を用いれば日付切り換えを極めて短時間にすま
せることができる。
As explained above, by using the electronic timepiece according to the present invention, it is possible to change the date in an extremely short time.

たとえば第3図の早送り信号として64Hzのパル
ス信号を用いれば2〜3分で逆転早送りし日付を
切り換えさらに2〜3分で時針、分針が正しい時
刻を表示するようにすることができる。この期間
は時針,分針が正しい時刻を表示しないことにな
るが、毎日1定時刻になれば日付切り換えをする
ことが分つているし、しかも逆転早送りと正転早
送りの状態を見分けることによりどのぐらいの時
刻かを推し計ることもできる。
For example, if a 64 Hz pulse signal is used as the fast-forward signal shown in FIG. 3, it is possible to fast-forward in reverse in 2 to 3 minutes, change the date, and have the hour and minute hands display the correct time in another 2 to 3 minutes. During this period, the hour and minute hands will not display the correct time, but we know that the date will be changed at the fixed time every day, and we can tell by distinguishing between reverse fast forward and forward fast forward. You can also estimate the time.

本願はこの日付を早送りで切り換える機構をベ
ースにして考えれば、「小の月の31日」を検出す
る機構を付加するだけで月末無修正が実現できて
いる訳である。
If we consider this application based on a mechanism that changes the date by fast forwarding, it is possible to achieve no correction at the end of the month simply by adding a mechanism that detects the "31st day of the small month."

これは、システム構成として、日板を1日分送
る機構を日付早送りとカレンダ無修正機構、両方
に共通するシステムとしてすえた上で、それぞれ
の機能が働くような構成を考え実現できたもの
で、日板を1瞬におくる方式と月末を無修正で送
れるという両機能をそなえなおかつ全体構成とし
て簡単な構成で実現できている。
This was achieved by creating a system configuration in which the mechanism for advancing the date by one day is a common system for both the fast-forwarding date and the non-correcting calendar mechanism, and then a configuration that allows each function to work. , which has both the functions of sending the date in an instant and sending the month-end date without modification, and has a simple overall structure.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の電子時計を示すブロツク図。
第2図は本発明の電子時計の部分平面図、第3図
は本発明の電子時計の部分回路図である。 4……分周回路、6……切り換え手段、8……
駆動回路、9……モータ、10……輪列、18…
…カレンダ検出機構、19……時刻検出機構、2
0……制御回路、22……正逆切換手段、34…
…日板、46……月板、78……記憶回路、11
9……タイマ回路。
FIG. 1 is a block diagram showing an electronic timepiece according to the present invention.
FIG. 2 is a partial plan view of the electronic timepiece of the present invention, and FIG. 3 is a partial circuit diagram of the electronic timepiece of the present invention. 4... Frequency dividing circuit, 6... Switching means, 8...
Drive circuit, 9... Motor, 10... Wheel train, 18...
...Calendar detection mechanism, 19...Time detection mechanism, 2
0... Control circuit, 22... Forward/reverse switching means, 34...
...Date board, 46...Moon board, 78...Memory circuit, 11
9...Timer circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 指針式アナログ表示を備えカレンダー機構を
保持した電子時計に於いて正逆転可能なモータ、
前記モータの正転駆動力を受けて回転駆動する時
刻系輪列、該モータの逆転駆動力を受けて回転駆
動する日板と月板、前記時刻系輪列からの信号を
受けて1日の特定時刻を検出する検出機構、前記
日板と月板から小の月の31日を検出するカレンダ
ー検出機構、該両検出機構の信号を記憶しその記
憶状態を出力する記憶回路と該記憶状態を制御す
るタイマ回路とを含む制御回路、該制御回路から
の信号を受け、分周回路からの計時パルスと早送
り信号とを切り換え前記駆動回路に送る切り換え
手段、前記制御回路からの信号を受け前記駆動回
路に正逆切り換信号を送る正逆切り換え手段とか
らなり、前記時刻検出機構で1日の特定時刻を検
出したとき、もしくは前記カレンダー検出機構で
小の月の31日を検出したときには、前記制御回路
の働きで前記駆動回路が逆転早送りによつて、前
記日板を1日進めるようにした月末無修正機構付
電子時計。
1. A motor capable of forward and reverse rotation in an electronic watch with a pointer-type analog display and a calendar mechanism;
A time-based gear train that rotates in response to the forward rotation driving force of the motor, a date plate and a moon plate that rotate in response to the reverse rotation driving force of the motor, and a time-based gear train that receives signals from the time-based gear train and rotates each day. A detection mechanism that detects a specific time, a calendar detection mechanism that detects the 31st day of a small month from the date plate and the moon plate, a memory circuit that stores the signals of both detection mechanisms and outputs the memory state, and the memory state. a control circuit including a timer circuit to control; switching means that receives a signal from the control circuit and switches between a clock pulse from a frequency dividing circuit and a fast-forward signal and sends it to the drive circuit; forward/reverse switching means for sending a forward/reverse switching signal to the circuit, and when the time detection mechanism detects a specific time of the day or the calendar detection mechanism detects the 31st of a small month An electronic timepiece with a month-end non-correction mechanism, in which the drive circuit advances the date plate by one day by reverse fast forwarding under the action of a control circuit.
JP868485A 1985-01-21 1985-01-21 Electronic timepiece with month-end noncorrecting mechanism Granted JPS60173491A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP868485A JPS60173491A (en) 1985-01-21 1985-01-21 Electronic timepiece with month-end noncorrecting mechanism

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP868485A JPS60173491A (en) 1985-01-21 1985-01-21 Electronic timepiece with month-end noncorrecting mechanism

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP8966977A Division JPS5424674A (en) 1977-07-26 1977-07-26 Electronic watch

Publications (2)

Publication Number Publication Date
JPS60173491A JPS60173491A (en) 1985-09-06
JPS6145190B2 true JPS6145190B2 (en) 1986-10-07

Family

ID=11699745

Family Applications (1)

Application Number Title Priority Date Filing Date
JP868485A Granted JPS60173491A (en) 1985-01-21 1985-01-21 Electronic timepiece with month-end noncorrecting mechanism

Country Status (1)

Country Link
JP (1) JPS60173491A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE602005005878T2 (en) 2004-02-19 2009-05-20 Seiko Epson Corp. Electronic clock with calendar function and method for driving this clock
EP2919076A1 (en) * 2014-03-10 2015-09-16 ETA SA Manufacture Horlogère Suisse Device for driving an analogue indicator, in particular a date ring

Also Published As

Publication number Publication date
JPS60173491A (en) 1985-09-06

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