JPS6144724U - key input device - Google Patents
key input deviceInfo
- Publication number
- JPS6144724U JPS6144724U JP12857784U JP12857784U JPS6144724U JP S6144724 U JPS6144724 U JP S6144724U JP 12857784 U JP12857784 U JP 12857784U JP 12857784 U JP12857784 U JP 12857784U JP S6144724 U JPS6144724 U JP S6144724U
- Authority
- JP
- Japan
- Prior art keywords
- input device
- key input
- pair
- conductive members
- electrically connected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図〜第3図は本考案のキイ入力装置を示す断面図、
第4図、第5図は本考案の実施例のブロック図、第6図
、第7図は従来例のブロック図であり32:マークシ一
ト状スイッチ、33,39,45:弾性部材、34,3
5,37,40,41,43:導電部材、36,38,
42,44:スペーサ部材。1 to 3 are cross-sectional views showing the key input device of the present invention,
4 and 5 are block diagrams of an embodiment of the present invention, and FIGS. 6 and 7 are block diagrams of a conventional example. 32: mark sheet-like switch; 33, 39, 45: elastic member; ,3
5, 37, 40, 41, 43: conductive member, 36, 38,
42, 44: Spacer member.
Claims (1)
部材と、該一対の導電部材の双方に対し、前記弾性体の
押圧により電気的に導通すると共に平常状態においては
一定の間隙を有して相対する他の導電部材と、平常状態
における該導電部材と前記一対の導電部材との間隙を作
るスペース部材とにより成る大切スイッチを少なくとも
2段以上重ねて構成されるキイ入力装置。A pair of conductive members provided on the back surface of the elastic body, which are not electrically connected to each other, and both of the pair of conductive members are electrically connected to each other by the pressure of the elastic body, and have a certain gap in a normal state. A key input device configured by stacking at least two or more important switches each consisting of another conductive member facing each other, and a space member that creates a gap between the conductive member and the pair of conductive members in a normal state.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12857784U JPS6144724U (en) | 1984-08-27 | 1984-08-27 | key input device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12857784U JPS6144724U (en) | 1984-08-27 | 1984-08-27 | key input device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6144724U true JPS6144724U (en) | 1986-03-25 |
Family
ID=30687206
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12857784U Pending JPS6144724U (en) | 1984-08-27 | 1984-08-27 | key input device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6144724U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006173032A (en) * | 2004-12-20 | 2006-06-29 | Yoshihisa Komatsu | Lamination type multicircuit push switch and right/wrong determination device using it |
-
1984
- 1984-08-27 JP JP12857784U patent/JPS6144724U/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006173032A (en) * | 2004-12-20 | 2006-06-29 | Yoshihisa Komatsu | Lamination type multicircuit push switch and right/wrong determination device using it |
JP4519627B2 (en) * | 2004-12-20 | 2010-08-04 | 義久 小松 | Correctness judgment device |
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