JPS6143473A - Thermionic emission type electrostatic induction thyristor - Google Patents

Abstract

PURPOSE:To obtain the good-efficiency switching function of high velocity and reduced loss by composing a gate out of a semiconductor whose forbidden band is wider than a channel and making a size between a cathode and the gate under the mean free path of carriers. CONSTITUTION:In the compound semiconductor in which a good insulating film such as of GaAs can not be obtained, a resemblance of insulating gate can be made by forming the gate out of mixed crystal whose forbidden band is wider than that of GaAs. At this time, in the channel 2 which is formed between a cathode 3 and an anode 1 with extending among gate regions 4, a distance from the cathode 3 to the real gate 4 is made shorter than the free path of electrons. Consequently, the thermionic emission type electrostatic induction thyristor structure can be obtained. Then, the variation in intervals and thickness of the gate regions and impurity concentration of the channel region enables the normally-on type and normally-off type operations.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an electrostatic induction thyristor that utilizes thermionic emission, which is at the limit of miniaturization and speeding up of semiconductor devices.

[Prior art and its problems] Compared to the conventional pnpn four-layer thyristor and its improved gate turn-off (GTO) thyristor, the electrostatic induction thyristor has a smaller gate resistance and the potential can be controlled using a depletion layer. It has the excellent feature that the forward voltage drop is extremely small when conducting, similar to a pin diode, when it is conductive. However, the conventional electrostatic induction
Especially JMT with relatively large dimensions between cathode and gate.
Because of the structure, carriers were subject to scattering by the crystal lattice, which limited the upper frequency limit, making it difficult to obtain high-speed devices.

[Purpose of the Invention] The present invention eliminates the above-mentioned conventional problems, and provides S which allows carriers to move at thermionic speed without being scattered by the crystal lattice.
An object of the present invention is to provide an electron-emitting electrostatic induction thyristor.

Overview of CB Light Therefore, the present invention makes the gate more difficult than the channel.
It is characterized in that it is made of a semiconductor with a large i-width, and the dimension between the cathode and the gate is set to be equal to or less than the mean free path of carriers, so that thermionic emission occurs.

That is, to increase the speed of electrostatic induction thyristors.

As we reduce the dimensions, 1. When we consider that everything that exceeds the peak of potential on the entire surface of the cathode runs to the anode side, it becomes close to the carrier's flat journey, and most of the carriers are
It will run at very high speeds without being affected by lattice scattering.

Therefore, when using GaAs, the potential barrier width Wg
When 0.1μm, the cutoff frequency is approximately 780
Giz (fc=kT/2πm"/8.8Wg).

Since injection from the anode also occurs, the static f of the thermionic emission type
The voltage drop when the fi-induced thyristor conducts is very small. From the above, if the dimension between the cathode and the gate is made equal to or less than the mean free path of carriers and the electrostatic induction thyristor is formed into a thermionic emission structure, its operating speed can be made extremely high.

[Embodiments of the Invention] Examples will now be described with reference to the drawings, taking as an example a case where GaAs is used as a compound semiconductor.

FIG. 1(a) shows a sectional view of a thermionic emission type electrostatic induction thyristor according to an embodiment of the present invention.

In the figure, 1 is a region of a ρ+ GaAs substrate that will become an anode, 2 is a layer of channel n, 3 is an n+ layer provided in contact with channel 2 and is a region that will be a cathode, and 4 is a GaAs substrate.
+-xAlxAs in the region that will become the gate,
Although only a cross-sectional view is shown, they are mutually mesh-like or linear, with the ends forming a single stave.

The regions to be electrodes are exposed on the surface; 5 is an anode electrode, 6 is a cathode electrode, and 7 is an electrode formed on the surface of one of the gates 4.

As can be seen from this structure, in a compound semiconductor such as GaAs, which can provide a good insulating film and which does not have 1t, the gate band gap is larger than that of GaAs, for example.

By forming the gate with a mixed crystal such as Ga1-XAlXA3, the gate can be made into an insulating gate.

In the implantation shown in the figure, in the channel 2 that passes between the gate region 4 and is formed between the cathode 3 and the anode l, heat is generated by making the distance from the cathode 3 to the true gate 4 smaller than the free path of electrons. An electron-emitting electrostatic induction thyristor structure is obtained.

At this time, normally-on and normally-off operation can be achieved by changing the spacing and thickness of the gate region and the impurity density of the channel region. The value of X in Ga (-XAIX is, for example, 0.
Set it to 3. The impurity density can be undoped.

FIG. 1(b) shows the potential distribution of the channel between the gate regions from the cathode to the anode.

By the way, the embodiment shown in FIG. 2 solves the problem that the capacitance between the gate 1 and the cande (Cgk) and the capacitance between the gate and the anode (Cga) tend to increase in the above embodiment. .

According to this embodiment, Cgk can be made extremely small.

The same reference numerals as in FIG. 1(a) indicate the same or corresponding parts.

In this embodiment, since the gate 4 and the cathode 3 are on the same main surface, it is easy to take out the gate electrode 7, Cgk and gate resistance rg are reduced, and faster operation can be achieved.

FIG. 3 shows another embodiment of the present invention, in which an insulator 8 is provided to reduce Cga. As an insulator, 5i02. Si3N4 film or polyimide resin is preferable. GaAs has a dielectric constant of 11, while Si3N4 has a dielectric constant of 5.
．． 5. Since SiO2 has a value of 3.8 and polyimide has a value of about 3.2, Cgd is not an insulator (it is less than half that of the case where GaAs is present).

FIG. 4 shows an embodiment in which the channel has nine layers 9, and the gate region 4 and the p layer of the channel are in an inverted state.

When only one layer of the p-layer contacts the gate region 4, electrons are injected from the cathode into the channel and the device operates.

For example, the length from the source to the anode is 0.1 μm (1
Although it is possible to control the gate spacing to a value such as 000A), the gate spacing must be determined using the Debye length as a guide. The Debye length λD is given by the following equation (1).

Here, n is the impurity density of the channel, q is the unit charge,
E is the dielectric constant. 3.95μi+ when n is 10cm1"crm-', 0 when n is 10"cm-"
．． 4 μm, 0.04 μm when 10101sa'
It becomes the rank. Roughly speaking, the gate region needs to be 2λD or less. Compared to dimensional control in the vertical direction (between cathode and anode), dimensional control in the lateral direction is determined by the precision of photolithography, and the gate spacing is small.

Manufacturing becomes difficult.

FIG. 5 shows an example in which a p-type high impurity density region 10 is formed in the p channel of the embodiment of FIG. 4 in order to efficiently limit electrons from the cathode 6 to the gate 1 region. The buried region 10 has a high layer 1 barrier for electrons on the cathode side, so that the electrons pass through both sides of the buried region of the channel. Since the part that actually operates is the side part of the p channel formed by the regions 1 to 1, the cathode region 3 and the cathode electrode 6 are 1, for example, 0.5μI11
FIG. 6 shows another embodiment of the present invention, in which the p region is in contact with the cathode region 3, and the remaining portion is an n region. Figure 7 shows a structure in which the p region is inserted near the cathode of the channel, and Cgk is made small.

This is an example in which the goo 1 region can be formed small.

As is clear from the embodiments described above, the distance from the cathode to the true Ga 1- may be set to less than the mean free path so that thermionic emission occurs efficiently. Ga s -xAlxAs in the gate region.

It is necessary to reduce the surface levels between GaAs as much as possible so that the lattice constant matches that of GaAs.

A mixed crystal to which a small amount of P (phosphorus) is added, such as Ga s -xAlxAs + -yPy, is desirable. In this case, when x=0.3, y=o, about ot may be used.

If it is within the mean free path, the following formula can give an approximate guide.

Wdg’2v / 2πf Here, V is the electron velocity and f is the operating frequency.

When the electron speed is 1XIO' cm/sec, 100G
)Iz, 300GIlz, 500Gl(z, 700
GIlz, Wd at 1000GIIz (ITllz)
g' are 1600 people, 1100 people, and 950λ, respectively.
, 227 people.

There will be approximately 160 people. In the case of GaAs, in thermionic emission operation, the electron velocity is expected to be greater than L x 107 cm/see, and Wdg' is even larger than the above calculated value, which means that it runs at the conventional saturation velocity. It has the advantage of being easier to manufacture than a thyristor.

Channel impurity density is 1017can from iNJ
-', and the cathode and anode regions may be IXLO'' to lXl0'''cm-' for carrier injection.

As the electrode material of the cathode, Au-Ge, ^u-G
n” GaA such as e-Ni, ＾u-5e, Δu-Ta, etc.
s, the contact resistance is I x 10-'Ωcm"
The following is preferable, and as an anode electrode, A
u −Zn, Δg −Zn.

An alloy such as Cr-Au is preferable. Ga + in the gate region
-xAlxAs electrode materials include Ti, PL, W, M in addition to the electrode materials for the cathode and anode.
o, Cr, llf, Ni Ga + -xAlxA
It can be said that it is better to use a high melting point heavy metal material that does not form a resistive contact for s.

Regarding the fabrication of the device, the channel region, cathode and anode regions are formed using the molecular layer epitaxial growth method according to the invention at the time of the present invention, the optical:P layer epitaxial growth method, and
Vapor phase growth, MOCVD method, MIIIE method, and ion implantation method can be used. The cathode/anode and gate electrodes are formed by a combination of vacuum deposition (resistance heating, electron beam 11 heating, sputtering method), plasma etching, photoetching, photolithography, and the like.

In addition, semiconductor materials include not only GaAs but also Inp, I
nAS.

A II-VI group semiconductor or other mixed crystal semiconductor may be used.

In the gate region, In + -xGaxP, In +
It goes without saying that −xGaxAs may also be used.

[Effects of the Invention] As described above, the present invention provides a high-speed, low-loss thermionic-emitting external W1 induction thyristor that has an efficient switching function in a high frequency range that cannot be obtained with conventional thyristors. can get.

[Brief explanation of drawings]

1 to 7 are cross-sectional views of thermionic emission type electrostatic induction thyristors according to embodiments of the present invention, respectively. DESCRIPTION OF SYMBOLS 1... P-substrate to become an anode, 2, 9... Channel, 3... Cathode region, 4... Gate region formed of a semiconductor with a wider forbidden band width than GaAs, 5
... Anode region, 6... Cathode electrode, 7...
Gate il! Pole, 8...Insulator. Agent Patent Attorney Crest 1) Makoto'・Figure 1 (b) Insect, Nocho - Figure 2 Figure 3

Claims (8)

[Claims] (1) A semiconductor region serving as a channel, and cathode and anode regions formed in contact with both sides of this channel;
a gate region that is in contact with a part or the entire surface of the channel and is made of a semiconductor having a forbidden band width larger than that of the channel, and the dimension from the cathode region to the true gate region is equal to or less than the mean free path of carriers. A thermionic emission type electrostatic induction thyristor characterized in that: (2) In claim 1, the semiconductor serving as the channel is GaAs, and the gate region is Ga_1-xA.
A thermionic-emitting electrostatic induction thyristor made of lxAs. (3) A thermionic-emitting electrostatic induction thyristor according to claim 1, in which the gate region has a lattice constant corrected with that of the semiconductor in the channel region. (4) In claim 1 or 3,
A thermionic emission type induction thyristor whose gate region is Ga_1-xAlxAs_1-yPy. (5) In any one of claims 1 to 4, the dimension of the channel region in the direction perpendicular to the region in which carriers travel is determined by the Debye length λ_D determined by the impurity density of the channel region. On the other hand, the thermionic emission type electrostatic induction thyristor is within 2λ_D. (6) In any one of claims 1 to 5, the gate electrode provided in contact with the gate region is formed of a metal material that is in resistive contact with the gate region. Radiation type electrostatic induction thyristor. (7) In any one of claims 1 to 5, the gate electrode provided in contact with the gate region is formed of a metal material that does not come into resistive contact with the gate region. Radiation type electrostatic induction thyristor. (8) In any one of claims 1 to 7, the channel region includes a semiconductor region having a higher potential barrier to carriers from the cathode region than other channel regions. Radiation type electrostatic induction thyristor.