JPS6140695Y2 - - Google Patents

Info

Publication number
JPS6140695Y2
JPS6140695Y2 JP18828281U JP18828281U JPS6140695Y2 JP S6140695 Y2 JPS6140695 Y2 JP S6140695Y2 JP 18828281 U JP18828281 U JP 18828281U JP 18828281 U JP18828281 U JP 18828281U JP S6140695 Y2 JPS6140695 Y2 JP S6140695Y2
Authority
JP
Japan
Prior art keywords
bottom wall
side wall
wall
line
right sides
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18828281U
Other languages
Japanese (ja)
Other versions
JPS5892736U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP18828281U priority Critical patent/JPS5892736U/en
Publication of JPS5892736U publication Critical patent/JPS5892736U/en
Application granted granted Critical
Publication of JPS6140695Y2 publication Critical patent/JPS6140695Y2/ja
Granted legal-status Critical Current

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Description

【考案の詳細な説明】 本考案はIC、LSI、超LSI等の集積回路のキヤ
リアの本体に関するものである。
[Detailed Description of the Invention] The present invention relates to the main body of a carrier of an integrated circuit such as an IC, LSI, or super LSI.

従来この種のキヤリアは合成樹脂を筒状に押し
出す等して作られ、樹脂中には予め静電気の滞電
防止用にカーボンブラツク又は金属粉等の導電性
粉末が混入されている。ICはこの筒内に押し込
まれて運搬され電気機器の組立工場に持ち込まれ
る。
Conventionally, this type of carrier is made by extruding synthetic resin into a cylindrical shape, and conductive powder such as carbon black or metal powder is mixed in advance into the resin to prevent static electricity from accumulating. The IC is pushed into this cylinder and transported to an electrical equipment assembly factory.

しかるに、上記組立工場において機器の組立中
に容器内の導電性粉末が器外に落下し、機器の精
度等に悪影響を及ぼすおそれがある。また、従来
のものは立体成型されているからIC製造工場へ
の運搬の際、嵩張るという欠点もある。さらに、
従来のキヤリアはICの本体がICの端子の先端で
支えられているため、キヤリアの内壁にICの端
子の先端や外側部が接触し、特に端子が細い集積
回路の場合、端子が屈曲するという不都合も生じ
る。
However, during the assembly of the equipment in the assembly factory, the conductive powder inside the container may fall out of the equipment, which may adversely affect the precision of the equipment. Additionally, because conventional products are three-dimensionally molded, they are bulky when transported to IC manufacturing plants. moreover,
In conventional carriers, the main body of the IC is supported by the tip of the IC's terminals, so the tips and outer parts of the IC's terminals come into contact with the inner wall of the carrier, causing the terminals to bend, especially in the case of integrated circuits with thin terminals. It also causes some inconvenience.

本考案は上記諸点に鑑みてなされたもので、紙
層の上に金属箔層を重ねてなる帯状シートを基材
として、また折畳・組立可能に構成することによ
り、さらに集積回路の保持位置を、従来のICの
端子の先端から、ICの端子の付け根の部分に変
えることにより従来のキヤリアの欠点を解消しよ
うというものである。即ち、本願考案は、帯状シ
ートのその長手方向に沿う中心部に底壁を区画形
成し、その左右に第一側壁を区画形成し、さらに
その左右に第二側壁を区画形成し、少なくとも第
一側壁と第二側壁との境界部に金属層を積層し、
かつ、上記底壁の左端から始まり左第一側壁、底
壁、右第一側壁を経て底壁の右端で終わる打抜
線、当該打抜線で囲まれた部分を横断する折線及
び当該折線との対向端における切込により起立片
を複数個構成し、上記第一、第二両側壁を重合せ
しめると共に底壁の左右から起立せしめ、上記起
立片の切込を上記側壁の上記打抜線縁部に食い込
ませてなる集積回路用キヤリアの本体を要旨とす
るものである。
The present invention was developed in view of the above points, and uses a strip-shaped sheet made of a metal foil layer on a paper layer as a base material, and is configured to be foldable and assembleable, thereby further improving the holding position of the integrated circuit. The idea is to eliminate the drawbacks of conventional carriers by changing the position from the tip of the conventional IC terminal to the base of the IC terminal. That is, in the present invention, a bottom wall is defined at the center along the longitudinal direction of the strip sheet, first side walls are defined on the left and right sides of the bottom wall, second side walls are defined on the left and right sides of the bottom wall, and at least the first side wall is defined on the left and right sides of the bottom wall. A metal layer is laminated at the boundary between the side wall and the second side wall,
And, a perforated line that starts from the left end of the bottom wall, passes through the first left side wall, the bottom wall, the first right side wall and ends at the right end of the bottom wall, a folded line that crosses the area surrounded by the perforated line, and the folded line. A plurality of upright pieces are formed by cuts at opposite ends of the upright pieces, and the first and second side walls overlap each other, and they are made to stand up from the left and right sides of the bottom wall, and the cuts of the upright pieces are aligned with the punched line edge of the side wall. The gist is a main body of a carrier for integrated circuits which is cut into the main body of the integrated circuit carrier.

以下、図面に基づいて本考案の実施例につき説
明する。
Embodiments of the present invention will be described below based on the drawings.

第1図はキヤリア本体の素材の層構成を示して
おり、図において10は紙、12はその上のアル
ミ箔であり、これらは接着剤14で貼り合わされ
ている。
FIG. 1 shows the layer structure of the material of the carrier body. In the figure, 10 is paper, 12 is aluminum foil thereon, and these are bonded together with an adhesive 14.

第2図はキヤリア本体のブランクを示してい
る。まず、16は底壁であり、帯状シートの長手
方向に沿う中心部に区画形成されている。18,
20は上記底壁の左右に区画形成された第一側壁
であり、22,24はさらにその左右に区画形成
された第二側壁である。これら各壁間は折罫26
で区画されている。
FIG. 2 shows a blank of the carrier body. First, reference numeral 16 denotes a bottom wall, which is partitioned at the center along the longitudinal direction of the belt-shaped sheet. 18,
Reference numeral 20 denotes a first side wall that is partitioned on the left and right sides of the bottom wall, and 22 and 24 are second side walls that are further partitioned on the left and right sides thereof. There are 26 fold lines between each of these walls.
It is divided by.

また、28は起立片であり、複数個のものが等
間隔で設けられている。各起立片は底壁16の左
端から始まり左第一側壁18、底壁16、右第一
側壁20を経て底壁の右端で終わる打抜線30で
輪部が形成され、また、打抜線で囲まれた部分を
横断する折罫32で二分される。起立片内には上
記各壁間の折罫は図示の如く設けないのが望まし
い。34は折線との対向端に設けられている切込
である。この切込は打抜線と折罫とで形成されて
いる。また、36は折罫32の左右端に形成され
た上記打抜線の小湾曲部である。
Moreover, 28 is a standing piece, and a plurality of pieces are provided at equal intervals. Each upright piece has a loop formed by a punching line 30 that starts from the left end of the bottom wall 16, passes through the left first side wall 18, the bottom wall 16, the right first side wall 20, and ends at the right end of the bottom wall. It is divided into two by a fold line 32 that crosses the area surrounded by. It is desirable that creases between the walls are not provided in the upright piece as shown in the drawings. 34 is a notch provided at the end opposite to the fold line. This cut is formed by a punch line and a crease. Further, 36 is a small curved portion of the punch line formed at the left and right ends of the fold line 32.

次に、上記ブランクを組立ててキヤリア本体と
する操作について述べる。
Next, the operation of assembling the above blanks to form a carrier body will be described.

第3図のように第一、第二両側壁18,22、
20,24を重合せしめる。これはアルミ箔が外
側にくるように行なう。重合は折罫26にての確
実な折曲げ又は貼着により行なう。なお、上記重
合による段差の発生を解消するか又は緩和するた
め、予め側壁18,22、20,24の重合部分
における紙層の厚さを減らしておくようにしても
よい。そして、この第一、第二側壁18,22、
20,24を底壁16と直角に起立せしめる。な
お、図示のものと反対に第一側壁が第二側壁の外
側に位置するように起立させてもよい。この場
合、キヤリア本体の外壁がすべてアルミ箔で覆わ
れることになる。
As shown in FIG. 3, first and second side walls 18, 22,
20 and 24 are superposed. Do this so that the aluminum foil is on the outside. Polymerization is carried out by securely bending or pasting along the creases 26. In addition, in order to eliminate or alleviate the occurrence of the step difference due to the polymerization, the thickness of the paper layer at the overlapped portions of the side walls 18, 22, 20, and 24 may be reduced in advance. And, these first and second side walls 18, 22,
20 and 24 are made to stand at right angles to the bottom wall 16. In addition, contrary to what is illustrated, the first side wall may be erected so as to be located outside the second side wall. In this case, the entire outer wall of the carrier body will be covered with aluminum foil.

次いで、第4図のように起立片28を起立せし
めて、その切込34を側壁18,20、22,2
4の打抜線30の縁部に食い込ませ、さらには小
湾曲部36と係合せしめる。小湾曲部はストツパ
ーとしての役割を果すことになる。
Next, as shown in FIG.
It bites into the edge of the punched line 30 of No. 4 and further engages with the small curved portion 36. The small curved portion will serve as a stopper.

かくして、キヤリア本体が組立てられたところ
でLSI38が第5図でも示されるように第一側壁
と第二側壁との境界線26に跨架される。この状
態においてLSIの端子40は起立片28に接触せ
ず又起立片の左右端よりも内側に位置している。
また、望ましくはLSIの樹脂部分の幅が側壁1
8,20間の幅にほぼ等しく設定され、かくすれ
ば側壁にも端子40が接触することがない。この
ことは特に超LSIの如き端子が細長い場合に有利
である。又、LSIの端子40は側壁のアルミ箔1
2に接しており静電気はこれを通じて逃げるの
で、帯電によりLSIが破壊されるのが良好に防止
される。
Thus, when the carrier body is assembled, the LSI 38 straddles the boundary line 26 between the first side wall and the second side wall, as shown in FIG. In this state, the terminals 40 of the LSI do not contact the upright piece 28 and are located inside the left and right ends of the upright piece.
Also, preferably the width of the resin part of the LSI is 1
The width is set to be approximately equal to the width between 8 and 20, so that the terminal 40 does not come into contact with the side wall. This is especially advantageous when the terminals are long and narrow, such as in a VLSI. Also, the terminal 40 of the LSI is connected to the aluminum foil 1 on the side wall.
2, and static electricity escapes through this, which effectively prevents the LSI from being destroyed by charging.

しかる後、上記キヤリア本体は第4図、第5図
の如く筒体又は箱体42に収納され、LSI38が
搬送中転動、移動等することのないよう固定され
る。なお、筒体又は箱体を用いないで、適当なカ
バーを被せて粘着テープ等によりキヤリア本体に
固定するようにしてもよい(図示せず)。
Thereafter, the carrier body is housed in a cylinder or box 42 as shown in FIGS. 4 and 5, and is fixed so that the LSI 38 will not roll or move during transportation. Note that, instead of using a cylinder or a box, a suitable cover may be placed on the carrier and fixed to the carrier body using an adhesive tape or the like (not shown).

以上のように、本考案に係るキヤリア本体は金
属箔層を重ねてなるシートをその素材とするので
従来品の如きカーボンブラツクが落下するような
不具合を生じることがない。
As described above, since the carrier body according to the present invention is made of a sheet made of stacked metal foil layers, it does not have the problem of falling carbon black as in conventional products.

また、集積回路の端子を跨架するような構成と
したから搬送中端子が他の部分に触れて屈曲する
ような事故を生じることがない。
Furthermore, since the terminals of the integrated circuit are configured to straddle each other, accidents such as the terminals touching other parts and bending during transportation will not occur.

さらに、本考案のキヤリア本体は扁平に折り畳
み得るのでキヤリア自体の搬送にも便利である。
Furthermore, since the carrier body of the present invention can be folded flat, it is convenient for transporting the carrier itself.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案に係るキヤリア本体の層構成の
説明図である。第2図はキヤリア本体の部分切欠
展開図である。第3図はキヤリア本体の一部組立
斜視図である。第4図は組立を完了したキヤリア
本体にLSIを跨架したものを筒体と共に示す部分
切欠斜視図、第5図は第4図示のものを組合わせ
た状態における垂直断面図である。 10……紙層、12……金属箔層、16……底
壁、18,20,22,24……側壁、28……
起立片、30……打抜線、34……切込、38…
…LSI、40……LSIの端子。
FIG. 1 is an explanatory diagram of the layer structure of the carrier body according to the present invention. FIG. 2 is a partially cutaway exploded view of the carrier body. FIG. 3 is a partially assembled perspective view of the carrier body. FIG. 4 is a partially cutaway perspective view showing a fully assembled carrier body with an LSI straddled over it together with a cylindrical body, and FIG. 5 is a vertical cross-sectional view of the assembled state of the carrier body shown in FIG. 4. 10... paper layer, 12... metal foil layer, 16... bottom wall, 18, 20, 22, 24... side wall, 28...
Standing piece, 30... Punching line, 34... Cut, 38...
...LSI, 40...LSI terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 帯状シートのその長手方向に沿う中心部に底壁
を区画形成し、その左右に第一側壁を区画形成
し、さらにその左右に第二側壁を区画形成し、少
なくとも第一側壁と第二側壁との境界部に金属層
を積層し、かつ、上記底壁の左端から始まり左第
一側壁、底壁、右第一側壁を経て底壁の右端で終
わる打抜線、当該打抜線で囲まれた部分を横断す
る折線及び当該折線との対向端における切込によ
り起立片を複数個構成し、上記第一、第二両側壁
を重合せしめると共に底壁の左右から起立せし
め、上記起立片の切込を上記側壁の上記打抜線縁
部に食い込ませてなる集積回路用キヤリアの本
体。
A bottom wall is defined at the center along the longitudinal direction of the strip sheet, first side walls are defined on the left and right sides of the bottom wall, second side walls are defined on the left and right sides of the bottom wall, and at least the first side wall and the second side wall are defined. A metal layer is laminated at the boundary of the bottom wall, and a punching line starts from the left end of the bottom wall, passes through the first left side wall, the bottom wall, the first right side wall, and ends at the right end of the bottom wall, and is surrounded by the punching line. A plurality of upright pieces are formed by a fold line that crosses the broken part and a cut at the end opposite to the fold line, and the first and second side walls are overlapped and raised from the left and right sides of the bottom wall. A main body of a carrier for an integrated circuit, which is formed by biting into the edge of the punched line of the side wall.
JP18828281U 1981-12-17 1981-12-17 Carrier body for integrated circuits Granted JPS5892736U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18828281U JPS5892736U (en) 1981-12-17 1981-12-17 Carrier body for integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18828281U JPS5892736U (en) 1981-12-17 1981-12-17 Carrier body for integrated circuits

Publications (2)

Publication Number Publication Date
JPS5892736U JPS5892736U (en) 1983-06-23
JPS6140695Y2 true JPS6140695Y2 (en) 1986-11-20

Family

ID=29991718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18828281U Granted JPS5892736U (en) 1981-12-17 1981-12-17 Carrier body for integrated circuits

Country Status (1)

Country Link
JP (1) JPS5892736U (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5895698U (en) * 1981-12-23 1983-06-29 大日本印刷株式会社 Carrier body for integrated circuits

Also Published As

Publication number Publication date
JPS5892736U (en) 1983-06-23

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