JPS6138281Y2 - - Google Patents

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Publication number
JPS6138281Y2
JPS6138281Y2 JP4429079U JP4429079U JPS6138281Y2 JP S6138281 Y2 JPS6138281 Y2 JP S6138281Y2 JP 4429079 U JP4429079 U JP 4429079U JP 4429079 U JP4429079 U JP 4429079U JP S6138281 Y2 JPS6138281 Y2 JP S6138281Y2
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JP
Japan
Prior art keywords
voltage
variable
bias voltage
variable resistor
resistor
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4429079U
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Japanese (ja)
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JPS55144432U (en
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Priority to JP4429079U priority Critical patent/JPS6138281Y2/ja
Publication of JPS55144432U publication Critical patent/JPS55144432U/ja
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  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Description

【考案の詳細な説明】 本考案は同調回路の電圧可変容量素子にバイア
ス電圧を供給するための可変抵抗器を用いた電子
同調受信機に於いて、低域受信周波数の特性を改
善することを目的とするものである。
[Detailed description of the invention] The present invention aims to improve the characteristics of low receiving frequencies in an electronically tuned receiver that uses a variable resistor to supply a bias voltage to the voltage variable capacitance element of the tuning circuit. This is the purpose.

本考案の説明に先立ち、電圧可変容量素子例え
ば電圧可変容量ダイオードと、該電圧可変容量ダ
イオードにバイアス電圧を供給するための可変抵
抗器とを用いた従来のプリセツト電子同調受信機
について、第1図に示す従来例を参照しながら説
明する。
Prior to explaining the present invention, a conventional preset electronic tuning receiver using a voltage variable capacitance element such as a voltage variable capacitance diode and a variable resistor for supplying a bias voltage to the voltage variable capacitance diode will be described in FIG. This will be explained with reference to the conventional example shown in .

第1図に於いて、1は第1チヤンネルCH1から
第nチヤンネルCHnまでのプリセツト設定回
路、Ebは電圧可変容量ダイオードのバイアス電
源、VR1〜VRoは各チヤンネルのプリセツト用微
調可変抵抗器、R1は電圧可変容量ダイオードに
最低動作電圧Vbを供給するための抵抗、S1〜So
は連動するチヤンネル切換用プツシユスイツチ
で、プツシユされたチヤンネルに対応するスイツ
チのみ接点b,cが接続され、他のスイツチは全
て接点a,bが接続される。
In Figure 1, 1 is the preset setting circuit for the first channel CH1 to the nth channel CHn, Eb is the bias power supply for the voltage variable capacitance diode, and VR 1 to VR o are the fine adjustment variable resistors for presetting each channel. , R 1 is a resistance for supplying the minimum operating voltage Vb to the voltage variable capacitance diode, S 1 ~ S o
are interlocking push switches for changing channels; contacts b and c are connected only to the switch corresponding to the pushed channel, and contacts a and b are connected to all other switches.

ANTはアンテナ、2はアンテナ回路、D1は該
アンテナ回路の同調回路を構成する電圧可変容量
ダイオード、3は高周波増幅回路、D2は該高周
波増幅回路の同調回路を構成する電圧可変容量ダ
イオードである。4は混合回路、5は局部発振回
路、D3は該局部発振回路の発振同調回路を構成
する電圧可変容量ダイオード、Cはバイアス電圧
伝達線路Lとアース10間に設けたハイパスコン
デンサ、RB,RB,RBはバイアス電圧伝達線路
Lと各電圧可変容量ダイオードD1,D2,D3との
間に接続した交流阻止用低抗である。6は中間周
波増幅回路、7は検波回路である。
ANT is an antenna, 2 is an antenna circuit, D1 is a voltage variable capacitance diode that constitutes a tuning circuit of the antenna circuit, 3 is a high frequency amplification circuit, and D2 is a voltage variable capacitance diode that constitutes a tuning circuit of the high frequency amplification circuit. be. 4 is a mixing circuit, 5 is a local oscillation circuit, D3 is a voltage variable capacitance diode that constitutes the oscillation tuning circuit of the local oscillation circuit, C is a high-pass capacitor provided between the bias voltage transmission line L and earth 10, R B , R B and R B are alternating current blocking resistors connected between the bias voltage transmission line L and each of the voltage variable capacitance diodes D 1 , D 2 , and D 3 . 6 is an intermediate frequency amplification circuit, and 7 is a detection circuit.

第1図の回路に於いて、電圧可変容量ダイオー
ドD1,D2,D3のバイアス電圧を微調可変抵抗器
VR1〜VRoによつて記憶させ、これを電気的に切
換えることによつて予め各チヤンネル毎に設定し
た周波数を受信するようにしている。
In the circuit shown in Figure 1, a variable resistor is used to finely adjust the bias voltage of the voltage variable capacitance diodes D 1 , D 2 , and D 3.
By storing VR 1 to VR o and electrically switching these, a frequency set in advance for each channel is received.

微調可変抵抗器VR1〜VRoは第2図に示す様に
従来のスライドボリウムの構造を基本とし、抵抗
値の調整をツマミ8の回転によつて行なうもので
あり、可変抵抗器の可動部(摺動子)(図示せ
ず)の移動量を示すため、ポインタ9が可変抵抗
器の摺動子に直結されている。又可変抵抗器の変
化特性は、製造し易さ、抵抗変化特性のバラツ
キ、及び環境変化特性に有利な直線型Bカーブが
採用されているが、その特性は第3図に示す様に
回転の始めと、終りの部分で不連続部分が生じる
ことがあつた。この可変抵抗器の不連続特性は、
電圧可変容量ダイオードに印加するバイアス電圧
の不連続特性、即ち受信周波数とび現象がなる。
特に電圧可変容量ダイオードの電圧−容量変化特
性が、低いバイアス電圧の時大きいので、受信周
波数の低域をカバーする周波数設定の時間題とな
る。例えば欧州向けFMバンド受信機の場合、受
信周波数88.5〜108.0MHzの設定に対して抵抗変
化を△Rl=△Rh=△1/60ROとした時、〔但し△ Rl,△Rhは夫々可変抵抗器の回転の始め、及び
終りの不連続部分に対応する抵抗値、ROは可変
抵抗器の最大値。〕低域での周波数とびは約1M
Hz、高域での周波数とびは約150KHzとなり、特
に低域をカバーする周波数の設定に問題があるこ
とがわかる。
As shown in Figure 2, the fine adjustment variable resistors VR 1 to VR o are based on the structure of a conventional slide volume, and the resistance value is adjusted by rotating the knob 8. In order to indicate the amount of movement of a slider (not shown), a pointer 9 is directly connected to the slider of the variable resistor. In addition, the linear B curve is adopted for the variable resistor's change characteristics, which is advantageous for ease of manufacture, variation in resistance change characteristics, and environmental change characteristics. Discontinuities sometimes occurred at the beginning and end. The discontinuous characteristic of this variable resistor is
This results in discontinuous characteristics of the bias voltage applied to the voltage variable capacitance diode, that is, a phenomenon in which the receiving frequency jumps.
In particular, since the voltage-capacitance change characteristic of a voltage variable capacitance diode is large when the bias voltage is low, it becomes a time problem in setting a frequency that covers the low range of the receiving frequency. For example, in the case of an FM band receiver for Europe, when the resistance change is △Rl = △Rh = △1/60RO for the receiving frequency setting of 88.5 to 108.0MHz, [however, △Rl and △Rh are variable resistors respectively. The resistance values corresponding to the discontinuous parts at the beginning and end of rotation, RO is the maximum value of the variable resistor. ] Frequency jump in low range is approximately 1M
Hz, the frequency jump in the high range is approximately 150KHz, which indicates that there is a problem with the frequency settings that cover the low range in particular.

第4図は第1図の回路を用いた場合の受信周波
数特性を示したものであり、各可変抵抗器VR1
VR2,VR3のバラツキにより第1チヤンネルでは
△Fl1、第2チヤンネルでは△Fl2、第3チヤンネ
ルでは△Fl3の不連続部が生じることを示したも
のであるが、高域ではこの不連続部は非常に小さ
いので、特に問題とならない。
Figure 4 shows the reception frequency characteristics when the circuit of Figure 1 is used, and each variable resistor VR 1 ,
This shows that discontinuities occur in △Fl 1 in the first channel, △Fl 2 in the second channel, and △Fl 3 in the third channel due to variations in VR 2 and VR 3 . Since the discontinuity is very small, it does not pose a particular problem.

斯様に従来のプリセツト電子同調受信機では、
可変抵抗器で設定できる最低受信周波数付近及び
最高受信周波数付近で、可変抵抗器の不連続部分
が原因となつて周波数とび現象が生じることがあ
つた。そして一般に使用されている直線変化型
(JIS B特性)の可変抵抗器の場合、特に最低受
信周波数付近に於いてこの周波数とびの範囲が広
いため、公称最低受信周波数と、セツトの実際の
最低受信周波数との差を非常に大きくとる必要が
あつた。
In this way, in conventional preset electronic tuning receivers,
Frequency skipping phenomenon sometimes occurred near the lowest receiving frequency and near the highest receiving frequency that can be set with the variable resistor due to discontinuous portions of the variable resistor. In the case of commonly used linear variable type (JIS B characteristics) variable resistors, the range of frequency jumps is wide, especially near the lowest receiving frequency, so the nominal lowest receiving frequency and the actual lowest receiving frequency of the set are different. It was necessary to make a very large difference from the frequency.

ところが欧州では商用FMバンドのすぐ下にポ
リス無線バンドがあり、法律によつてFMバンド
の最低受信周波数が厳しく規制されており、第1
図の様な従来の回路方式ではこれに対応不可能で
あつた。
However, in Europe, there is a police radio band just below the commercial FM band, and the minimum reception frequency of the FM band is strictly regulated by law.
The conventional circuit system shown in the figure was not able to cope with this problem.

本考案は斯る点に鑑み、可変抵抗器の不連続部
分による周波数とびの改善を電気的に行なう様に
したもので、以下本考案の一実施例を第5図、第
6図に従い説明する。
In view of this point, the present invention is designed to electrically improve the frequency jump caused by the discontinuous portion of the variable resistor.One embodiment of the present invention will be described below with reference to Figs. 5 and 6. .

第5図は本考案の電子同調受信機を示す要部回
路図である。第5図はプリセツト設定回路1′内
に於いて、プリセツト設定用の各可変抵抗器VR1
〜VRoに並列に、低域の受信周波数をカバーする
バイアス電圧調整用の固定抵抗R2と半固定抵抗
R3を直列接続し、該半固定抵抗R3の摺動子11
とバイアス電圧伝達線路Lとの間に第1の逆流防
止用ダイオードD4を接続し、該第1の逆流防止
用ダイオードのカソードと各チヤンネル切換用ブ
ツシユスイツチS1〜Soの接点Cとの間に第2の
逆流防止用ダイオードD5を接続している。そし
て電圧可変容量ダイオードD1,D2,D3には、可
変抵抗器VR1〜VRoからのバイアス電圧とは別
に、予備バイアス電圧を印加する様にしている。
その他の構成は第1図の回路と同一である。
FIG. 5 is a circuit diagram of the main parts of the electronic tuning receiver of the present invention. Figure 5 shows each variable resistor VR 1 for preset setting in the preset setting circuit 1'.
~ In parallel with VR o , a fixed resistor R 2 and a semi-fixed resistor for bias voltage adjustment covering the low reception frequency
R 3 are connected in series, and the slider 11 of the semi-fixed resistor R 3
and the bias voltage transmission line L, and between the cathode of the first backflow prevention diode and the contact C of each channel switching button switch S1 to S0 . A second backflow prevention diode D5 is connected to the terminal. A preliminary bias voltage is applied to the voltage variable capacitance diodes D 1 , D 2 , and D 3 in addition to the bias voltages from the variable resistors VR 1 to VR o .
The rest of the configuration is the same as the circuit shown in FIG.

斯様に構成してなる電子同調受信機に於いて、
プリセツト用可変抵抗器VR1〜VRoの最低値付近
での不連続部分の電圧分を△VR、半固定抵抗R3
によつて調整される電圧を△Vb、ダイオードD4
の端子間電圧をVdとすると、△Vb−Vd>△V
R、となる様に固定抵抗R2及び半固定抵抗R3を設
定すれば、低域受信周波数での周波数とびを無く
すことが可能となる。即ち、可変抵抗器VR1
VRoからのバイアス電圧が、抵抗R2と半固定抵抗
R3とより構成される予備バイアス設定手段にて
設定される電圧可変容量ダイオードへの印加電圧
よりも低い場合には、逆流防止用ダイオードD5
は逆バイアス状態にある為、カツトオフされてお
り、前記バイアス電圧が前記印加電圧(予備バイ
アス電圧)より高くなると、逆流防止用ダイオー
ドD5が順バイアスされ、オンとなり可変抵抗器
からのバイアス電圧が電圧可変容量ダイオードへ
印加されるようになる。尚このとき、逆流防止用
ダイオードD4は逆バイアスとなり、カツトオフ
されている為、予備バイアス電圧の供給は阻止さ
れる。
In the electronically tuned receiver configured in this way,
The voltage of the discontinuous part near the lowest value of the preset variable resistor VR 1 to VR o is △V R , and the semi-fixed resistor R 3
The voltage regulated by △Vb, diode D 4
If the voltage between the terminals of is Vd, △Vb−Vd>△V
By setting the fixed resistor R 2 and semi-fixed resistor R 3 so that R , it is possible to eliminate frequency jumps at low reception frequencies. That is, the variable resistor VR 1 ~
The bias voltage from VR o is connected to resistor R 2 and semi-fixed resistor
When the voltage applied to the voltage variable capacitance diode is lower than the voltage applied to the voltage variable capacitance diode set by the preliminary bias setting means consisting of R 3 , the reverse current prevention diode D 5
is cut off because it is in a reverse bias state, and when the bias voltage becomes higher than the applied voltage (preliminary bias voltage), the reverse current prevention diode D5 is forward biased and turned on, and the bias voltage from the variable resistor is reduced. The voltage is now applied to the variable capacitance diode. At this time, the reverse current prevention diode D4 becomes reverse biased and is cut off, so that the supply of the preliminary bias voltage is blocked.

第6図は第5図の回路を用いた場合の受信周波
数特性を示す図である。
FIG. 6 is a diagram showing reception frequency characteristics when the circuit of FIG. 5 is used.

尚、可変抵抗器の不連続部分による周波数とび
を改善するために、プリセツト用の各可変抵抗器
の可変範囲をネジ等で機械的に制限し、各可変抵
抗器が不連続部分で使用されない様にすることも
考えられるが、この方法であれば、各可変抵抗器
毎に調整が必要であるから調整個所が多く、又ス
ペースを大きくとる欠点がある。
In addition, in order to improve the frequency jump caused by discontinuous parts of the variable resistors, the variable range of each preset variable resistor is mechanically limited with screws, etc., so that each variable resistor is not used in discontinuous parts. However, this method has the disadvantage that adjustment is required for each variable resistor, requiring many adjustment points and requiring a large amount of space.

これに対し、第5図の実施例の様に可変抵抗器
の不連続部分による周波数とびの改善を電気的に
行なう様にすれば、周波数とびの改善のためには
半固定抵抗R3のみを調整するだけでよいので、
調整個所が少なく、調整もし易い。又スペースを
とらず、コストも安い。等の利点がある。
On the other hand, if the frequency jump is electrically improved by the discontinuous portion of the variable resistor as in the embodiment shown in Fig. 5, only the semi-fixed resistor R3 is required to improve the frequency jump. All you have to do is adjust it.
There are few adjustment points and it is easy to adjust. Moreover, it does not take up much space and is inexpensive. There are advantages such as

以上の様に本考案は、同調回路の電圧可変容量
素子にその容量値を設定するためのバイアス電圧
を供給する可変抵抗器を備えた電子同調受信機に
おいて、前記可変抵抗器からのバイアス電圧と異
なる予備バイアス電圧を設定する予備バイアス設
定手段と、前記可変抵抗器からのバイアス電圧が
所定レベル以下にあるとき予備バイアス設定手段
からの予備バイアス電圧を前記電圧可変容量素子
に印加し、前記バイアス電圧が所定レベル以上に
あるとき前記可変抵抗器からのバイアス電圧を前
記電圧可変容量素子に印加する手段とを設けたの
で、簡単な構成にて可変抵抗器の不連続部分に起
因する周波数とびを改善することが出来る。
As described above, the present invention provides an electronic tuning receiver equipped with a variable resistor that supplies a bias voltage for setting a capacitance value to a voltage variable capacitance element of a tuning circuit. preliminary bias setting means for setting different preliminary bias voltages, and applying a preliminary bias voltage from the preliminary bias setting means to the voltage variable capacitance element when the bias voltage from the variable resistor is below a predetermined level; means for applying the bias voltage from the variable resistor to the voltage variable capacitance element when the variable resistor is at a predetermined level or higher, the frequency jump caused by the discontinuous portion of the variable resistor can be improved with a simple configuration. You can.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の電子同調受信機を示す要部回路
図、第2図は電子同調受信機に使用されるプリセ
ツト用可変抵抗器の構造を示す斜視図、第3図は
プリセツト用可変抵抗器の摺動子の移動量に対す
る抵抗値の変化特性を示す図、第4図は第1図の
回路を用いた場合の受信周波数特性図、第5図は
本考案に係る電子同調受信機の要部回路図、第6
図は第5図の回路を用いた場合の受信周波数特性
図である。 2……アンテナ回路、3……高周波数増幅回
路、5……局部発振回路、D1,D2,D3……電圧
可変容量ダイオード、VR1〜VRo……可変抵抗
器、R2……固定抵抗、R3……半固定抵抗、D4
D5……逆流防止用ダイオード。
Figure 1 is a circuit diagram of the main parts of a conventional electronic tuning receiver, Figure 2 is a perspective view showing the structure of a variable resistor for presetting used in an electronic tuning receiver, and Figure 3 is a variable resistor for presetting. Fig. 4 is a diagram showing the reception frequency characteristics when the circuit shown in Fig. 1 is used, and Fig. 5 shows the main points of the electronically tuned receiver according to the present invention. Part circuit diagram, 6th
The figure is a receiving frequency characteristic diagram when the circuit of FIG. 5 is used. 2...Antenna circuit, 3...High frequency amplifier circuit, 5...Local oscillation circuit, D1 , D2 , D3 ...Voltage variable capacitance diode, VR1 to VR o ...Variable resistor, R2 ... ... Fixed resistance, R 3 ... Semi-fixed resistance, D 4 ,
D 5 ... Diode for backflow prevention.

Claims (1)

【実用新案登録請求の範囲】 (1) 同調回路の電圧可変容量素子にその容量値を
設定するためのバイアス電圧を供給する可変抵
抗器を備えた電子同調受信機において、前記可
変抵抗器からのバイアス電圧と異なる予備バイ
アス電圧を設定する予備バイアス設定手段と、
前記可変抵抗器からのバイアス電圧が所定レベ
ル以下にあるときこの予備バイアス設定手段か
らの予備バイアス電圧を前記電圧可変容量素子
に印加し、前記バイアス電圧が所定レベル以上
にあるとき前記可変抵抗器からのバイアス電圧
を前記電圧可変容量素子に印加する手段とを設
けたことを特徴とする電子同調受信機。 (2) 電圧可変容量素子は、電圧可変容量ダイオー
ドであることを特徴とする実用新案登録請求の
範囲第1項記載の電子同調受信機。 (3) 可変抵抗器は、プリセツト用の可変抵抗器で
あることを特徴とする実用新案登録請求の範囲
第1項記載の電子同調受信機。 (4) 予備バイアス設定手段が、可変抵抗器に並列
接続された固定抵抗と半固定抵抗との直列回路
にて構成されており、前記半固定抵抗により設
定電圧が調整自在となつていることを特徴とす
る実用新案登録請求の範囲第1項記載の電子同
調受信機。
[Claims for Utility Model Registration] (1) In an electronic tuning receiver equipped with a variable resistor that supplies a bias voltage for setting a capacitance value to a voltage variable capacitance element of a tuning circuit, preliminary bias setting means for setting a preliminary bias voltage different from the bias voltage;
When the bias voltage from the variable resistor is below a predetermined level, a pre-bias voltage from the pre-bias setting means is applied to the voltage variable capacitance element, and when the bias voltage is above a predetermined level, the pre-bias voltage from the variable resistor is applied. and means for applying a bias voltage of 1 to the voltage variable capacitance element. (2) The electronic tuning receiver according to claim 1, wherein the voltage variable capacitance element is a voltage variable capacitance diode. (3) The electronic tuning receiver according to claim 1, wherein the variable resistor is a variable resistor for presetting. (4) The preliminary bias setting means is composed of a series circuit of a fixed resistor and a semi-fixed resistor connected in parallel to a variable resistor, and the set voltage can be adjusted by the semi-fixed resistor. An electronic tuning receiver according to claim 1, characterized in that it is a utility model.
JP4429079U 1979-04-03 1979-04-03 Expired JPS6138281Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4429079U JPS6138281Y2 (en) 1979-04-03 1979-04-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4429079U JPS6138281Y2 (en) 1979-04-03 1979-04-03

Publications (2)

Publication Number Publication Date
JPS55144432U JPS55144432U (en) 1980-10-16
JPS6138281Y2 true JPS6138281Y2 (en) 1986-11-05

Family

ID=28920323

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4429079U Expired JPS6138281Y2 (en) 1979-04-03 1979-04-03

Country Status (1)

Country Link
JP (1) JPS6138281Y2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5834427U (en) * 1981-08-28 1983-03-05 三洋電機株式会社 electronic tuning circuit

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Publication number Publication date
JPS55144432U (en) 1980-10-16

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