JPS6137749B2 - - Google Patents

Description

Detailed Description of the Invention The present invention rectifies DC voltage to convert it into DC voltage such as pulsating current, and adds this to an inverter to obtain high-frequency AC. The purpose of this system is to provide load detection means for determining the load and, when the detection means is activated, to simultaneously provide a power supply variable means that suddenly lowers the power supply voltage, thereby protecting the switching elements, which are the central part of the inverter, from withstand voltage. be.

With conventional devices of this kind that have a load detection function, when inverter oscillation is stopped at the same time as load detection, an abnormally high voltage is applied to the switching elements that cause the inverter to oscillate, causing an accident that destroys them. For example, in the case of the inverter described later,
When the power supply voltage is 240V, a voltage of about 800V to 1000V is generated between the anode and cathode of the GTO thyristor 6 due to the resonance of the chiyoke coil 4 and the resonant capacitor 12, which is higher than the rated voltage of this element.

The present invention has been made in consideration of such circumstances, and will be described in detail below with reference to Examples.

Figure 1 shows the power supply and inverter parts,
1 is a DC power supply, 2 is a switch, 3 is a rectifier circuit, 4
is a chiyoke coil, and 5 is a smoothing capacitor.
This smoothing capacitor 5 is for bypassing high frequency current, and its capacitance is small. Therefore, a pulsating voltage obtained by full-wave rectification of alternating current is obtained across the smoothing capacitor 5. Reference numeral 6 denotes a gate turn-off (GTO) thyristor used as a unidirectional semiconductor switching element, and a transistor can also be used instead. 7 is a diode connected anti-parallel to GTO thyristor 6, 8 is
A snapper circuit connected in parallel to the GTO thyristor 6, consisting of a series circuit of a capacitor 9 and a resistor 10. 11 is an induction heating coil, and 12 is a resonant capacitor, which is connected in series to the induction heating coil 11. 13 is a cooking pot made of iron, stainless steel, etc.; 14 is a gate drive circuit that provides an on/off signal to the gate of the GTO thyristor 6; The above GTO thyristor 6, diode 7,
An inverter 15 is configured by the induction heating coil 11 and the resonant capacitor 12. V _C is a pulsating power supply terminal that outputs a pulsating power supply voltage V _C , and V _A is a voltage V applied between the anode and cathode of the diode 7.
The output terminal that outputs _A , V _S , is the voltage signal V _S from the capacitor 9 and resistor 10 connection stage of the snapper circuit 8.
This is an output terminal that outputs .

Next, a control and drive circuit for the inverter 15 having the above configuration will be explained. In Figure 2, 16
17 is a control circuit, and 17 is an oscillation drive circuit. The operation of the control circuit 16 is represented by the waveform shown in FIG. 3a, and the operation of the oscillation drive circuit 17 is represented by the waveform shown in FIG. 3b. Here, the waveform frequency in Figure 3a is twice the frequency of DC (50/60Hz), or
100/120 Hz, and the waveform frequency shown in FIG. 3b is the oscillation frequency of the inverter, that is, a high frequency from about 20 KHz to about 40 KHz.

Voltages V _C and V _S are input to the control circuit 16 from terminals V _C and V _S , respectively. Reference numeral 19 denotes a comparator to which the signal V _S and the divided voltage of the pulsating current voltage V _C are input, and the output thereof is input to the reset terminal of the flip-flop _FF1 . Furthermore, this flip-flop
The flip-flops used in this example, including FF ₁ , are constructed by combining two NAND gates.
It operates by an inverted signal from "H" level to "L" level. A pulsating voltage signal (voltage V
This _pulsating voltage output is input to the comparator 21. On the other hand, to the other input terminal of this comparator 21, a DC voltage V _CC serving as a reference level is applied. 22 is a comparator 21
A differentiation circuit 23 for differentiating the output of the differential circuit 23 is an inverting circuit for inverting the differential output, and its output is input to the set terminal of the flip-flop _FF1 . The output of flip-flop FF ₁ is sent to the next stage flip-flop FF ₂ via a differentiating circuit 24 and an inverting circuit 25.
input to the reset terminal. flip flop
An oscillation start signal Vstart is applied to the set terminal of FF ₂ , and its output is applied to the oscillation drive circuit 17 to control oscillation. flip flop
The output of FF ₂ is also a monostable multivibrator 26
It operates by inputting an input to the signal, and after inputting the signal, it produces an output for a certain period of time. This output is
7 to the discharge circuit 28 and drives it. The discharge signal Vdischarge1 generated when the oscillation start signal is output is input to the OR gate 27, and the output from the monostable multivibrator 26 is superimposed and output as the discharge signal Vdischarge2 to the discharge circuit 2.
8. The discharge circuit 28 functions as a power supply variable means for discharging the power supply voltage charged in the smoothing capacitor 5, and during its operation,
The power supply of the inverter 15 suddenly decreases. The oscillation drive circuit 17 is a circuit that causes the inverter 15 to oscillate at a high frequency, and sends an on/off signal to the gate drive circuit 14.
It gives Vout. 29 is a NAND gate whose input is the output of flip-flop FF ₂ ;
FF ₃ is a flip-flop to which the output of the NAND gate 29 is input to a set terminal, and an oscillation start signal Vstart is applied to this set terminal via a differentiating circuit 30 and an inverting circuit 31. The above gate drive signal is applied to the output of flip-flop FF ₃ .
Vout and its inverted signal are obtained,
passes through a timer 32 consisting of a time constant circuit,
The signal is applied to the ON signal generation circuit 33. The ON signal generated by the ON signal generation circuit 33 is fed back to the flip-flop FF ₃ via the NAND gate 29, and the ON signal is obtained at the output Vout. 34 is an off signal generation circuit, and the diode 7 cathode side voltage V
_A is input, and a signal is output when this voltage changes from positive to negative. This off signal is input to the reset terminal of flip-flop FF ₃ , and output
Get an off signal on Vout.

Next, the operation will be explained. The waveforms shown in FIGS. 3a and 3b represent the waveforms at each point in FIG. 2. Waveform V _C
In the normal heating operation, that is, the appropriate load heating operation shown in period _T1 , first, by closing switch 2,
The oscillation start signal Vstart is inverted to "H" level.
Along with this, the discharge signal Vdischarge1 (“L”
level pulse) is output and reduces the power supply at startup. This serves to prevent startup noise that occurs when power is suddenly supplied.

The AC input passes through the rectifier circuit 20 and then to the comparator 21.
and is compared with the reference level V _CC . The comparator 21 outputs a pulse signal that becomes "L" level at the pulsating voltage trough where the pulsating voltage falls below the reference level. This signal is differentiated and inverted, becomes a signal, and is input to the set terminal of flip-flop _FF1 . On the other hand, during normal heating, the output V _S of the snapper circuit 8 has a relatively small value, so it does not exceed the reference signal obtained by dividing the voltage V _CC , and the output of the comparator 19 is “H”. “Kept at the level.

An additional note regarding the snapper circuit 8 is that during normal heating, energy absorption into the load is large, so the negative portion of the load current I1 (Fig. 3), that is, the current flowing through the diode 7, is small, so that at the end of discharge, The current a appearing on the positive side also becomes smaller. This current a is due to the discharge of the charge in the diode 7. On the other hand, in the case of no load or heating of a small load, the energy absorption into the load is small, so the voltage flowing through the diode 7 is large, and therefore the value of the current a appearing on the positive side at the end of discharge is also large. Become. Thus, the output terminal voltage V _S of the snapper circuit 8 is small when the load is properly heated, and becomes large when the load is improperly heated, and the load can be detected by determining the magnitude of the signal V _S .

Returning to the explanation of the operation of the control circuit 16. The signal is
Since it is held at the "H" level, the output signal of the flip-flop FF ₁ remains at the "H" level and does not change.
Input to the reset terminal of FF ₂ . Therefore, flip-flop FF ₂ does not operate and the output is “H”.
fixed at the level. This signal is applied to the oscillation drive circuit 17 as a control signal, specifically, an inhibition or inhibition release signal Vinhibit. This output is now at the "H" level, that is, the inhibition is released.

The oscillation start signal Vstart is differentiated, converted into a pulse signal, further inverted, and applied as an "L" level trigger pulse to the flip-flop _FF3 to generate an on signal at the output Vout. It should be noted that, as described above, at the time of such startup, the discharge circuit 28 operates to rapidly lower the voltage V _C .

The operation of the oscillation drive circuit 17 will be explained. Flip-flop FF ₃ set by the start signal is
An on signal is issued to Vout to turn on the GTO thyristor 6 via the gate drive circuit 14.
As a result, the charge accumulated in the resonant capacitor 12 flows through the induction heating coil 11 and the GTO thyristor 6. This is shown by load current I1. Note that in the waveform diagram, the above current direction is assumed to be positive. When this discharging ends, the electric charge charged in the resonant capacitor 12 in the opposite direction due to this discharging is discharged, but at this time, the cathode voltage V _A of the diode 7 is reversed from positive to negative. This change in voltage V _A is detected by the off signal generating circuit 34, and in synchronization with this, a signal is generated and flip-flop FF ₃ is reset. Flip-flop _FF3 thus generates an off signal at the output Vout, turning off GTO thyristor 6. Thereafter, the timer 32 that determines the OFF period of the GTO thyristor 6 operates by switching the inverted signal of the output Vout to "H" level, and when the output voltage reaches a certain value, the ON signal generation circuit 33 operates and generates a pulse signal. Output. This signal passes through NAND gate 29 to flip-flop _FF3 , setting it and generating an on signal at Vout. Thus, the output Vout is approximately 20 KHz
This becomes a high frequency signal of about 40 KHz, and the inverter 15 oscillates at this frequency.

Next, assume that the load is replaced from the appropriate load to the accessory load at time _t1 . In such a case, comparator 19
An "L" level signal appears at the output of the flip-flop FF1, which resets the flip-flop _FF1 . Therefore, its output changes to the "L" level and remains at this level until the arrival of the next input set signal.

The rising edge of the signal is detected by the differentiating circuit 24, passes through the inverting circuit 25, and is sent to the flip-flop _FF2.
is added to reset this. As a result, the output of the flip-flop _FF2 changes to the "L" level, the NAND gate 29 at the next stage is closed, and the operation of the oscillation drive circuit 17 is prohibited. Thus, even if the load detection time is at the peak of the pulsating voltage, the oscillation of the inverter 15 is actually stopped at the trough of the pulsating voltage.

When the oscillation is stopped, the signal operates the discharge circuit 28 for a certain period of time via the monostable multivibrator 26 and the OR gate 27, thereby discharging the power supply voltage.

To explain this discharge, when the GTO thyristor 6 is in the off state, the anode-cathode voltage V _GTO (equal to V _A ) can be approximated by the following equation.

V _GTO E−{V _O +RI _O )}exp(−αt)cosω
t Here, E is the applied voltage, R is the resistance in the inverter circuit, L is the choke coil 4, C is the resonant capacitor 12, V _O is the voltage of the resonant capacitor 12 just before the GTO thyristor turns off, I _O
is the fourth current in the chiyoke coil just before the GTO thyristor turns off, α=R/2L, ω=1/√
It is. According to the above formula, if load detection is performed at a high applied voltage, the GTO thyristor 6 is turned on at a low applied voltage after continuing oscillation.
It can be seen that unless turned off, the voltage V _GTO increases in proportion to the applied voltage. In order to deal with this, in the present invention, when the oscillation is stopped, the smoothing capacitor 5
By discharging the electrical charge, the voltage E in the above equation is lowered. If such a discharging operation is performed at the trough of the pulsating voltage, the voltage drop value will be even lower. In this way, when the GTO thyristor 6 continues to be cut off, the rise in voltage between the anode and cathode that appears is suppressed, and the same voltage is applied.
GTO thyristor 6 can be protected.

Next, a case will be described in which an inappropriate load is detected at the same time as startup. Oscillation start signal at startup time t ₂
Assuming that Vstart is input and load detection is performed immediately after that, the startup signal is first set by the signal Vstart to flip-flop FF ₃ , outputs the gate-on signal Vout, and the GTO thyristor 6 turns on.
It turns off and starts oscillating. However, immediately after that, the output of the comparator 19 emits an "L" level pulse and resets the flip-flop _FF1 .
Next, flip-flop FF ₂ is reset, so the output is inverted to "L" level, and NAND gate 2 is reset.
Close 9. Therefore, the ON signal is blocked by this gate 29, and the transmission of the ON signal to the GTO thyristor 6 is prevented. Thus, inverter 1
The oscillation of No. 5 stops immediately after starting. Note that in this case as well, the discharge circuit 28 operates, and discharge is performed at the same time as the oscillation is stopped.

In conventional cooking appliances, when the load is detected at the peak of the pulsating power supply voltage and the GTO thyristor is turned off at the same time, the resonance of the chiyoke coil 4 resonant capacitor 12 causes the switching elements such as the GTO thyristor to experience voltage exceeding the rated voltage.
A voltage of 800V (when the power supply voltage is 240V) is applied,
Accidents that destroyed this have occurred, but in the present invention, the oscillation stop is synchronized with the trough of the pulsating power supply voltage, and at the same time, the power supply voltage charged in the smoothing capacitor is discharged. Therefore, the voltage applied to the switching element is approximately 20V or approximately
It falls within the range of 200V (in the case of a power supply voltage of 240V), and can be set to a value sufficiently lower than the upper limit breakdown voltage of the element. In this example, the inverter oscillation was stopped at the pulsating current voltage valley, and at the same time the power supply voltage was discharged. By doing so, the purpose of lowering the voltage applied to the switching element can also be achieved. In this case, the voltage applied to the switching element is approximately 2 times lower than when no discharge circuit is added.
It can be lowered by a certain amount. In this example,
Set the power to 1300W, and at the peak of the pulsating voltage,
It was confirmed that when the GTO thyristor is shut off, the voltage between its terminals is approximately 680V. For comparison, a similar circuit was used without operating the discharge circuit, and the voltage was approximately 910V. G.T.O.
Even when using not only a thyristor but also a switching element that can flow a large current such as an SCR, it is possible to achieve a voltage drop of about 20% as described above in a lower voltage range. By this action, the purpose of voltage protection of the switching element is achieved. Furthermore, in the present invention, the suitability or unsuitability of the load is detected by comparing the snapper voltage between the switching element terminals and the DC power supply voltage to the inverter. However, these factors change in proportion to each other, and the detection state does not change for the same load, allowing stable load detection.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an inverter section according to an embodiment of the present invention, FIG. 2 is a circuit diagram showing a control section and a driving section in the same example, and FIGS. 3a and 3b are signal waveform diagrams of the same example. 14... Gate drive circuit, 15... Inverter, 1
6... Control circuit, 17... Oscillation drive circuit, 28... Discharge circuit.

Claims (1)

[Claims] 1. A DC power supply, an inverter circuit connected to this DC power supply and consisting of a switching element, an induction heating coil, and a resonant capacitor, a snapper circuit that detects the snapper voltage between the switching element terminals of the inverter circuit, and the output of this snapper circuit. A load detection means compares the DC voltage with the above-mentioned DC voltage and determines whether the load consisting of a cooking pot disposed close to the induction heating coil is suitable or not; and the load detection means operates in conjunction with the detection of an unsuitable load by the load detection means. An induction heating cooker characterized by being equipped with a power source variable means for rapidly reducing the power source voltage.