JPS6134135B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an input/output circuit, particularly to an input/output circuit for a camera.

Semiconductor integrated circuit devices (ICs) are used to electrically perform various controls in cameras. For example, ICs have come to be used in so-called self-timer systems that automatically open and close the shutter to take pictures after a certain period of time has elapsed after setting up the camera. By the way, in such a system, it is desired to display whether or not the system is in operation. For example, in order to operate a self-timer in a camera IC, the self-timer circuit is activated based on the operation of the release switch to set the time, and when the set time has elapsed, the shutter control logic circuit automatically activates the self-timer. In this case, it is necessary to incorporate a display circuit to indicate that the system is in operation from the start of operation of the release switch to the opening and closing of the shutter. Generally, such a circuit configuration requires at least an input terminal for applying an input signal for starting the system and an output terminal for display.

However, in ICs including camera ICs, the number of terminals on a package is limited, and an increase in the number of terminals is not desirable. Therefore, the number of terminals in other logic parts is restricted. In the worst case, the required logic circuit cannot be constructed.

Therefore, an object of the present invention is to reduce the number of terminals by sharing the input terminal and output terminal in an input/output circuit with one terminal.

That is, the first invention provides an input/output common terminal 2, a display device LED and a switch means SW connected in parallel between the input/output common terminal 2 and the ground potential.
a first transistor Q1 whose base responds to the input signal level of the input/output common terminal ₂ ; a counting means 3 responsive to the collector output signal of the first transistor _Q1 and to which a clock pulse φ is applied; A second transistor _Q2 whose base responds to the output Q of the counting means 3 and whose collector supplies a display drive signal to the input/output common terminal ₂ ; A bias circuit R ₃ , D ₁ , D ₂ connected between the input/output common terminal 2 is provided, and the first transistor Q ₁ is rendered non-conductive by switching the switch means SW from on to off. is switched to a conductive state to cause the counting means 3 to start counting the clock pulses φ, and the output Q of the counting means 3 causes the second The transistor Q ₂ is turned on and the display device LED is connected via the input/output common terminal 2.
The display drive signal is supplied to the above display device LED.
After the counting means 3 has completed counting a predetermined number of the clock pulses φ, the output Q of the counting means Q causes the second transistor to
The present invention is characterized in that the display on the display device LED is stopped by controlling Q ₂ to a non-conductive state.

That is, the second invention provides an input/output common terminal, a display device LED connected between the power supply Vcc and the input/output common terminal, and a display device connected between the input/output common terminal and the ground potential. Switch means SW
a first transistor _Q10 whose base responds to the input signal level of the input/output common terminal; a counting means responsive to the collector output signal of the first transistor _Q10 and to which a clock pulse is applied; a second transistor Q ₂₀ that responds to the output of the counting means and supplies a display drive signal from its collector to the input/output common terminal;
The switch means includes a bias circuit _R30 connected between the power supply Vcc, the base of the first transistor _Q10 , and the input/output common terminal.
By switching the SW from off to on, the first
Transistor Q ₁₀ is switched from a conductive state to a non-conductive state to cause the counting means to start counting the clock pulses, and the output of the counting means before the counting means completes counting of the predetermined number of clock pulses causes the clock pulses to be counted. The two transistors _Q20 are controlled to be conductive to supply a display drive signal to the display device LED through the input/output common terminal to cause the display device LED to display, and the counting means calculates a predetermined number of the clock pulses. After the counting is completed, the second transistor _Q20 is controlled to be non-conductive by the output of the counting means to stop the display on the display device LED.

The present invention will be explained below using an example in which the present invention is applied to an IC for a camera. FIG. 1 is a circuit diagram showing an embodiment of the present invention.

Since the switch means SW is turned on before the self-timer activation command is issued, the light emitting element LED connected to the input/output common terminal 2 is not lit.

On the other hand, when the self-timer operation command is issued, the switch means SW is switched from on to off.
In the input/output circuit 1, a current begins to flow from the power supply Vcc to the base of the transistor _Q1 through the resistor _R3 and the diode _D1 , and the transistor _Q1 is turned on and its collector potential becomes low level.

On the other hand, as shown in FIG. 2, since the signal from the camera release switch is at a low level, in the counting circuit 3, the output of the NOR circuit NOR1 is at a high level. At this time, since the output of the NAND circuit NAND2 is at high level, both inverter circuits INV1 and INV
The output of NOR circuit NOR2 becomes low level, the output of OR circuit OR becomes low level, and the output of NOR circuit NOR2 becomes high level. Therefore, the set-reset type flip-flop circuit F/F2 is in a reset state, and its output Q is at a low level, so that the transistor _Q2 of the input/output circuit 1 is turned on. Therefore, current flows to the light emitting element LED via the emitter-collector path of this transistor _Q2 , the resistor _R5 , the input/output common terminal 2, and the resistor _R6 , and the light emitting element LED
starts to turn on.

On the other hand, as described above, since the output of the NOR circuit NOR1 becomes high level, the signal applied to the data input terminal D of the delay flip-flop circuit F/F1 via the inverter circuit INV3 becomes low level. Therefore, when the clock signal φ applied to the flip-flop circuit F/F1 changes from low level to high level, the output Q of F/F1 goes to low level, and the plurality of trigger type flip-flop circuits F/F3 and F/F4 forming the counter ……F/
The reset terminal R of Fn becomes low level and F/
F3, F/F4...F/Fn reset is canceled.

The signal applied from the output of NAND2 to the input of NAND1 is high level, and from the output of NOR1
Since the signal applied to the input of NAND1 is also at high level, when the clock signal φ applied to the input of NAND1 becomes high level, the output of NAND1 becomes low level, and the clock signal φ applied to the input of NAND1 becomes low level. Then, the output of NAND1 becomes high level.

F/F3 responds only to the positive edge (change from low to high) of the output of NAND1 and inverts its output Q, and F/F4 responds only to the positive edge of the output of F/F3 and inverts its output Q,
F/Fn responds only to the positive edge of the output of the previous stage and inverts its Q.

In this way, F/F3, F/F4...F/
Fn performs 1/2 frequency division for each input signal, so when the counter configured by F/F3, F/F4, etc. F/Fn counts a predetermined number of positive edges of clock pulse φ, F/F
3. F/F4......The outputs Q of F/Fn are all at high level. Then, the output of NAND2 becomes low level, and high level and low level signals are applied to the set input terminal S and reset input terminal R of F/F2 via OR and NOR2, respectively. Therefore, F/F2 is triggered to the set state and its output Q becomes high level, and the transistor
Q ₂ is turned off, and at this time resistor R ₃ and diode D ₂
Since the current flowing through the input/output common terminal is minute, the light emitting element LED turns off. On the other hand, by utilizing the change in the output Q of the F/F 2 from low level to high level, it is possible to open and close the shutter and then return the switch means SW to the on state.

In the above manner, by switching the switch means SW from on to off, the light emitting element LED indicating that the self-timer is in operation starts lighting up, and the F/F 3 constituting the counter,
F/F4...F/Fn starts counting clock pulses φ, and when the clock pulse φ has counted a predetermined number of positive edges, the shutter mechanism is activated to execute photography and turn off the light emitting element LED. .

FIG. 2 is a time chart of this circuit.

Incidentally, although the alarm may be emitted by a constant signal as in the above embodiment, the light emitting element may be made to blink by an intermittent signal that changes high and low, thereby enhancing the alarm effect. Good too. In that case, for example, as shown in FIG. 3, a gate circuit is interposed in front of the base of the load current supplying transistor _Q2 so that a clock pulse is supplied to _Q2 during the alarm period.

Note that acoustic means may be used instead of the optical means as described above for display. Even in that case, it goes without saying that a circuit such as the one shown in FIG. 3 may be used to issue an alarm using intermittent sounds.

In this way, an input application switch and a load are connected in parallel to an external terminal, and when the switch is turned on during normal times, the load is short-circuited and the current that should be input to the inverter in the input/output circuit is made to flow in the direction of the switch. The input current is supplied to the inverter by keeping the output of the inverter high at the time of a command and causing the switch to flow, and sending an input signal to the command execution logic circuit _. Since the load current is supplied to the load circuit, one external terminal can be used as an input/output terminal, reducing the number of terminals on the chip to one.
can be reduced.

FIG. 4 shows a circuit of another embodiment, and FIG. 5 shows its operating waveform diagram. In this example, contrary to the previous embodiment, the switch SW is changed from an off state to an on state in order to input a signal.

Before the self-timer activation command is issued, the switch means SW is turned off, so current is supplied from the power supply Vcc in the input/output circuit 10 to the base of the transistor Q ₁₀ via the resistor R ₃₀ and the diodes D ₁₀ and D ₁₁ , and the transistor Q ₁₀ is turned on, but since the resistance values of the resistors R _{30 and} R _{20 are set so that the voltage drop across the resistor R 30} is small, the light emitting element LED is turned off.

On the other hand, since the transistor _Q10 is in the on state as described above, the line _l2 is maintained at a low level regardless of the on/off operation of the transistor _Q11 controlled by the anti-phase clock pulse. Therefore, the output of the inverter circuit INV5 is at a high level. Although not shown, a counting circuit is connected between the output of the inverter circuit INV5 and the input of the NOR circuit NOR3, and a clock pulse φ is applied to this counting circuit. However, since this counting circuit is supplied with a high level signal from the output of INV5, this counting circuit stops counting the clock pulses φ.

As shown in FIG. 5, when the switch means SW is turned on between time t ₀ and time t ₂ due to the self-timer operation command, the light emitting element LED,
A relatively large current flows to the ground potential through the resistor R ₆ and the switch means SW, and the light emitting element LED lights up. By turning on the switch means SW,
The input/output common terminal _l1 becomes low level, and the transistor _Q10 is turned off. When transistor _Q11 , controlled by the anti-phase clock pulse, is turned off, line _l2 goes high and the inverter circuit
The output of INV5 becomes low level. When the output of INV5 becomes low level, the counting circuit connected to the output of INV5 starts counting clock pulses φ, and its output supplied to NOR3 becomes low level. Before time _t6 , this counting circuit has not completed counting the predetermined number of clock pulses φ, so it maintains a low level output.

When the switch means SW is switched from on to off after time _t2 , the current supply to the light emitting element LED is stopped.
The interruption is controlled exclusively by the conduction/de-conduction of transistor Q ₂₀ . Also, this transistor
The conduction/non-conduction of _Q20 is controlled by the output of the NOR circuit NOR3. On the other hand, when the output of the counting circuit is low level and the clock pulse φ is low level,
The output of NOR3 becomes high level, the transistor _Q20 becomes conductive, and the light emitting element LED lights up. When the clock pulse φ becomes high level, the output of NOR3 becomes low level, and the transistor _Q20 becomes non-conductive.However, between times _t2 and _t6 , due to the fast repetition period of the clock pulse φ and the afterimage phenomenon in the eye,
The lighting of the light emitting element LED is recognized as something close to continuous light emission.

On the other hand, at time _t6 , when the counting circuit connected to the output of the inverter circuit INV5 completes counting a predetermined number of clock pulses φ, the output of this counting circuit changes from low level to high level. Therefore,
The output of the NOR circuit NOR3 becomes low level regardless of the signal level of the clock pulse φ, and the transistor _Q20 becomes non-conductive. On the other hand, since the switch means SW is already in the OFF state at this time, the light emitting element LED is turned off. On the other hand, by using the change in the NOR output from high level to low level at this time, it is possible to open and close the shutter and take pictures.

According to the embodiment of FIG. 4, the switch means
A light-emitting element LED that indicates that the self-timer is operating by switching the SW from off to on.
starts lighting up, the counting circuit starts counting clock pulses φ, and when the predetermined number of clock pulses φ is counted, the shutter mechanism is activated.
Moreover, the light emitting element LED can be turned off.

The circuit 10 as shown in Fig. 4 is represented by the numbers in Fig. 6.
Circuit 1 for driving LED segment S
Applicable to 1 and 12. The circuits 11, 12 operate together with the circuits 40 to 45 which only drive the segment S to drive the numeric display LED whose common electrode B is connected to the power supply. in this case,
Display instruction signals ₁ and ₂ are decoded signals for numbers.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is a time chart, FIGS. 3, 4 and 6 are circuit diagrams showing other embodiments of the present invention, and FIG.
The figure is a time chart diagram of the embodiment of FIG. 4. DESCRIPTION OF SYMBOLS 1...Input/output circuit, 2...External terminal (input/output terminal), 3...Command execution logic circuit, R1 _{to R6 ...} Resistor, _Q1 , _Q2 ...Transistor, _D1 , _D2 ... ...Diode, SW...Switch, LED...Light emitting element,
F/F1~F/Fn...Flip-flop,
NAND1, NAND2...NAND circuit, INV1~
INV4...Inverter, NOR1, NOR2...NOR circuit, OR...OR circuit, AND...AND circuit.

Claims (1)

[Claims] 1. An input/output common terminal, a display device and a switching means connected in parallel between the input/output common terminal and the ground potential, and a base thereof responsive to an input signal level of the input/output common terminal. a first transistor, a counting means responsive to the collector output signal of the first transistor and to which a clock pulse is applied, the base of which responds to the output of the counting means, and whose collector drives the display to the input/output common terminal. a second transistor for supplying a signal; and a bias circuit connected between a power supply and the base of the first transistor and the input/output common terminal, and the switch means is switched from on to off to The first transistor is switched from a non-conducting state to a conducting state to cause the counting means to start counting the clock pulses, and the output of the counting means before the counting means completes counting of the predetermined number of clock pulses causes the first transistor to count the clock pulses. The two transistors are brought into conduction to supply a display drive signal to the display device via the input/output common terminal, causing the display device to display a display, and the counting means completes counting the predetermined number of clock pulses. Thereafter, the input/output circuit is characterized in that the second transistor is controlled to be non-conductive by the output of the counting means to stop the display on the display device. 2. An input/output common terminal, a display device connected between a power source and the above input/output common terminal, a switch means connected between the above input/output common terminal and ground potential, and a base thereof connected to the above input/output common terminal. a first transistor responsive to an input signal level at a common terminal;
a second transistor whose base responds to the output of the counting means and whose collector supplies a display drive signal to the input/output common terminal; a bias circuit connected between the power supply and the base of the first transistor and the input/output common terminal; the bias circuit is configured to switch the first transistor from a conductive state to a non-conductive state by switching the switch means from off to on; switching to a conductive state to cause the counting means to start counting the clock pulses, and controlling the second transistor to the conductive state by the output of the counting means before the counting means completes counting the predetermined number of clock pulses; A display drive signal is supplied to the display device through the input/output common terminal to cause the display device to display a display, and after the counting means has completed counting a predetermined number of the clock pulses, the output of the counting means is An input/output circuit characterized in that the second transistor is controlled to be non-conductive to stop displaying on the display device.