JPS6132608A - Stereophonic amplifier - Google Patents
Stereophonic amplifierInfo
- Publication number
- JPS6132608A JPS6132608A JP15440384A JP15440384A JPS6132608A JP S6132608 A JPS6132608 A JP S6132608A JP 15440384 A JP15440384 A JP 15440384A JP 15440384 A JP15440384 A JP 15440384A JP S6132608 A JPS6132608 A JP S6132608A
- Authority
- JP
- Japan
- Prior art keywords
- input
- voltage follower
- output
- feedback circuit
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stereophonic System (AREA)
- Amplifiers (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はクロストークを改善したステレオ増幅器に関す
る。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a stereo amplifier with improved crosstalk.
従来例の構成とその問題点
近年ディジタル技術の発達により、ステレオ増幅器の入
力ソースのＳ／Ｎ 、クロストーク等が飛躍的に向上し
、ステレオ増幅器においてもこれらの特性のよシ一層の
向上が求められている。Conventional configurations and their problems In recent years, with the development of digital technology, the S/N ratio, crosstalk, etc. of the input source of stereo amplifiers have improved dramatically, and stereo amplifiers are also required to further improve these characteristics. It is being
以下に従来のステレオ増幅器について説明する。A conventional stereo amplifier will be explained below.
第１図はステレオ増幅器の従来例の構成図でｉｂ、１．
２は入力端子、３，４は入力抵抗、６〜８は帰還抵抗、
９，１０は増幅器、１１〜１４は電源コンデンサ、１６
Ｐ−１８は出力端子、１９．２０は出力シャーシアース
でｓｂ、奇数番号は左側チャンネル、偶数番号は右側チ
ャンネルの構成要素、そして２１は入力シャーシアース
である。FIG. 1 is a block diagram of a conventional example of a stereo amplifier, with ib, 1.
2 is an input terminal, 3 and 4 are input resistors, 6 to 8 are feedback resistors,
9 and 10 are amplifiers, 11 to 14 are power supply capacitors, 16
P-18 is the output terminal, 19.20 is the output chassis ground sb, odd numbers are the components of the left channel, even numbers are the components of the right channel, and 21 is the input chassis ground.
第１図に示すように、一般に入力のアースラインは左右
共通になっている場合が多い。ここで右側入力端子２を
短絡し、左側入力端子１にのみ信号を入力した場合につ
いて説明する。まず、信号電流は抵抗３を通じてａの矢
印に示すように流れるが、抵抗３のインピーダンスは一
般に非常に大きいため、０点、ｄ点にはこの信号電流に
よってはほとんど電位差は生じない。−力増幅器９の出
力が振幅することにより帰還回路の抵抗７．？５にも電
流が流れ、これは矢印すに示す径路で流れる。As shown in FIG. 1, the input ground line is often common to the left and right sides. Here, a case will be described in which the right input terminal 2 is short-circuited and a signal is input only to the left input terminal 1. First, the signal current flows through the resistor 3 as shown by the arrow a, but since the impedance of the resistor 3 is generally very large, this signal current causes almost no potential difference between the 0 point and the d point. - The resistance 7 of the feedback circuit is caused by the amplitude of the output of the force amplifier 9. ? A current also flows through 5, and it flows along the path shown by the arrow.
そして電流値は帰還抵抗５の値によって決まる。The current value is determined by the value of the feedback resistor 5.
す々わち、入力抵抗３の両端電圧と帰還抵抗６の両端電
圧が同じになるように帰還抵抗已に電流が流れる。よっ
て帰還抵抗６のインピーダンスが小さくなるほど電流が
大きくなる。帰還抵抗６はＳ／Ｎを良くするために小さ
くする必要があシ、このため帰還電流は入力信号電流に
比べ太き々値になシ、これが矢印すの径路を流れるため
、０点とｄ点の間に電位差が発生する。このため、この
電位差が右側チャンネルの増幅器１ｏに入力され、右側
チャンネμの出力に左側チャンネルの信号が漏れること
になる。That is, a current flows across the feedback resistor so that the voltage across the input resistor 3 and the voltage across the feedback resistor 6 are the same. Therefore, the smaller the impedance of the feedback resistor 6, the larger the current. The feedback resistor 6 needs to be small in order to improve the S/N ratio, so the feedback current has a much thicker value than the input signal current, and since it flows along the path indicated by the arrow, there is a difference between the 0 point and d. A potential difference occurs between the points. Therefore, this potential difference is input to the right channel amplifier 1o, and the left channel signal leaks to the output of the right channel μ.
このように従来のステレス増幅器では帰還回路に流れる
電流が入力信号のアースに流れることによシクロ−スト
ークが悪化する欠点がある。As described above, the conventional Stereth amplifier has the disadvantage that the current flowing through the feedback circuit flows to the ground of the input signal, which worsens the cyclostalk.
発明の０的
本発明は前記のような従来の問題点を解消し、帰還回路
の電流によシクロストークを悪化させることのないステ
レオ増幅器を提供するものである。SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems and provides a stereo amplifier in which cyclotalk is not worsened by current in the feedback circuit.
発明の構成
入力信号のアースにボルテージフォロワの入力を接続し
、前記ボルテージフォロワの出力によシ帰還回路の基準
電圧を定めることにより、帰還回路の電流が入力アース
に流れ込むことを防ぎクロストークの改善を行なうもの
である。Structure of the Invention By connecting the input of the voltage follower to the ground of the input signal and determining the reference voltage of the feedback circuit based on the output of the voltage follower, the current in the feedback circuit is prevented from flowing into the input ground, thereby improving crosstalk. This is what we do.
実施例の説明
第２図は本発明の一実施例の構成図である。第２図にお
いて２３．２４はボルテージフォロワで２３が左側チャ
ンネル用、２４が右側チャンネル用である。なお、その
他の符号については従来例の構成要素と同一であシ、１
，２は入力端子、３゜４は入力抵抗、６〜８は帰還抵抗
、９，１０は増幅器、１１〜１４は電源、１６〜１８は
出力端子、１ｅ 、 益１ｈＢカシ忙シアース、２１は
入力シャーシアースである。DESCRIPTION OF THE EMBODIMENT FIG. 2 is a block diagram of an embodiment of the present invention. In FIG. 2, 23 and 24 are voltage followers, 23 is for the left channel, and 24 is for the right channel. Note that other symbols are the same as those of the conventional example.
, 2 is the input terminal, 3゜4 is the input resistance, 6 to 8 are the feedback resistors, 9 and 10 are the amplifiers, 11 to 14 are the power supplies, 16 to 18 are the output terminals, 1e, 1hB, 21 is the input This is chassis ground.
ここで従来例と同様に右側チャンネル入力端子２を短絡
し、左側入力端子１にのみ信号を入力した場合について
説明する。第２図の実施例の場合には増幅器９の出力が
振幅した時、帰還抵抗７゜５に流れる電流は矢印ｅに示
すようにボルテージフォロワ２３の出力に流れ込み、ボ
ルテージフォロワの電源に流れる。そしてボルテージフ
ォロワ２３の入力は入力信号アースラインに接続されて
いるため、ボルテージフォロワ２３の出力の電位も入力
信号アースライン電位と同じになる。すなわち、第２図
の実施例においては、帰還回路の電位は従来例と同じで
あり、しかも帰還回路の電流は入力信号のアースライン
に流れ込まない。このため帰還回路の電流によシ、０点
とｄ点の間には電位差は発生せず、右側チャンネルに信
号が漏れない。Here, a case will be described in which the right channel input terminal 2 is short-circuited and a signal is input only to the left input terminal 1, as in the conventional example. In the case of the embodiment shown in FIG. 2, when the output of the amplifier 9 oscillates, the current flowing through the feedback resistor 7.5 flows into the output of the voltage follower 23 as shown by arrow e, and flows into the power supply of the voltage follower. Since the input of the voltage follower 23 is connected to the input signal ground line, the potential of the output of the voltage follower 23 is also the same as the input signal ground line potential. That is, in the embodiment of FIG. 2, the potential of the feedback circuit is the same as that of the conventional example, and moreover, the current of the feedback circuit does not flow into the ground line of the input signal. Therefore, no potential difference is generated between the 0 point and the d point due to the current in the feedback circuit, and no signal leaks to the right channel.
以上のように第２図の実施例によれば、帰還回路の基準
電位をボルテージフォロワでドライブすることによシ、
帰還回路に流れる電流によるクロストークの悪化作用が
なく、ステレオ増幅器を構成することが出来る。さらに
帰還電流がシャーシを流れないため、シャーシの材質等
に起因する非直線歪が発生しない。As described above, according to the embodiment shown in FIG. 2, by driving the reference potential of the feedback circuit with a voltage follower,
A stereo amplifier can be constructed without deteriorating crosstalk caused by current flowing through the feedback circuit. Furthermore, since no feedback current flows through the chassis, nonlinear distortion caused by the material of the chassis does not occur.
発明の効果
本発明は帰還回路の基準電位をボルテージフォロワでド
ライブすることによシ、クロストークの改善を行なうこ
とが出来、さらにシャーシ材質等に起因する非直線歪も
発生しないなど優れたステレオ増幅器を実現出来るもの
である。Effects of the Invention The present invention improves crosstalk by driving the reference potential of the feedback circuit with a voltage follower, and also provides an excellent stereo amplifier that does not generate non-linear distortion due to the chassis material, etc. It is possible to realize this.
第１図は従来例の回路図、第２図は本発明の一実施例の
回路図である。
１．２・・・・・・入力端子、３，４・・・・・・入力
抵抗、５〜８・・・・・・帰還抵抗、９，１ｏ・・・・
・・増幅器、１１〜１４・・・・・・電源、１６〜１８
・・・・・・出力端子、１９゜２０・・・・・・出力−
シャーシアース、２１・・曲・入力シャーシアース、２
３．２４・・・・・・ボルテージフォロワ。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
第２図FIG. 1 is a circuit diagram of a conventional example, and FIG. 2 is a circuit diagram of an embodiment of the present invention. 1.2...Input terminal, 3,4...Input resistance, 5-8...Feedback resistance, 9,1o...
...Amplifier, 11-14...Power supply, 16-18
...Output terminal, 19゜20...Output -
Chassis ground, 21... Song/input chassis ground, 2
3.24...Voltage follower. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2
Claims (1)
、前記ボルテージフォロワの出力により帰還回路の基準
電圧を定めることを特徴とするステレオ増幅器。A stereo amplifier characterized in that an input of a voltage follower is connected to the ground of an input signal, and a reference voltage of a feedback circuit is determined by the output of the voltage follower.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15440384A JPS6132608A (en) | 1984-07-25 | 1984-07-25 | Stereophonic amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15440384A JPS6132608A (en) | 1984-07-25 | 1984-07-25 | Stereophonic amplifier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6132608A true JPS6132608A (en) | 1986-02-15 |
Family
ID=15583382
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15440384A Pending JPS6132608A (en) | 1984-07-25 | 1984-07-25 | Stereophonic amplifier |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6132608A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0686862A (en) * | 1992-09-09 | 1994-03-29 | Max:Kk | Large winning display unit for pachinko game machine |
| JP2012217223A (en) * | 2012-08-17 | 2012-11-08 | Asahi Kasei Electronics Co Ltd | Variable gain inverting amplifier circuit |
-
1984
- 1984-07-25 JP JP15440384A patent/JPS6132608A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0686862A (en) * | 1992-09-09 | 1994-03-29 | Max:Kk | Large winning display unit for pachinko game machine |
| JP2012217223A (en) * | 2012-08-17 | 2012-11-08 | Asahi Kasei Electronics Co Ltd | Variable gain inverting amplifier circuit |
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