JPS6130795B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image reading device such as a facsimile, and more particularly to a black level detection device for setting a variable slice level when obtaining a binary image signal.

Conventionally, when converting an image signal into a black and white binary digital signal in an image reading device such as a facsimile using a solid-state image sensor, the highest level (white level) in the read signal is detected and the For example, the image signal was sliced using a 50% value as a threshold to obtain a binarized digital signal. However, although this method has no effect on transmitted documents with clear contrast between black and white, the reproducibility is poor for documents with pale characters such as those written in pencil.

For example, the following methods can be used to improve this problem. That is, by detecting the white level signal and black level signal (level of black information) in the read signal,
The read signal is sliced using the intermediate level as a threshold to obtain a binarized digital signal.
An appropriate level can be obtained by using a peak hold circuit or the like to detect the highest level (white level) in this read signal. However, black level detection has many problems compared to white level detection.
For example, there were various technical issues that needed to be solved, such as countermeasures against variations in black density, countermeasures against variations in background density of transmitted documents, and countermeasures against drop-out colors.

The present invention was made based on the above technical background, and directly provides an optimal black level detection device.
Indirectly, it is an object of the present invention to provide an image reading device that can obtain the best binarized digital image signal.

The present invention is characterized in that a black level signal is created by subjecting a capacitor to three types of control: discharging, charging, and holding, depending on a read signal. Another feature of the present invention is that the read signal and the black level signal are compared, and when the black level signal is large, the capacitor is discharged, and when the black level signal is small, the capacitor is charged. Furthermore, another feature of the present invention is that the voltage of the capacitor is maintained for a read signal equal to or higher than the first reference level obtained by dividing the level difference between the white level signal and the black level signal at a predetermined ratio. It is to be. Another feature of the present invention is that the capacitor is held when the black signal rises above a second reference level obtained by dividing the white level signal at a predetermined ratio.

The present invention will be explained below based on the drawings. FIG. 1 shows two of the read signals to which an embodiment of the present invention is applied.
FIG. 2 is a circuit diagram of a digitized slice level creation device.
Moreover, FIG. 2 is a waveform diagram of the main part. In FIG. 1, 1 is an input terminal for a read signal A. This read signal A is obtained by extracting an output signal from an image sensor (not shown) through an integrating circuit (not shown). 2 is an input terminal for a clock pulse signal. 3 is a white level detection device, and a peak hold circuit with a large time constant is used. This white level detection device 3 outputs a white level signal RO. Reference numeral 4 denotes a black level detection device which constitutes the main subject of the present invention, and outputs a black level signal C. R ₈ and R ₉ are resistors, which are used to divide the white level signal B and the black level signal C at a predetermined ratio to obtain the binarized slice level signal W of the read signal A. Here, the ratio of resistors R ₈ and R ₉ is set to 1:1.

In the black level detection device 4, 5, 6, and 7 are comparators, and 8 and 9 are delayed flip-flop circuits (hereinafter referred to as D-FF circuits).
10 and 11 are AND circuits. 12,
13 is a switch, 14 is a capacitor, and 15 is a transistor. Note that R ₁ to R ₇ are all resistors. R ₁ is a resistor with a high resistance value, and R ₂ is a resistor with a low resistance value. Furthermore, R ₄ and R ₅ are for dividing the white level signal at a predetermined ratio to create a second reference signal, and in this embodiment, the ratio of the resistance values of resistors R ₄ and R ₅ is used. The ratio is 3:2. Additionally, R ₆ and R ₇
is used to obtain the first reference signal by dividing the white level signal B and the black level signal C at a predetermined ratio, and in this embodiment, the ratio of resistors R ₆ and R ₇ is set to 3. :1. R ₃ is also a resistor, but
This is provided for circuit convenience and does not play any special role in the present invention.

Hereinafter, the operation of the apparatus for creating a binary slice level of a read signal shown in FIG. 1, particularly the operation of the black level detection apparatus, will be explained using FIG. 2. First, a read signal A appears at the input terminal 1.
As described above, this read signal is extracted by inputting the output signal of the image sensor to the integrating circuit. Further, the read signal A is synchronized with the clock pulse signal inputted from the input terminal 2. The reason for this is clear from the fact that the clock pulse signal is input to the image sensor and controls the output timing of the image sensor. This read signal A is input to the white level detection device 3 and the black level detection device 4. Although not shown, the read signal A is output from the output terminal 16 and is also input to the subsequent binarization device. Further, within the black level detection device, the read signal A is input to comparators 5 and 7.

Next, the white level detection device 3 is constituted by a peak hold circuit, and is configured to hold the highest level of the read signal A for a long period of time. However, if the background of the transmitted document is not white but, for example, gray or yellow, the level held by the white level detection device 3 decreases. Here, the output signal of the white level detection device 3 is referred to as a white level signal. In addition,
In this embodiment, in order to simplify the explanation, the white level signal will be assumed to be the highest and constant.

Now, the direct object of the present invention is to obtain a black level signal of the read signal A, and this black level signal is the output signal C of the transistor 15. What controls this transistor 15 is the charging voltage of a capacitor 14 connected between its base and ground. Therefore, by charging, discharging, or holding this capacitor 14, the black level can be raised, lowered, or fixed. Capacitor 1 to work like this
4 are controlled by switches 12 and 13. In other words, switch 13 closes and switch 1
2 opens, the _supply voltage (+
5V), a current flows as indicated by the arrow _I1 , and the capacitor 14 is charged. At this time, since the resistance value of the resistor _R1 and the capacitance of the capacitor 14 are large, the charging speed is slow. Conversely, when switch 12 is closed and switch 13 is opened, resistor R ₂ is grounded, so current flows as indicated by arrow I ₂ and capacitor 14 is discharged. At this time, since the resistance value of resistor _R2 is small, the discharge rate is high. Further, when both switches 12 and 13 are open, the voltage charged in capacitor 14 is maintained. Note that the transistor 15 has a function of preventing the voltage held by the capacitor 14 from decreasing. Further, the switches 12 and 13 are never closed at the same time. In this way, by controlling the switches 12 and 13, the operation and charging voltage of the capacitor 14 can be controlled. Therefore, by controlling the switches 12 and 13 according to the read signal A, the black level signal C can be controlled. Note that the difference between the charging voltage of the capacitor 14 and the black level signal C is always constant, and in this embodiment, the black level signal C is 0.6V smaller.

Next, control of the switches 12 and 13 will be described. The switches 12 and 13 are controlled by the read signal A, the white level signal B obtained by inputting the read signal A to the white level detecting device 3, and the black signal which is the self-output signal of the black level detecting device 4. This is done using level signals C and C. In this embodiment, the switches 12 and 13 are controlled in three ways as described above.

In addition, in Fig. 2, D ₁ and D ₂ indicate the time cutting lines, but due to these, Fig. 2 is 3
It is divided into species states A, B, and C. These three types of states correspond to three types of control that will be described in detail later. In other words, state A is the first control and state B
corresponds to the second control, and state C corresponds to the third control. Further, in FIG. 2A, the white level signal ``L'' is shown by a two-dot chain line, and the black level signal ``C'' is shown by a solid line. Further, M indicates a no-signal section, and S ₁ and S ₂ indicate individual signal waveforms. This no-signal period M occurs because an image sensor is used as the image reading device. The three types of control described above will be sequentially explained below.

First, the purpose of the first control is to deal with variations in black density. This first control is performed using the output signal of the first comparator 5. 1st
The read signal A is input to the "-" input terminal of the comparator 5, and the black level signal C is input to the "+" input terminal. Therefore, the first comparator 5
compares the read signal A and the black level signal C, and when the read signal A is larger, the low level is set, and when the black level signal C is larger, the high level is set D-
Output to the D input terminal of the FF circuit 8. In the D-FF circuit 8, a clock pulse signal is input to the CK input terminal. The D-FF circuit 8 reads the output signal of the first comparator 5 at the rising point (for example, t ₁ ) of this clock pulse signal, outputs the read signal as a signal from the Q output terminal, and outputs the read signal as a signal to the next clock pulse signal. The output is mixed up to the rising point t ₂ of . Incidentally, the output terminal of the D-FF circuit 8 outputs a signal H which is an inversion of the signal G. By the way, when comparing the read signal A and the clock pulse signal A, the rising point (for example, t ₁ ) of the clock pulse signal coincides with the peak of each signal waveform of the read signal A. Therefore, the output signal G of the D-FF circuit 8 is a signal obtained by comparing the peak value of each signal waveform of the read signal A with the black level signal C. Output signals T and J of the D-FF circuit 8 are input to AND circuits 10 and 11, respectively. If the AND circuits 10 and 11 are both in the "open" state, the signal G becomes the output signal L of the AND circuit 10 and is input to the switch 12. At the same time, the signal H becomes the output signal of the AND circuit 11 and is input to the switch 13. The switches 12 and 13 are "on" when the control signal is at a high level, and are "off" when the control signal is at a low level.

To describe this operation more specifically in state A of FIG. 2, the peak value of the signal waveform S ₁ is larger than the black level signal C, so the signal T is at a low level in the interval a ₁ (time t ₁ - t ₂ ). , signal H becomes high level. At the same time, the signal L becomes low level and the signal WO becomes high level. As a result, the switch 12 is turned off, the switch 13 is turned on, the capacitor 14 is slowly charged, and the black level signal is also slowly increased. Next, since the peak value of the signal waveform S ₂ is smaller than the black level signal C, the interval a ₂ (time t ₂
~ _t3 ), signal G becomes high level and signal Q becomes low level. At the same time, the signal is at high level,
The signal wo becomes low level. As a result, the switch 12 is turned on, the switch 13 is turned off, the capacitor 14 is rapidly discharged, and the black level signal H is also rapidly lowered. Furthermore, after time _t3 , the capacitor 14 is charged again in the same manner as _a1 above. The same applies below.

In this way, in the first control, the read signal A and the black level signal C are compared, and when the read signal A is larger, the capacitor 14 is charged, and when the black level signal C is larger, the capacitor 14 is charged. By discharging the black level signal C, it is possible to make the black level signal C follow the variation in the black density of the transmitted document. Therefore, any black density can be read under the same conditions, so even relatively faint black, such as that of a pencil, can be reproduced thickly as absolute black in the received recorded image, and will not become thin. do not have.

Note that although the D-FF circuit 8 is used in this embodiment, there is no no-signal period in the read signal A;
In addition, if the signal waveform is rectified at its peak value, it may not be present. In that case, the output of the comparator 5 may be used as a signal G, and the output of the comparator 5 passed through an inverter may be used as a signal H.

In addition, in the first control, since the black level signal C is also taken into consideration, if the black level signal C can be expressed as a function of the capacitor 14, the charging voltage of the capacitor 14 is converted and the black level signal C is It doesn't matter what kind of transformation you want to perform in order to obtain .

Next, the second control will be explained. The second control is performed from the standpoint of assisting the first control.
In other words, it is desirable that the first control is not performed for all read signals A, but is performed only for the black signal, especially among the read signals A. For example, 1
When all the main scanning lines are white, a signal like state B in FIG. 2 appears in the read signal A. At this time, when the first control is applied, the black level signal C increases infinitely, and in the extreme, becomes almost the same as the white level signal. The second control is performed to prevent this, and the first control is prohibited for what can be determined to be a background reading signal in the transmitted document during the reading signal. The purpose is to show.

The second control is performed using the second converter 7. The read signal A is input to the "-" input terminal of the second comparator 7, and the black level signal C and white level signal B are input to the "+" input terminal of the second comparator ₇ .
Input the first reference signal E obtained by dividing the resistance by _R7 into 31. This first reference signal E is used to determine that any further read signal A is a signal that has read the background of the transmitted document. Note that the first reference signal H is indicated by 1 in Fig. 2.
Indicated by a dotted chain line. Therefore, the second comparator 7 compares the read signal A and the first reference signal E, and outputs a low level when the read signal A is larger, and outputs a low level when the first reference signal E is larger. A high level is output to the D input terminal of the D-FF circuit 9.
The operation of this D-FF circuit 9 is exactly the same as that of the D-FF circuit 8 described above. The only difference is that the output of the D-FF circuit 9 used is one Q output terminal. Therefore, the output signal N of the D-FF circuit 9 is a signal obtained by comparing the peak value of each signal waveform of the read signal A with the first reference signal E. This D
-The output signal of FF circuit 9 is AND circuit 10 and 11
and controls execution or non-execution of the first control.

To describe this more specifically, in the case of state B in FIG. becomes low level. As a result, the AND circuits 10 and 11 are both in the "closed" state, and the output signals L and W of the AND circuits 10 and 11 are both at a low level, so that the first control is not performed. At this time, both switches 12 and 13 are turned off.
Therefore, the capacitor 14 holds the charging voltage. Conversely, in state A of FIG. 2, the peak value of each signal waveform of the read signal A is smaller than that of the first reference signal E, so the output signal N of the D-FF circuit 9 is at a high level. As a result, the AND circuit 10,
11 are both in the open state, and the first
control will be implemented.

In this way, in the second control, the read signal I and the first
When the read signal A is larger, the capacitor 14 is held, and when the first reference signal is larger, the capacitor 14 is connected to the first
By performing this control, the black level signal does not vary with respect to the signal obtained by reading the background of the transmitted document.

Next, the third control will be described. The third control is also performed from the standpoint of assisting the first control. In other words, the upper limit of the third black level signal C is determined, and the black level signal C is prevented from exceeding the upper limit.

The third control is performed using the third comparator 6. The "+" input terminal of the third comparator 6 is connected to the white level signal RO through resistors _R4 and _R5 at a ratio of 3:2.
A second reference signal D, which is resistance-divided into , is inputted, while a black level signal C is inputted to the "-" input terminal.
This second reference signal D is for indicating the upper limit of the black level signal C. Note that the second reference signal D is indicated by a three-dot chain line in FIG. This third comparator 6 compares the second reference signal D and the black level signal C, and when the second reference signal D is larger, it outputs a high level, and the black level signal C is larger. At this time, a low level is output to AND circuits 10 and 11. Thereby, the third control controls implementation or non-execution of the first control.

To describe this more specifically, in the case of state C in Figure 2, the peak value of the signal waveform of read signal A is:
Except for signal waveform _S3 , it is subject to the first control,
Since the black level signal is greater than C, capacitor 1
4 is charged. At the same time, the black level signal H also increases. Then, at point E in the second figure, the black level signal C becomes the same level as the second reference signal D. As a result, the output signal R of the third comparator 6 becomes low level, and the AND circuits 10 and 11 become closed. As a result, the first control is prohibited and the voltage of the capacitor 14 is maintained.

In this manner, according to the third control, the second reference signal D and the black level signal C are compared, and when the black level signal C is larger, the capacitor 14 is held and the second reference signal D is increased. When this is larger, the capacitor 14 is subjected to the first control, so that the black level signal C does not exceed a predetermined reference level. Therefore, midtone levels and dropout colors are not considered black levels.

In the manner described above, an optimal black level signal C can be obtained. This black level signal is connected to resistors _R8 and _R9
At this point, the level difference between the white level signal B and the white level signal B is divided by resistance. The signal W obtained by this resistance division is input as a binarized slice level to a binarization circuit (not shown) from a terminal 17, and the read signal A is sliced to generate a binarized digital image signal. Create. In this embodiment, the ratio of the resistance values of the resistors R ₈ and R ₉ is 1:1.

Note that the above is one embodiment of the present invention, and the scope of the present invention is not limited to this embodiment. In particular, there are various methods and devices for extracting read signals, and some design changes may be made to suit them. For example, the D-FF circuits 8 and 9 may not be necessary.

In addition, in the resistors R ₄ to _{R 9} for resistance division,
The ratio of the resistance values of each set does not have to be exactly as in this example, and the optimum ratio may be selected experimentally. For example, the ratio between R ₆ and R ₇ and the ratio between R ₈ and R ₉ may be the same. In that case, the signal W may be input to the "+" input terminal of the second comparator 7.

Furthermore, the present invention provides the first to third
It is not necessary to carry out all of the above controls, and the first control alone or a combination of the first control and the second or third control may be used. In such a case, capacitor 1
4. It is preferable to slow down the charging speed.

Further, as for the method of creating a slice level signal or the method of creating a binarized digital signal, any method may be used as long as the black level signal, white level signal, and read signal according to the present invention are used.

As described above, according to the present invention, in an image reading device that creates an image signal using a read signal of a solid-state image sensor and a white level signal and a black level signal of the read signal, the capacitor and the controllable a charging means for the capacitor; a discharging means for the capacitor having a controllable discharging speed faster than a charging speed of the charging means; and a discharging means and a charging means for the capacitor in response to the read signal and the black level signal. By detecting the black level signal from the charging voltage of the capacitor, it is possible to obtain a black level signal that can follow even if the black density changes. Furthermore, by additionally inputting a white level signal to the control means, even if the background density of the transmitted document changes, it does not follow it. Furthermore, a black level signal that does not fluctuate even in an all-white image can be obtained. Furthermore, a black level signal that does not rise more than necessary can be obtained. As described above, according to the present invention, an optimal black level signal can be detected, and thereby an optimal image signal can be created.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a binarized slice level creation device to which an embodiment of the present invention is applied, and FIG. 2 is a waveform diagram for explaining the operation of FIG. 1. 3... White level detection device, 4... Black level detection device, 5, 6, 7... Comparator, 8, 9...
D-FF circuit, 10, 11...AND circuit, 12,
13...Switch, 14...Capacitor, R ₁ ~
R ₉ ...Resistor, 15...Transistor.

Claims (1)

[Scope of Claims] 1. A capacitor, a controllable charging means for the capacitor, a controllable discharging means that has a discharge rate faster than a charging speed of the charging means, and an output from an image sensor. a read signal;
When the black level signal obtained from the charging voltage of the capacitor, the first and second reference signals, and the read signal are larger than the black level signal, the capacitor charging means is activated, and the read signal is set to the black level. operating the capacitor discharging means when the level signal is smaller than the first reference signal; and when the read signal is larger than the first reference signal;
A black level detecting device comprising control means for the capacitor charging means and discharging means, which causes neither the capacitor charging means nor the discharging stage to operate when the black level signal is larger than a second reference signal. 2. The first reference signal is obtained by dividing a white level signal and a black level signal outputted from a white level signal detecting means of a read signal at a predetermined ratio. Black level detection device. 3. The black level detection device according to claim 2, wherein the second reference signal is obtained by dividing the white level signal at a predetermined ratio.