JPS6130411Y2 - - Google Patents

Description

[Detailed Description of the Invention] This invention relates to a protective relay device that detects accidents in an electrical system and protects the system.

Hereinafter, for convenience of explanation, both a conventional protective relay device and an embodiment of the present invention will be described in the case of a ground fault overcurrent relay device used for protecting an electric power system.

FIG. 1 is a block diagram showing an example of a conventional ground fault overcurrent relay device, and FIG. 2 is an input/output waveform diagram for explaining the operation of each part thereof. Reference numeral 1 shown in FIGS. 1 and 2 is an input terminal that introduces the fault current I _f of the system, and 2 is a fault detection circuit that outputs an output V ₂ when the introduced fault current I _f exceeds a set value. 3 is a timer circuit which outputs V ₀ by continuously receiving the output V ₂ of this failure detection circuit for a specified time T or more, and 4 is an output terminal.

A conventional ground fault overcurrent relay device (hereinafter simply referred to as a ground fault relay) is configured as described above, and the _fault current If introduced into the input terminal 1 is equal to or higher than the setting value of the fault detection circuit 2, And that is timer circuit 3
If this continues for a specified time T or more, protection is provided such as sending out an output V ₀ from output terminal 4 and disconnecting the system.

Recently, many cable transmission and distribution lines have been installed, and ground faults in cable systems may occur intermittently in the early stages of cable deterioration, as shown in FIG. In such a case, even if the fault detection circuit 2 outputs an output V ₂ in response to the fault current I _f , the sending time, that is, the fault relay time, will exceed the specified time T of the timer circuit 3.
If it is shorter, the output V ₀ will not be sent out, and the ground fault relay will not be able to detect a system fault even though it has occurred.

The purpose of this invention is to provide a protective relay device with a simple circuit configuration that can respond to system faults that occur intermittently as described above.

FIG. 3 is a block diagram showing an embodiment of this invention, and FIGS. 4A, 4B, and 4C are input/output waveform diagrams for explaining the operation of each part. Figures 3 and 4
Among the reference numerals shown in the figures, all parts denoted by the same reference numerals as those explained in FIGS. 1 and 2 are the same or corresponding parts. 5 is the output of the above failure detection circuit 2
a first output circuit that outputs V ₅ while V ₂ is present;
6 is a second output circuit that outputs V ₆ during the period when there is no output V ₂ of the failure detection circuit 2; 7 is the first output circuit
is gradually charged by the output V ₅ of the output circuit 5 of
An integrating circuit that is gradually discharged by the output V ₆ of the second output circuit 6 and outputs an output V ₇ according to the charged value, 8 is when the output V ₇ of this integrating circuit 7 exceeds a certain level. Output through output terminal 4 above
This is a judgment circuit that sends out V ₀ .

5 and 6 are input/output waveform diagrams for explaining an example of the configuration of the integrating circuit 7 used in FIG. 3 and its operation. 9 shown in Figures 5 and 6.
and 10 are input terminals for introducing the outputs V ₅ and V 6 of the first and second output circuits 5 and ₆ , respectively;
11 is a transistor to which a voltage +E is applied to its collector through a resistor 12 and a voltage -E is applied to its emitter; 13 and 14 are resistors inserted between the base of this transistor 11 and the input terminals 9 and 10; 15 is a transistor A capacitor 16 connected between the collector and base of the transistor 11 is an output terminal.

Now, in FIG. 5, when the output V ₅ of the first output circuit 5 is applied to the input terminal 9, the electric charge of the capacitor 15 is charged with a constant current determined by the resistor 13 toward the voltage +E, and the input terminal 10 is charged with a constant current determined by the resistor 13. When the output V ₆ of the second output circuit 6 is applied to the capacitor 15 , the charge in the capacitor 15 is discharged toward the voltage -E with a constant current determined by the resistor 6 . Therefore, a voltage corresponding to the state of charge of the capacitor 15 appears at the output terminal 16.
This circuit consists of a transistor 11, resistors 12, 13,
14 and a capacitor 15, which is a so-called Miller integrating circuit.

Next, according to Figure 3 and Figure 4 A, B, and C,
The operation of one embodiment of this invention shown in the figure will be explained.

That is, in FIG. 4, when the system is healthy, the failure detection circuit 2 is inoperative and there is no output _V2 .

Therefore, since the second output circuit 6 sends out the output V ₆ to discharge the charge of the integrating circuit 7, its output V ₇ is always in the voltage -E state shown in FIG. 4A. In this state, () In the case of a system fault in which the fault current I _f continues...Figure 4 (a) First, the fault detection circuit 2 responds to the fault current I _f and outputs V ₂ . Next, this output V ₂ causes the first output circuit 5 to continuously send out an output V ₅ . As a result, the integrating circuit 7 is gradually charged and the output V ₇
continues to rise towards voltage +E. When this increase continues for a specified time T and the output _V7 reaches 0 as shown in FIG. 4A, the determination circuit 8 outputs _V0 .

() In the case of a system fault in which the fault current I _f occurs intermittently...Figure 4B As mentioned above, the fault detection circuit 2
It responds only during the period when _f is present and outputs _V2 . Next, with this output V ₂ present, the first output circuit 5 outputs V ₅
Also, the second output circuit 6 delivers an output V ₆ without an output V ₂ . The charge in the integrating circuit 7 is gradually charged by the output _V5 and gradually discharged by the output _V6 , as shown in FIG. 4B. Assuming that the charging and discharging speeds of the integrating circuit 7 are the same, the integrating circuit 7 will repeat charging and discharging when the period in which there is an intermittent fault current I _f exceeds the period without it even by a small amount. gradually increases the output V ₇ , and eventually the charge reaches voltage 0, so the judgment circuit 8 outputs V ₀
do.

() In the case of a system fault in which the fault current I _f occurs intermittently...Figure 4 (c) As in the case of Figure 4 (b) above, the integrating circuit 7 alternately outputs signals from the first and second output circuits 5 and 6. Outputs V ₅ and V ₆ destined for the same period are given, and charging and discharging are repeated, but these outputs V ₅ and V ₆ output for the same period as shown in Figure 4 C, or the output of output V ₅ is shorter. period is longer than the output period of output V ₆ ,
That is, if the period with the fault current I _f is longer than the period without it, the output V ₇ of the integrating circuit 7 only fluctuates around the indicated voltage -E and does not rise. Therefore, the determination circuit 8 remains inactive and does not output _V0 .

Note that in the above embodiment, for convenience of explanation, the integrating circuit 7 is
We have described the case where the integral constant K ₁ on the charging side and the integral constant K ₂ on the discharging side are set equal, but by appropriately changing the integral constants K ₁ and K ₂ , the fault current I _f which becomes the operating limit can be adjusted. You can arbitrarily choose the ratio of time with and without.

Furthermore, in the above embodiment, the case where this invention is applied to a ground fault overcurrent relay device has been described, but it is not limited to this, and various protective relays such as a ground fault overvoltage relay device or a ground fault directional relay device are described. Applicable to electrical equipment.

As described above, this invention integrates the periods in which fault current is occurring in the grid and the periods in which it does not, and determines a grid fault when the integrated value reaches a certain level. Even accidents that occur intermittently can be reliably detected and protected.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an example of a conventional earth fault overcurrent relay device, Fig. 2 is an input/output waveform diagram for explaining the operation of each part in Fig. 1, and Fig. 3 is a ground fault overcurrent relay according to this invention. A block diagram showing one embodiment of the electric device; Figure 4 A, B, and C are input/output waveform diagrams to explain the operation of each part in Figure 3; Figures 5 and 6 are integral diagrams used in this invention. 2 is a circuit diagram showing one configuration of a circuit and an input/output waveform diagram for explaining its operation. FIG. In the figure, 1 is an input terminal, 2 is a failure detection circuit, 5 is a first output circuit, 6 is a second output circuit,
7 is an integrating circuit, 8 is a determination circuit, and 9 is an output terminal. Note that the same reference numerals in each of the above figures indicate the same or corresponding parts.

Claims (1)

[Scope of utility model registration request] a failure detection circuit that outputs the presence or absence of a system failure in response to a change in the amount of electricity due to a system failure; a first output circuit that outputs a first constant voltage during operation of the failure detection circuit; a second output circuit that outputs a second constant voltage having a polarity different from the first constant voltage during operation; The system is equipped with an integrating circuit formed from a charging/discharging feedback capacitor and an amplifier, and a determination circuit that sends out an output signal that determines that the system has failed when the integrated value of this integrating circuit reaches a certain level. A protective relay device characterized in that a system failure is determined according to the time width of the presence or absence of a failure, and the relay operation time is determined according to the time width ratio of the presence or absence of the system failure.