JPS6130313B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an optical character recognition device, and more particularly to a character segmentation device.

When reading handwritten characters in a string of character frames on paper using an optical character recognition device (hereinafter referred to as OCR), the paper is scanned optically, then binary quantized and separated into individual characters, and then features are extracted. A commonly used method is to recognize the name of a character from the extracted features.

By the way, when performing optical scanning quantization, the character frame is generally printed in a color that cannot be detected by the optical system (drop-out color), and the characters are written using a writing instrument with a color system different from the color of the frame. By using, etc., the character frame has the same binary quantization level as the character part (the level corresponding to the character part is "1", the rest is "0")
shall be. ).

In general, semiconductor scanners that use photodetector diode arrays or charge-coupled devices use drop-out colors that are red in color, but black-ink ballpoint pens that are commonly used have drop-out colors that are similar to the drop-out colors. Because of the mixture of colors, it may be difficult to read characters written with these ballpoint pens. If a filter is installed to read such characters as if they were written with a pencil, the drop-out color of the frame will be perceived at the same level as the text, making it even more difficult to read.

In this case, it would be better to detect the shape of the frame and remove it from the quantization pattern, but if the frame is made up of solid lines, the character part may touch the character frame, and if the character frame is erased, it will touch the character frame. The printed text will also be erased, causing misreading.

The purpose of the present invention is to detect and erase the character frame even if the character frame and the characters are of the same color.
To provide a device which can easily and stably set a value quantization level and can cut out characters and detect only character parts.

According to the present invention, the point detection means detects as a point a cluster of signal "1"s having a size below a certain range, the character separation means detects the position to be separated into individual characters, and the A character cutting device having a character portion detecting means for erasing a character frame constituted by arranged dotted lines and detecting only a character portion is obtained. That is, the character separating means starts from the leftmost vertical scanning row position of the quantization pattern and moves to the right, and the scanning row position where a certain number of points or more are detected by the point detection means is set as the left end.
The range where the vertical dotted line should exist is defined as the left end plus the misalignment width of the vertical dotted line. The point detected by the point detection means is within the range where the vertical dotted line should exist, which is obtained by adding or subtracting the displacement width of the vertical dotted line from the scanning line position, which is the left end plus the width of the character frame. The scan line position where the number of points reaches a certain number or more is set as the right end. This allows the space between the left end and right end to be considered as one frame. Furthermore, the number of points detected by the point detection means is greater than or equal to a certain number in the range where the vertical dotted line should exist, which is obtained by adding the distance between adjacent frames and the positional deviation width of the vertical dotted line from the right end of the frame. The scan line position reached is set as the left end of the next frame, and the same operation as described above is performed to detect the next right end. Further, the character portion detecting means erases the points detected by the point detecting means within the range where the vertical dotted line should exist.
Furthermore, for the first horizontal points of the upper and lower ends of the character frame, set the range where the upper and lower ends of the character frame should exist within the range where the vertical dotted line should exist,
The positions of the uppermost point and the lowermost point of the points detected by the point detection means within the range are defined as the upper point position and the lower point position, respectively, and the upper point position includes the horizontal distance between the points. The range in which the upper and lower ends of the character frame should exist is determined by adding the positional deviation width between the horizontal points to the lower point position, and detecting the position within this range by the point detection means. Erase the marked points.

In this way, the dotted line at the position corresponding to the character frame is erased, and only the character portion is detected.

The following will be explained using the drawings.

Figure 1 shows an example of OCR paper.
An example of a character frame string and written characters of a one-line sentence formed by dotted lines arranged at regular intervals on a sheet 800 is shown.

In the figure, l ₂ is the width of the character frame, l ₃ is the interval between adjacent character frames, and l ₁ ×n indicates the range including the size of one line of written characters.

Figure 2 shows a quantized pattern obtained by photoelectrically converting Figure 1 and quantizing it into a binary pattern (characters and dotted lines are shown as "1", and other parts are shown as blanks) This is _a mesh pattern showing _a part of
It shows the sizes of quantization patterns corresponding to l ₁ , l ₂ , and n.

FIG. 3, FIG. 4, FIG. 5, and FIG. 6 are diagrams showing a specific embodiment of the present application.

Hereinafter, in FIGS. 3, 4, and 5, the signal on the signal line will be represented by adding S after the number of the signal line.

FIG. 3 is a diagram showing an example of mask arrangement for explaining point detection. When the quantization pattern shown in Figure 2 is viewed with a 5x5 mask as shown in Figure 3, the 3x of M ₇ to _{M 9} , M ₁₂ to M ₁₄ , M ₁₇ to M ₁₉ in Figure 3 is
If at least one of the three meshes becomes "1" and 16 meshes around the mask become "0", a cluster of "1"s smaller than 3x3 can be detected. (Hereafter, clusters of "1"s with a size of 3.times.3 or less will be referred to as points.) FIG. 4 is a block diagram showing an embodiment of the mask shown in FIG. 3. M ₁ to _{M 25} in FIG. 4 are the input terminals of the point detection circuit, and the positions of the masks M ₁ to _{M 25} in FIG. 3 correspond to the OR circuit 110 and the AND circuit 1, respectively.
11 _M1 to _M25 . In Figure 4,
Input terminals M ₁ , M ₂ , M ₃ , M ₄ , M ₅ , M ₆ , M ₁₀ ,
All of M ₁₁ , M ₁₅ , M ₁₆ , M ₂₀ , M ₂₁ to M ₂₅ are “0”
Only when this happens, the signal 115S becomes "0" and the output signal 117S of the inverter 113 becomes "1". On the other hand, when at least one of the input terminals _M7 to _M9 , _M12 to _M14 , and _M17 to _M19 is "1", the output signal 116S of the OR circuit 111 becomes "1". When the signal 117S and the signal 116S become “1”, the AND circuit 112
The output signal 114S becomes "1" and the point can be detected.

Note that when detecting points, the size of the mask does not have to be limited to 5×5.

FIG. 5 is a block diagram showing an embodiment of the character cutting device of the present invention.

1 in Fig. 5 is a shift register (called a line buffer) consisting of N x L ₁ stages in which the quantization pattern of one line sentence having a size of N x L ₁ is stored as shown in Fig. 2. do. The shift register 200 consists of 5.times.N stages shown in FIG. 5, and has a structure in which the output signal 185S of the line buffer 1 is input to the uppermost stage 2N, and then shifted downward in order. The signal of the quantization pattern on the output line 185 of the line buffer 1 is the signal of the quantization pattern of a ₁ in the figure of FIG. 2 first, the second is a ₂ , the third is a _3, etc. , then enter the second column in the same way. Note that the line buffer 1 is sequentially connected to the shift register 200 at fixed time intervals according to the readout signal.
It is also possible to use a memory having a capacity of N×L ₁ bits for reading to stage 2N. 5×5 stage 2 of shift register 200
The values of i to 6i (i = 1...5) are shown in Figures 3 and 4.
This can be checked using a point detection circuit 9 equivalent to that explained in the figure. Output lines 501-525 of stages 2i-6i (i=1...5) are connected to input terminals _M1 - _M25 of OR circuit 110 and OR circuit 111 in FIG. 4, respectively.

40 in Fig. 5 is a shift register (called a work buffer) that is large enough to store a quantization pattern with a size of N x L ₂ for one character, and consists of two _or more N x L stages. ). Furthermore, the lowest stage 61 of the shift register 200
The output signal 183S is input to the work buffer 40. Incidentally, like the line buffer 1, the work buffer 40 may also be a memory having a capacity of N×L ₂ bits or more.

A clock signal 170S in FIG. 5 is output from the control section 30 and is used for shifting and writing to the read shift register 200 from the line buffer 1 and writing to the work buffer 40.

The signal 154S in FIG. 5 is a data signal and always outputs "0". The data signal line 154 is connected to stages 2i to 6i (i) of the shift register 200.
=1...This is a signal line for erasing a point by rewriting the contents of 5) to "0".

The signal line 152S in FIG.
This is a shift/load control signal having a period twice that of S, and when outputted from the control unit 30, read from line buffer 1 and shift register 2.
00 shift and write, work buffer 4
Controls writing to 0. That is, line buffer 1, shift register 200, work buffer 4
0, when the shift/load control signal 152S becomes "1", a clock pulse is output from the clock signal line 170 and one shift is performed. In addition, the control unit 30 sets the shift/load control signal 152S to “0”.
When the point erasure signal 153S becomes "1" at the time when Only 2i to 6i (i=1...5) are reset to "0".

Furthermore, if the point erase signal 153S is "0" when the shift/load control signal 152S is "0", the shift register 20 is not outputted on the clock signal line 170.
The contents of stages 2i to 6i (i=1...5) of 0 do not change. Note that each stage of the shift register 200 other than the line buffer 1 and stages 2i to 6i (i=1...5) and the work buffer 4
0 means that when the shift/load control signal 152S is "1", a clock pulse is output from the clock signal line, and the clock is shifted once, but the shift/load control signal 152S is "1".
When 52S is "0", the contents of each stage do not change.

A signal 163S in FIG. 5 is a one-scan line end signal output from the control unit 30,
When one column of the quantization pattern stored in the vertical direction is shifted (N times), it becomes "1".

201 in FIG. 5 is a vertical dotted line range determination section,
It is composed of a register 11, a register 46, a scanning column position counter 10, a comparison circuit 12, a comparison circuit 47, and an OR circuit 300. The vertical dotted line positional deviation width storage register 46 stores the vertical dotted line positional deviation width ΔL ₂ shown in FIG. The character extraction start value storage register 11 is kept at "0" by the reset signal 168S until the left end of the character frame is detected, which will be described later.
However, when the left end _of the character frame is detected, a signal 167S is sent to calculate the value (L _{2 -} Δ
_L2 ) is set, and when the right end of the character frame (described later) is detected, it is set to "0" again by the reset signal 168S.
will be reset to Scanning row position counter 10
is incremented by one when the one-scanning end column signal 163S becomes "1", and is reset to "0" by the reset signal 168S when the scanning column position corresponding to the left or right end of the character frame is detected.
In the comparator circuit 12, the scanning column position counter 10
It is checked whether the value of is larger than the value of the single character extraction start value storage register 11, and if it is, the output signal 160S becomes "1".

Also, it is checked whether the value of the scanning column position counter 10 is smaller than the value (ΔL ₂ ) of the vertical dotted line position shift width storage register 46, and if it is smaller, the output signal 159
S becomes "1". As a result, even if the vertical dotted lines are uneven or tilted, the vertical dotted line position shift width Δ
If the point is within the tolerance determined by _L2 , the point detected by the point detection circuit is considered to be part of the vertical dotted line.

Note that the signal 160S or the signal 159S
When becomes "1", the OR circuit 300 opens and the output signal 156S of the vertical dotted line range determining section 201 becomes "1".
becomes.

Reference numeral 202 in FIG. 5 is a vertical dotted line detection unit that determines whether the number of points arranged in the vertical direction is greater than or equal to a certain value.
It consists of The standard value (r) of the number of points in the vertical direction is stored in the register 18. When the output signal 114S of the point detection circuit 9 and the output signal 156S of the dotted line range determination unit 201 each become "1", the output signal of the AND circuit 302 becomes "1", and the point counting counter 17 is incremented by 1. That is,
The point counting counter 17 counts the number of points arranged in the vertical direction. In the comparator circuit 16, when the one scanning line row complete signal 163S is "1", the point counting counter 17 checks whether the standard value (r) of the number of vertical points is larger than the content of the storage register 18, and if it is larger, the value is The output signal 157S becomes "1". When the signal 157S becomes "1", it means that either the right end or the left end of the character frame has been detected.

When the left end of the character frame is detected, the control unit 30 sends a reset signal 168S and a set signal 167S.
is output, the scanning line position counter 10 is reset to "0" by the reset signal 168S, and the character cutting start value storage register is set to the set signal 1.
67S sets L ₂ -ΔL ₂ . When the right edge of the character frame is detected, a reset signal 168S is sent.
is output from the control unit 30, and the scanning line position counter 10 and the single character extraction start value storage register 1
1 is reset to "0". Note that the point counting counter 17 is reset to "0" by a reset signal 181S output from the control section 30 when the output signal 156S of the vertical dotted line range determination section 201 becomes "0".

14 in FIG. 5 is a 2-bit counter, and the output signal 157S of the vertical dotted line detection section 202 is "1".
Then, the count increases by 1. Further, when the second bit of the 2-bit counter 14 becomes "1", the single character cutting signal 158S becomes "1", and is then set to "0" by the reset signal 182S. That is, the single character cutting signal 158S becomes "1" when the right end of the character frame is detected.

Next, detection of only the character portion will be explained.

In FIG. 2, ΔN ₂ indicates the positional deviation width between the horizontal points, and ΔN ₁ indicates the allowable range for finding the first detected upper point in the horizontal direction.

FIG. 6 shows a specific configuration circuit of the range determining section 45 shown in the horizontal dotted line in FIG. Reference numeral 451 in FIG. 6 is a counter, and when the shift/load control signal 152S becomes "1" and the line buffer 1, shift register 200, and work buffer 40 in FIG. When 163S becomes "1", it is reset to "0". That is, the value of the counter 451 indicates the vertical position from the top of the quantization pattern. The register 456 stores the positional deviation width ΔN ₂ between horizontal points. 457 is an adder circuit which adds the value (ΔN ₂ ) of the register 456 and the value of the counter 451. A subtraction circuit 452 subtracts the value (ΔN ₂ ) of the register 456 from the value of the counter 451. Register 453 and register 458 initially have initial setting values (ΔN ₁ and N−Δ
N ₁ ) is stored.

A comparison circuit 454 checks whether the value of the counter 451 is smaller than the value of the register 453 (initially set to _ΔN1 ), and if it is smaller, the output signal 471S becomes "1". Also, in the comparison circuit 455, it is checked whether the value of the counter 451 is larger than the value of the register 458 (N- _ΔN1 is set first).
If it is larger, the output signal 472S becomes "1". When the signal 471S or the signal 472S becomes "1", the output signal 169S of the horizontal dotted line range determining section 45 becomes "1". Also, signal 471S
When the output signal 156S of the vertical dotted line range determination section becomes "1", a point is detected by the point detection circuit, and when the signal 114S becomes "1", the AND circuit 4
76 is opened and the signal 473S becomes "1". When the signal 473S becomes “1”, the value of the register 456 (ΔN ₂ ) and the value of the counter 451 are added to the adder circuit 45.
7 and stored in register 415.

The comparator circuit 416 checks whether the value of the register 415 is smaller than the work register 459 (initially ΔN ₁ is set), and if it is, the output signal 830S becomes "1" and the value of the register 415 becomes the work register. 459, and the value of the register 459 is changed according to the value of the work register 415.

When the one scanning line end signal 163S becomes "1", the value of the work register 459 is transferred to the register 453, and the value of the register 453 is transferred to the work register 45.
Changed by the value of 9. In this way, the register 453 is set to a value obtained by adding the positional deviation width ΔN ₂ between the horizontal points to the position of the highest point on the vertical dotted line.

On the other hand, when the signal 472S and the output signal 156S of the vertical dotted line range determination section become "1", a point is detected by the point detection circuit 9, and the signal 114S becomes "1".
Then, the AND circuit 477 opens and the signal 474S
becomes “1”. When the signal 474S becomes "1", the value of the register 456 (ΔN ₂ ) is subtracted from the value of the counter 451 in the subtraction circuit 452 and stored in the register 420.

The comparison circuit 421 checks whether the value of the register 420 is larger than the work register 460 (initially set to N- _ΔN1 );
If it is larger, the output signal 831S becomes "1", the value of the register 420 is transferred to the work register 460, and the value of the work register 460 is transferred to the register 420.
is changed by the value of .

When the one scanning line end signal 163S becomes "1", the value of the work register 460 is transferred to the register 458, and the value of the register 458 is transferred to the work register 42.
Changed by a value of 0. In this way, a value obtained by subtracting the positional deviation width ΔN ₂ between the horizontal points from the position of the lowest point on the vertical dotted line is set in the register 458.

Note that the output signal 15 of the vertical dotted line range determination unit 201
6S or the output signal 169S of the horizontal dotted range determining section 45 becomes "1", the OR circuit 3 of FIG.
01 is opened, a point is further detected by the point detection circuit 9, and the output signal becomes "1", as shown in FIG.
The AND circuit 303 opens and the point erasure signal 1 in FIG.
Since 53S becomes "1", the contents of stages 2i to 6i (i=1...5) become "0" and the points are erased as described above.

Also, when the separation of characters in a single line sentence is completed, the control unit 3
A set signal 195S is output from 0, ΔN ₁ is output to the register 453 and the work register, and N-ΔN ₁ is output to the register 458 and the work register 460.
The initial setting values for each are set.

When the single character cutting signal 158S is output, the control unit 30 controls the line buffer 1 and the work buffer 4.
0, register 200, scan column position counter 10
is placed in a hold state, and the quantization pattern for one character already stored in the work buffer 40 is transferred to the memory pattern area (not shown) of the character recognition section.

When a recognition end signal (not shown in the drawing) is output from the character recognition section, the clock signal 170S and shift signal are output.
The load control signal 152S causes the register 20
0, line buffer 1, and work buffer 40 start shifting.

Furthermore, the scanning column position counter 10 starts counting in response to the one scanning column end signal 163S.

In this way, characters are separated one after another.

As described above, by actively detecting the character frame according to the present application, it is possible to separate the characters into individual characters, and by subsequently erasing the character frame, it is possible to obtain a quantization pattern of only the character part, and optically Even if the color of the scanned frame and the color of the character part are the same, a binary quantization pattern can be stably extracted.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an example of a line of character frames formed by dotted lines arranged vertically and horizontally at regular intervals on an OCR sheet. FIG. 2 is a diagram showing a part of the quantization pattern obtained by quantizing FIG. 1 into a binary pattern as a mesh pattern. Figure 3 shows a 5x5 mask that detects points below a certain size in the quantization pattern shown in Fig. 2, and Figure 4 shows a mask that detects points below a certain size. FIG. 3 is a diagram illustrating a specific example of a point detection circuit for detecting a point. Fifth
The figure is a block diagram showing one embodiment of the character cutting device of the present invention. FIG. 6 is a diagram showing a specific example of the horizontal dotted range determining section. In the figure, 200 is a shift register consisting of 5×N stages, 201 is a vertical dotted line range determination unit, 9 is a point detection circuit, 202 is a vertical dotted line detection unit, 45 is a horizontal dotted line range determination unit, and 153 is a vertical dotted line range determination unit. A point erasure signal line, 154 a data signal line, 30 a control unit,
1 is a diagram showing a line buffer.

Claims (1)

[Claims] 1. A rectangular character frame for one character in which dotted lines formed by linearly arranging dots of a certain size at regular intervals are printed vertically and horizontally on the paper, and the character pattern written in the character frame is at least A quantization circuit that converts a region containing one set into a binary quantization pattern divided into an integer number of squares (mesh), and a quantization circuit that converts a signal that does not spread beyond a certain range into the quantization pattern a point detection circuit that detects a chunk of mesh as a point, and a position in the quantization pattern where a certain number or more of points detected by the point detection circuit are detected within a vertical scanning row range that includes vertically arranged dotted lines. is the position of a vertical dotted line in a character frame, and a circuit detects the highest and lowest points of the detected vertical dotted line as positions of two horizontal dotted lines in the character frame, and A character cutting device characterized in that it is equipped with a circuit for erasing dotted lines, and only the mesh of the character portion serves as a signal.