JPS61292270A - Data reproducing method - Google Patents

Abstract

PURPOSE:To improve the reliability of a storage device by reproducing a data based on a window pulse generated from a reference position detecting signal, such as a sector pulse, when the leading mark of a data block is not detected. CONSTITUTION:A reading circuit in a disk device consists of a waveform shaping circuit 2, a VF04, a serial/parallel conversion circuit 5, a data pattern detecting circuit 6, a data buffer 7, an AND circuit 9, an OR circuit 10, a within- section counter 11, a re-synchronization detecting window generating circuit 3 which generates a re-synchronization detecting window 1 from a sector pulse 4 with detecting a sector mark (a) from a read signal 3 and an AND gate 8' which takes an AND condition between the window 1, a sync byte check signal 7 and a re-synchronization detecting pulse 8. When a sync byte (d) that is the leading mark in a data block (c) is detected, the data of a section (e)(1)... is reproduced by a re-synchronization detecting window 2 generated based on a read pulse 5. When the sync byte (d) is not detected, the data is reproduced by the window 1.

Description

[Detailed Description of the Invention] [Summary] A method for reproducing data recorded in a storage device, which reproduces data on the condition that a leading mark such as a sync byte recorded at the beginning of a data block is detected. In contrast, even when the leading mark is not detected, a predetermined wind pulse is created from a reference position detection signal such as a sector pulse, and data can be reproduced based on this wind pulse.

[Industrial application field]

The present invention relates to a data reproducing method capable of reproducing data of a data block using a wind pulse generated by a sector pulse even when the leading mark of the data block is not detected.

Various types of data formats on recording media of devices that store data processed by information processing systems have been developed and put into practical use.

One of these methods is to divide a track on a recording medium into sectors, and process user data in each sector by dividing a data block located a certain distance behind the reference position of the sector into multiple sections. There is a way to handle it.

In the above case, playback synchronization data is recorded at the beginning of each of the multiple sections, and a start mark (that is, the playback synchronization data of the first section is this start mark) is recorded at the beginning of the data block. has been done.

When reproducing user data when such a data format is recorded, it is performed by detecting the reference position and the first mark. It is expected that reliability will be improved.

[Prior art and problems to be solved by the invention] FIG. 4 is a block diagram illustrating a conventional example, and FIG. 5 is a data block processing status diagram.

The block diagram in Figure 4 is a block diagram showing a part of the reading circuit of the disk device, and the waveform of the read signal (analog signal) that reads the data of each section e(1) to e(n) into a read pulse Waveform shaping circuit 2 to be shaped, read pulse outputted from waveform shaping circuit 2 to NR
Z data (for example, data created by defining "1" when the magnetization direction is reversed and "0" when it is not reversed), VFO4 that creates read clock ■, etc., NRZ data sent from VFO4 (serial data ) into parallel data, a serial/parallel conversion circuit 5 that detects the data pattern of the input parallel data based on a predetermined clock and generates a sync byte check signal;
A data pattern detection circuit 6 that creates resynchronization detection pulses, sync bite detection pulses, etc., and manually inputs parallel data to each section e(1) to e.
(n) data buffer 7 to be stored every time, AND8 to take the AND condition of the sync byte check signal ■ and the resync detection pulse ■, and the logic between the resync detection pulse ■ and the resync detection window ■ output from the bit counter 11 in the section. Take the product condition AND9, AND8. Take the logical sum condition of the output of AND9 and the sync byte detection pulse ■ 0RIO1 Use the output of ORIO as a clear signal, and use the read clock ■ to set the read byte clock @ and the resynchronization detection window ■
and sections e(1) to e(n
), and an in-section focus counter 11 which outputs an in-section byte selection signal (■), etc.

Normally, the sync byte d at the head of the data block C shown in FIG.
When detected by the data pattern detection circuit 6, the in-section bit counter 11 operates and generates the next resynchronization detection window ■, and the data pattern detection circuit 6 detects the data read by the resynchronization f(2) within this window ■. The resynchronization detection pulse ■ is sent to AND9.

AND9 takes the logical product condition of window (2) and pulse (2), resets the in-section focus counter 11 via 0R10, moves on to the next operation, and repeats the same operation.

However, if the sync byte d at the beginning of the data block C is not detected by the data pattern detection circuit 6, it becomes impossible to reproduce the data in the data block C, which causes a decrease in the reliability of the device.

Therefore, various countermeasures have been attempted as countermeasures against this problem, but a simple method that provides sufficient reliability has not been put into practical use to date.

[Means for solving problems]

FIG. 1 shows a block diagram of the principle of the present invention.

FIG. 1 shows the waveform shaping circuit 2 described in FIG. νF04,
Serial/parallel conversion circuit 5. Data pattern detection circuit 6. Data buffer 7, AND9,0RIO.

An in-section counter 12, a resynchronization detection window creation circuit 3 that creates a resynchronization detection window ■ from the sector pulse ■ output by detecting sector mark a from the read signal ■, and a resynchronization detection window creation circuit 3 output from the resynchronization detection window creation circuit 3. AND8 which takes the logical product condition of the detection window ■, the sync byte check signal ■, and the resynchronization detection pulse ■
It consists of ' and.

[Effect]

When reproducing data of data block C, if sync byte d, which is the first mark of data block C, is detected,
When resynchronization detection window ■ created based on read pulse ■ detects resynchronization f (i) and reproduces the data of each section e (1) to e (n), and synchronization by I-d is not detected. is each section e (1) in the re-synchronization detection window created by sector pulse.
By reproducing the data of ~e (n), it becomes possible to dramatically improve the reliability of the device using a simple method.

〔Example〕

The gist of the present invention will be specifically explained below with reference to the embodiment shown in the second circle and FIG.

FIG. 2 is a block diagram illustrating the present invention in detail, and FIG. 3 is a diagram illustrating an example of width pulse creation according to an embodiment of the present invention. Note that the same reference numerals indicate the same objects throughout the figures.

In the operation of this embodiment, the data pattern detection circuit 6 detects the sync byte d from the data developed by the read pulse ■, and creates and outputs the resynchronization detection window ■ in the fourth operation.
Since the operation is the same as that explained in the figure, the explanation will be omitted, and in this embodiment, the operation will be explained on the assumption that the sync-by ld cannot be detected.

The sector mark detection circuit 31 detects the sector mark a from the read signal ■ and sends a sector pulse ■ to the intra-sector bit counter 32.

Note that the in-sector bit counter 32 has a count value corresponding to the start mark position of the data block C, that is, the sync byte d position, and a re-synchronization f(2) ~ from the sector mark a position in advance.
A count value corresponding to each position of f (n) is set.

The in-sector focus counter 32, reset by the input of the sector pulse ◎, starts counting, and when it reaches a count value corresponding to the sync byte position d, it sends the sync byte check timing signal ■ to the data pattern detection circuit 6.

The data pattern detection circuit 6 detects the zinc byte check signal ■ by the sink byte check timing signal ■.
Send to D8'. On the other hand, the bit counter 3 in the sector
2 sends a resync detection window ■ to the 8ND8' when it reaches a position corresponding to resynchro f(2), for example.

In this state, when the data pattern detection circuit 6 reads the resynchronization f(2) and detects it from the data, the resynchronization detection pulse ■ is sent to the AND8', and the AND8' takes the AND condition of the three signals ■, ■, and OI signal?
10 to the in-section focus counter 11, the in-section focus counter 11 is cleared, and a counting operation is started.

When the in-section bit counter 11 counts a predetermined value, the next re-sync detection window ■ is generated, and when the re-synchro f(3) pattern is detected within this window ■, the in-section focus counter 11 is cleared and counting is started again. Start.

As a result, data reproduction is normally performed from section e(3) after rejincro [(3) is detected. Incidentally, the above-mentioned operating situation is shown in FIG.

〔Effect of the invention〕

According to the present invention as described above, there is an effect that device reliability can be dramatically improved by a simple method.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram explaining the present invention in detail, FIG. 3 is a diagram explaining an example of width pulse creation according to an embodiment of the present invention, and FIG. 4 is a diagram of a conventional example. The block diagram to be explained and FIG. 5 are data block processing status diagrams. In the figure, 2 is a waveform shaping circuit, 3 is a resync detection window creation circuit, 31 is a sector mark detection circuit, 32 is an in-sector bit counter, 4 is a VFOl, 5 is a serial/parallel conversion circuit, 6 is a data pattern detection circuit, 7 is the data buffer, 8.8', 9 is eight NO. 10 is OR. 11 denotes an intra-section bit counter, respectively.

Claims (1)

[Claims] A predetermined track on a recording medium is divided into a plurality of sectors, and a data block (c) is recorded a predetermined distance behind the sector mark (a) position recorded at the beginning of the sector. A start mark (d) is placed at the beginning of the data block (c), and playback synchronization data (f( 2) When the head mark (d) is detected when reproducing the data recorded in each section (e(1) to e(n)) in a device in which sections (e(1) to e(n)) are inserted. is each playback synchronization data (f(2)
~f(n)), and reproduces data from the beginning of the data block (c), and if the beginning mark (d) is not detected, the sector mark (
The reproduction synchronization data (
f(2) to f(n)), and the playback synchronization data (
f(2) to f(n)) after detecting the section (e
A data reproducing method characterized by reproducing data from (2) to e(n)).