JPS6129035B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an optical character reading device, and more particularly to a device that electrically identifies dirt and the like on an object on which characters are written as noise and deletes it.

Conventionally proposed optical character reading devices use a photoelectric conversion unit 1 to scan and detect an object, such as paper, on which characters, codes, etc. are written, as shown in a simplified diagram in FIG. The obtained analog signal is converted into a binary signal corresponding to the character area and the background area by the binarization circuit 2, and based on this binary signal, the identification circuit 3 identifies the character, etc. It has a function to output code. In such conventional circuits, if the object is dirty or noise is picked up for some reason, the binary signal indicating the unnecessary area such as characters is input as is to the identification circuit 3 and processed. , the identification process is often performed while still containing noise, resulting in inability to identify or identification errors.

In view of this drawback, the present invention provides an optical character reading device for converting and correcting a binary signal representing a character area that is not in a regular character area into an unnecessary binary signal of a background area. purpose.

In order to achieve such an object, the present invention provides a system in which a character area and a background area in a visual field area that is a part of an object in which characters, etc. are written correspond to multiple rows and multiple columns of pixels in the visual field area. The photoelectric conversion unit scans and detects the signal, the analog signal from this photoelectric conversion unit is converted into a binary signal by the binarization circuit, and based on this binary signal, the identification circuit outputs a code such as the above characters. In the device, a preprocessing circuit is interposed between the binarization circuit and the identification circuit, and the preprocessing circuit converts the binary signal of each pixel into a state of the binary signals of nxn pixels surrounding the pixel. Determined by. Therefore, as a pre-processing circuit, there is a memory circuit that sequentially stores the binary signals from the binarization circuit, and a memory circuit that processes the binary signal data stored in the memory circuit and converts the nxn pixels around the pixel. It is configured as a circuit that determines the pattern of a value signal. On the other hand, when storing a binary signal in a storage circuit in order to correctly determine the binary signal of a pixel near the boundary of a character area,
Following the binary signal of the pixel near the boundary, the binary signal of the dummy pixel is stored as background area data, and the determination circuit determines the binary signal of each pixel.

Here, an embodiment of the optical character reading device according to the present invention will be described. In this embodiment, a shift register is used as a storage circuit, and the binary signal of the center pixel is determined based on data of 5×5 pixels. Second
The figure is a simplified diagram in which a preprocessing circuit 4 for noise removal is interposed between a binarization circuit 2 and an identification circuit 3. In other words, the entire visual field, which is a part of an object with characters written on it, that is, the character area and the background area, is divided into multiple rows and multiple columns of pixels in the visual field, and each row or column is divided into pixels. A photoelectric conversion unit 1 that sequentially scans and can detect each pixel as a different signal depending on whether it is a text area or a background area.
There is a binarization circuit 2 that converts the analog signal corresponding to each pixel from the photoelectric conversion unit 1 into a digital signal, and a preprocessing circuit 4 for noise removal is provided after the binarization circuit 2. exists.

The binary signals inputted to the preprocessing circuit 4 are usually handled and transmitted as parallel binary signals, for example, one row of signals at a time. A parallel-to-serial conversion circuit exists for the conversion. Since this conversion to a serial binary signal is for the convenience of inputting to the next stage of multi-stage shift registers, the binarization circuit 2
Naturally, if the output from the converter is a serial binary signal, a parallel conversion circuit is not required.

In this embodiment, the shift register has five stages connected in series, as shown in FIG. Therefore, the capacity of the shift register 5 is 5.
The shift registers a to 5d have memory elements corresponding to two pixels in addition to the pixels for one row of the visual field area described above, and the fifth stage shift register 5e must have at least five memory elements.

Now that the capacity of the shift register 5 has been explained, an overview of noise removal in this embodiment related to the capacity will be explained. The shift register 5 contains binary signals corresponding to pixels in a plurality of rows (let's say n rows now) and a plurality of columns (let's say m columns now) in the viewing area of the photoelectric converter 1 shown in FIG. come. That is, the binary signal is input from the left end of the i row to the right end, then from the left end to the right end of the i+1 row, and so on. Further, in this embodiment, as shown in FIG. 4, in addition to the n rows of the visual field area, processing is performed assuming two columns of pixels for each row, that is, m+2 columns. This assumption means that in the actual visual field, there are only n rows and m columns, but in the latter stage of the binarization circuit 2, electrically m+2
Two columns of binary signals are further inserted into the binary signal from the binarization circuit 2 so as to form a column. These two columns of additional binary signals contain binary signals corresponding to the background area. The reason for adding this so-called dummy binary signal will be described later.

Now, the binary signal that corresponds to one row of pixels shown in FIG. The binary signals to be output are also transferred to the shift registers 5b, 5.
c, 5d, and 5e, the binary signal input into the shift register 5 of FIG. 3 takes the same arrangement state as the pixels of FIG. 4. Here, when determining whether or not the binary signal corresponding to the black dot in FIG. We will focus on binary signals corresponding to pixels in 5 rows and 5 columns with . Such states are numbered and shown in FIG. 5. Among the binary signals corresponding to the pixels in 5 rows and 5 columns, whether or not the binary signal of pixel 33 in FIG. Consider a case where the binary signals corresponding to the pixels in the 5 rows and 5 columns are divided. That is, when comparing Figure 6 and Figure 5, A = 11, 12, 21 B = 41, 51, 52 C = 14, 15, 25 D = 45, 55, 54 E = 22, 32, 42 F = 24, 34, 44 G = 13, 31, 35, 53 H = 23, 43 I = 21, 31, 41, 25, 35, 45 J = 11, 12, 13, 14, 15, 51, 52, 53 , 54, 55. Then, assuming these multiple types of components, for example, three mosaic patterns shown in FIG. 7, FIG. 8, and FIG. 9A are set, and in FIG. When either E or F is a binary signal of the background area, the binary signal of pixel 33 is taken as the binary signal of the background area, and in Fig. 8, the components E, F, H, and G are When the three components A, B, C, and D are the binary signals of the background area, the binary signal of pixel 33 is taken as the binary signal of the background area, and in FIG. 9A, component J is the binary signal of the background area. Pixel 3 when there is at least one binary signal of a character etc. area within two I, E, F in the binary signal of the background area.
The binary signal of pixel 33 is determined by using the binary signal of pixel 33 as the binary signal of the character area.
The mosaic pattern mentioned here is an example; by changing the combination of components shown in FIG. 6, various mosaic patterns can be created and there are many methods for determining the pixels 33. Alternatively, the combination of pixels forming the component shape may be changed to create a component shape having a different arrangement. Furthermore, the binary signal of the pixel 33 may be determined by changing the convergence state of where the binary signal of the background area is located or where the binary signal of characters or the like is located. In this way, by applying multiple types of mosaic patterns having multiple components to the binary signals corresponding to pixels in 5 rows and 5 columns around the binary signal corresponding to the target pixel, The binary signal of the pixel can be determined. In this case, the pixels are not limited to 5 rows and 5 columns, but a mosaic pattern of 7 rows and 7 columns, for example, can also be used.

An overview of the shift register 5 and noise removal has been described above, and now we will further describe the dummy, which is an important feature of this embodiment. Figure 9a shows a case where an unnecessary area such as a character exists at the boundary of the visual field, and in this case, when determining whether or not this pixel is a genuine character area, the It must be based on a binary signal corresponding to the 5th row and 5th column. However, if the dummy shown in FIG. 9b does not exist next to the binary signal corresponding to the last pixel in row i, which is the subject of this determination, as a binary signal string, then the signal corresponding to the first pixel in row i+1 is not present. A binary signal will come. In other words, the binary signal that corresponds to the right half pixel of the pixel to be determined becomes the binary signal that corresponds to the first pixel in the next row, so the pixel that actually exists to the right of the pixel to be determined It will be different from that. For this reason, as shown in FIG. 9c, a binary signal corresponding to a pixel originally determined to be in an unnecessary background area is mistakenly determined as a binary signal corresponding to a pixel in a genuine text area. It could also happen. For this reason, the binary signal string is manipulated so that there are two rows of background region pixel bands in this embodiment at the edge of the visual field, as shown in FIG. 9d.
As shown in FIG. 9e, the pattern of the character area and the background area is different from that in FIG. 9c, and the binary signal of the pixel to be determined is accurately determined.

Examples of circuits in which a dummy is actually inserted are shown in FIGS. 10 and 11. In the example of FIG. 10, when the output signals of the binary conversion circuit 2 are output in parallel, the binary signals corresponding to the background area for two columns as dummy data are also input in parallel to the parallel-to-serial conversion circuit 4a. This dummy binary signal is inserted before the first binary signal of each row in the viewing area at the appropriate timing. The example in FIG. 11 shows a case where the output of the binarization circuit 2 is output in series, and the binary output signal of the binarization circuit 2 is clocked.
It is input to the FIFO (first-in-first-out shift register) 4b at CK ₁ and is sent to the preprocessing circuit 4.
When data is read from FIFO 4b by clock CK ₂ of FIFO 4b, clock CK ₂ of FIFO 4b is read by dummy data insertion timing before the first binary signal of each row.
is masked and dummy data is inserted. When setting as a dummy, when the clock reaches T, the clock CK ₂ reads out the FIFO 4b again, and the output thereof is directly input to the next stage.

The above explanation is about the case where a dummy is taken on the right side of the visual field, but noise can be removed from the upper and lower parts of the visual field by similarly providing a dummy at the upper end of the visual field. Also, a dummy may be added to the left side and bottom edge of the field of view instead of the right side and top edge.

In the above explanation, the shift register, noise removal, and dummy insertion were described. Next, a shift register and a relatively specific circuit for noise removal will be described. Figure 12a shows the shift register 5, into which a series binary signal from the binarization circuit is input, and the binary signal sequentially passes through the pixels in row n and column m+2 in the visual field. This corresponds to what was scanned. And shift registers 5a1, 5a2,
5b1, 5b2, 5c1, 5c2, 5d1, 5d
2 has the memory element corresponding to column m+2,
There are at least five storage elements in the shift register 5e. Therefore, binary signals for pixels shown in FIG. 4 are stored in this shift register 5. Shift registers 5a1, 5b1, 5c1, 5
Output terminals are present in the five memory elements in the preceding stage of d1 and 5e, and binary signals corresponding to the pixels shown in FIG. 5 are present in these 25 memory elements. Then, binary signals corresponding to the pixels are sequentially sent to the shift register 5 and shifted by the shift register 5. Therefore, for example, shift register 5
Binary signals corresponding to each pixel will sequentially reach the third storage element a33 of c1, and of course new binary signals will also sequentially reach the storage elements surrounding this storage element a33. As a result, the suitability of the binary signals corresponding to all pixels in the viewing area including the dummy is questioned. 1st
Figure 2b shows Figure 7 for the 10 components shown in Figure 6,
Conditions for determining a binary signal corresponding to a target pixel from the mosaic patterns of FIGS. 8 and 9 are expressed as a circuit configuration. The same figure shows each component A, B, C, D, E shown in FIG.
Outputs of F, G, H, I, J and Figures 7 and 8
Combinations of components that are conditions for explanation of FIGS. 9 and 9 are described. Then, the output of FIG. 12b and the output of the storage element a33 of FIG. 12a are compared to determine the binary signal of the storage element a33.

In the explanation of this embodiment so far, the serial binary signal is scanned for each row of pixels to correspond to each other, but it is also possible to use a serial binary signal that is scanned for each column of pixels.

In addition, to determine the binary signal corresponding to the target pixel, the corresponding binary signal of 5 × 5 pixels was used, but for example, the binary signal corresponding to 7 × 7 pixels is used. You can also do that.

As explained above with reference to the embodiments, according to the present invention, it is possible to truly determine the target binary signal, and moreover, it is possible to pre-process the entire field of view with a single processing circuit, and it is also possible to use a dummy. Thus, the determination at the edge of the visual field became complete.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of an example of a conventional optical character reading device, FIG. 2 is a circuit diagram of an example of an optical character reading device according to the present invention, and FIG. 3 is a circuit diagram of a shift register in a preprocessing circuit. Connection diagram, Figure 4 is an explanatory diagram partially showing the viewing area and dummy as pixels, Figure 5 is an explanatory diagram showing binary signals corresponding to pixels in 5 rows and 5 columns, and Figure 6 is Explanatory diagrams of dividing a binary signal corresponding to a pixel into multiple components, Figures 7 to 9
Each figure A is an explanatory diagram showing three examples of a mosaic pattern, and the whole figure 9 a, b, c, d, and e shows an error in determining the binary signal corresponding to a pixel when a dummy is present or absent. Figures 10 and 11 are circuit diagrams showing two examples of dummy data insertion circuits, and Figures 12a and 12b show specific shift registers and condition setting circuits, respectively. It is something. In the drawing, 1 is a photoelectric conversion unit, 2 is a binarization circuit, and 3 is a photoelectric conversion unit.
is an identification circuit, 4 is a preprocessing circuit, 5, 5a, 5b,
5c and 5d are shift registers.

Claims (1)

[Claims] 1. Scanning and detecting the text, etc. area and the background area in a visual field that partitions a part of the object in which the text, etc. are written with a photoelectric conversion unit corresponding to multiple rows and multiple columns of pixels in the visual field, The analog signal from the photoelectric conversion unit is converted into a binary signal by a binary conversion circuit, and based on this binary signal, a code such as the above characters is output by an identification circuit. A preprocessing circuit is interposed between the identification circuit and the preprocessing circuit, and the preprocessing circuit sequentially stores the binary signals from the binarization circuit and correctly determines the binary signals of pixels near the boundaries of the character area. To do this, when storing a binary signal, a storage circuit is provided with a binary signal of a dummy pixel following the pixels near the boundary as background area data, and a binary signal stored in the storage circuit is provided. An optical character reading device comprising a circuit that processes data and determines the presence of binary signals of pixels surrounding a certain pixel.