JPS61288530A - Fail safe drive circuit for optical data transmitter - Google Patents

Abstract

PURPOSE:To improve the utilizing efficiency of a transmission system and to reduce remarkably time delay between an input signal and an output optical signal by providing a gate circuit, a Schmitt circuit, an inverter circuit and a push-pull drive circuit so as to improve the utilizing efficiency of the transmission system and so as to attain the use of other transmitter even when a transmission sector of a transmitter is faulty. CONSTITUTION:A pulse signal Pi and a clock pulse signal CP are inputted respectively to two input terminals 1a,1b of a gate circuit 1, an output terminal is connected to the input terminal of a Schmitt circuit 2, and the output terminal of the Schmitt circuit 2 is connected to a base of a transistor (TR)Q1 of an inverter circuit 3. A diode D conducted at push output (conduction of a TRQ2) of a push-pull output circuit and a light emitting element LED conducted at pull output (conduction of a TRQ3) are connected in parallel, and the diode D and the light emitting element LED are cut off from the output terminal of the push-pull output circuit by a capacitor C.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a fail-safe drive circuit in an optical data transmission device using optical fibers.

(Prior technology) Compared to metallic cables, transmission systems using optical fibers are capable of high-speed, long-distance, non-repeater data transmission equipment, have high electrical insulation properties, and are free from electromagnetic induction. It has advantages such as being lightweight and flexible, and many transmission systems have been put into practical use. In such a transmission system, a plurality of optical data transmission devices each having a transmitting section and a receiving section are installed in parallel on a transmission line, and a plurality of optical data transmission devices in a transmitting state are connected to a plurality of optical data transmitting devices in a receiving state. Data is sent via transmission lines.

Conventionally, a transmitter used in an optical data transmission device is configured as shown in FIG. The transistor Q is controlled on and off to blink the light emitting diode LED, converting the input electrical signal into an optical signal, and transmitting the optical signal to the optical fiber cable. That is, transistor Q (7
) When a high level signal (logical product "l") is input to the pace, the transistor Q becomes conductive (on), the light emitting element LED lights up, an optical signal is sent to the optical cable, and a low level signal (logical product "l") is input to the pace. When the product "0") is input, the transistor Q becomes non-conductive (off), the light emitting element LED is turned off, and no optical signal is sent out. In this way, the transmitter converts the input electrical signal into a corresponding optical signal and sends the optical signal to the optical fiber cable.

(Problem to be Solved by the Invention) However, in such a conventional optical transmitter, if the transistor Q of the drive circuit fails and, for example, the collector and emitter are short-circuited, the light emitting element LED becomes unrelated to the input signal. As a result, data from other optical data transmission devices cannot be transmitted. That is, if the transmitter of one optical data transmission device fails and the light emitting element is turned on, there is a problem that all other optical data transmission devices become unusable.

The present invention was made by focusing on such conventional problems, and even if the driving transistor of one transmitter fails in short-circuit mode, the effect is not affected by the failure of the driving transistor in the optical fiber transmission line. It is an object of the present invention to provide a fail-safe drive circuit for an optical data transmission device that solves the above-mentioned problems without affecting all optical data transmission devices.

(Means for Solving the Problem) The gist of the present invention for achieving the above object is to input an input pulse signal and a clock pulse signal to the transmitting section of an optical data transmission device, and to calculate the logic of these two signals. a gate circuit that outputs the product signal; a Schmitt circuit that shapes and amplifies the AND signal; an inverter circuit that inverts the output signal of the Schmitt circuit; A fail-safe drive circuit for an optical data transmission device is characterized in that it includes a push-pull drive circuit that lights up a light emitting element only when 1.

(Function) Therefore, even if the driving element of the transmitting light emitting element of the optical data transmission device fails in short-circuit mode, the effect will not be exerted on all other optical data transmission devices connected to the optical fiber transmission line. Moreover, the time delay between the input electrical signal and the output optical signal is extremely small.

(Example) Hereinafter, one embodiment of the present invention will be described based on the drawings.

FIG. 1 shows a fail-safe drive circuit of a transmitting section of an optical data transmission device to which the present invention is applied. Two input terminals 1a and 1b of a fail-safe gate circuit (hereinafter simply referred to as a gate circuit) 1 receive pulse signals. Pi and a clock pulse signal CP are input, the output terminal is connected to the input terminal of a Schmitt circuit 2, and the output terminal of the Schmitt circuit 2 is connected to the pace of the transistor Q1 of the inverter circuit 3. The gate circuit 1 is an AND gate circuit that outputs a high-level signal (hereinafter referred to as AND "1") when both the input pulse signal Pi and the clock pulse signal CP are at high level, and the Schmitt circuit 2 outputs a high-level signal (hereinafter referred to as AND "1"). The AND signal is waveform-shaped and amplified and output.

The collector of the transistor Ql is connected to the positive power supply (+V) via a resistor R1, and a resistor R2 is connected to each of the transistors Q2 and R3 of the push-pull transistor output circuit (hereinafter simply referred to as push-pull output circuit) of the output circuit 4. , R3, and the emitter is connected to the negative power supply (-■
). The collector of transistor Q2 is connected to a positive power supply (+V), the emitter is connected to the emitter of transistor Q3, and the collector of transistor Q3 is connected to a negative power supply. Emitter of transistor Q2 and transistor Q
One end of a capacitor C is connected to the connection point a with the emitter of No. 3, that is, the output terminal a of the push-pull output circuit, the other end of the capacitor C is connected to the anode of a diode D, and the cathode of the diode D is Connected to negative power supply.

The cathode of the light emitting diode LED is connected to the connection point between the other end of the capacitor C and the anode of the diode D, and the anode is connected to a negative power supply. That is, the diode D, which is conductive during push output of the push-pull output circuit (when transistor Q2 is conductive), and the light emitting element LED, which is conductive during pull output (when transistor Q3 is conductive), are connected in parallel. The diode D and the light emitting element LED are DC-blocked by the capacitor C to the output end of the push-pull output circuit. As will be described later, this capacitor C is charged when the push-pull output circuit outputs a push signal, and discharged during a pull output signal from the push-pull output circuit.

Next, the operation will be explained with reference to the timing chart shown in FIG.

The gate circuit 1 receives the clock pulse signal CP (FIG. 2(b)) while the input pulse signal Pi (FIG. 2(a)) is at a high level.
The AND signal rlJ is output in synchronization with the . The Schmitt circuit 2 shapes and amplifies the input AND signal and outputs it ((C) in the same figure).
It is conductive when the logical product is "1", and it is non-conductive when the logical product is "0", and the collector potential becomes approximately negative voltage -■ when conductive and approximately positive voltage +V when non-conductive. That is, the inverter circuit 3 inverts the AND signal outputted from the Schmitt circuit 2 and outputs it [FIG. Conducts when the output signal is logical product “0”,
When the transistor Q1 is conductive, that is, when the output signal of the Schmitt circuit 2 is the logical product rlJ, it becomes non-conductive.

On the other hand, the transistor Q3 operates in the opposite way to the transistor Q2, being non-conductive when the transistor Q1 is non-conductive and conductive when the transistor Q1 is conductive. When transistor Q2 is conductive, that is, when it outputs a push output, it is connected from the positive power supply (+V) to transistor Q2 → capacitor C → diode D → negative power supply (
-V), current flows and capacitor C is charged. During this push output, the light emitting element LED is not lit.

When the transistor Q3 is conductive, that is, when it outputs a pull output, the electric charge charged in the capacitor C causes a current with the polarity opposite to the power supply polarity to flow through the path of capacitor C → transistor Q3 → light emitting element LED → capacitor C, as shown by the broken line. The light emitting element LED is turned on. Transistors Q2, Q that operate complementary to the pulse signal input from the inverter circuit 3
3 to charge and discharge the capacitor C, no current will flow to the light emitting element LED even if a short-circuit accident occurs in the transistors Q2 and Q3. Even when the capacitor C becomes conductive due to a fault such as a short circuit, the light emitting element LED, which emits light with the same polarity current as the power supply polarity, is charged with a reverse voltage and no current flows in the opposite direction, causing it to emit light. The element LED does not emit light and a fail-safe operation is performed.

Moreover, the drive mode of the light emitting element LED is such that it lights up when the output signal from the Schmitt circuit 2 is logical product "l", and "0".
'', the light goes out, and there is almost no time lag between the logical product "1" of the output signal of the Schmitt circuit 2 and the output optical signal waveform. Furthermore, the logical product of the output signals of the Schmitt circuit 2 is “1
By making the capacitance of the capacitor C sufficiently large with respect to the pulse width of ", that is, the discharge time of the capacitor C, the capacitor C can be regarded as a constant voltage source.

Therefore, by setting the capacitance of the capacitor C to an appropriate value, the driving current waveform of the light emitting element LED can be made into a square wave as shown in Fig. 2(e), and accordingly, the light emission waveform can be made into a square wave. As a result, signal processing on the light receiving side can be facilitated.

By the way, in the closed circuit shown by the broken line in FIG. 1, there is actually a circuit resistance R, and the transistor Q3 of the capacitor C
If the voltage on the side is Vc, the value of the driving current of the light emitting element LED is the voltage VC of the capacitor C and the voltage of the negative power supply (-■
) is approximately equal to the current Ir flowing when applied to the resistor R, and the light emitting element LED
The drive current is determined by the value of the terminal voltage Vc of the capacitor C.

Therefore, if the logical product "0" of the output signal of the Schmitt circuit 2 continues for a long time, the transistor Q2 becomes conductive during this time, the capacitor C is charged, its terminal voltage (charging voltage) Vc rises, and finally the positive power supply From the voltage (+V), the pace emitter saturation voltage V B of the relevant transistor Q2
The potential (V −V BE (SA
T)).

Then, the output signal of the Schmitt circuit 2 is shown in Fig. 3 (C
), when the logical product becomes "1", the initial driving current of the light emitting element LED at this time becomes a large current as shown in FIG. When the driving current of the light emitting element changes in this way, the intensity of the optical signal changes accordingly, and the intensity of the input optical signal on the light receiving side remains constant even if the distance between the transmitting part and the receiving part is constant. As a result, it is necessary to provide a range of input sensitivity to the receiving section. Further, it is necessary to provide a range of input sensitivity of the receiving unit even when the distance between the transmitting unit and the receiving unit changes, and a wider receiving sensitivity range is required, which causes an increase in cost.

This problem occurs when the transistor Q2 in FIG.
This problem can be solved by controlling the terminal voltage (charging voltage) Vc of the capacitor C so that it does not exceed a certain value when the circuit shown by the dashed dotted line is formed. Figure 4 shows an output circuit for defining the upper limit of the terminal voltage Vc of capacitor C, and the cathode is connected to the pace side of transistor Q2 and the anode is connected to the negative power source side between the pace of transistor Q2 and the negative power source. Constant voltage elements Dz are connected as shown in FIG.

The voltage on the pace side of the transistor Q2 does not become higher than the voltage defined by the constant voltage Vz by the constant voltage element Dz, and the transistor Q2 maintains the pace-emitter voltage VBE.
is the pace emitter saturation voltage V of the transistor Q2
When BE is lower than (5AT), transistor Q
2 becomes non-conducting. As a result, the emitter voltage of the transistor Q2, that is, the voltage at the connection point a, is the upper limit value of the pace voltage V
As mentioned above, the terminal voltage Vc of capacitor C, which does not become higher than the value specified by z, is
It can rise to the emitter voltage, and the terminal voltage Vc
The maximum value of is equal to the emitter voltage upper limit value, and the maximum value of the terminal voltage Vc of the capacitor C can be regulated by the constant voltage element Dz. Therefore, by selecting the constant voltage value Vz of the constant voltage element Dz to an appropriate value, the voltage shown in FIG.
As shown in e), it is possible to reduce the variation in the driving current of the light emitting element LED, and as a result, it is possible to narrow the input sensitivity range of the receiving section, and accordingly cost reduction is achieved.

(Effects of the Invention) According to the fail-safe drive circuit for an optical data transmission device according to the present invention, even if the transmitting section of one transmission device fails in a system that connects a plurality of data transmission devices, other transmission devices This makes it possible to increase the utilization efficiency of the transmission system, minimize the time delay between the input signal and the output optical signal, and virtually eliminate it, and furthermore, make the output signal waveform a square wave. Since it is possible to do this, it has excellent effects such as facilitating signal processing on the receiving side.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a fail-safe drive circuit of an optical data transmission device according to the present invention, FIGS. 2 and 3 are signal waveform diagrams of various parts of the drive circuit of FIG. 1, and FIG. A circuit diagram showing another embodiment of the drive circuit according to the present invention, FIG. 5 is a signal waveform diagram of each part of the drive circuit of FIG. 4, and FIG. 6 is a configuration diagram of a transmitting section of a conventional optical data transmission device. It is. l...Gate circuit 2...Schmitt circuit 3...Inverter circuit 4...Output circuit LED
...Light emitting element Dz... Constant voltage element Fig. 3

Claims (1)

[Scope of Claims] 1) A gate circuit that inputs an input pulse signal and a clock pulse signal to a transmitter of an optical data transmission device and outputs a signal of the logical product of these two signals, and a gate circuit that outputs a signal of the logical product of these two signals; A Schmitt circuit that shapes and amplifies, an inverter circuit that inverts the output signal of the Schmitt circuit, and a push-pull output circuit that inputs the output signal of the inverter circuit and lights up the light emitting element only when the logical product is 1. A fail-safe drive circuit for an optical data transmission device. 2) The push-pull output circuit is connected between a complementary push-pull transistor output circuit, a capacitor having one end connected to the output terminal of the output circuit, and the other end of the capacitor and a negative power supply of the output circuit. Claim 1, further comprising a diode that is conductive when the output circuit outputs a push signal, and the light emitting element is connected in parallel to the diode so as to conduct when the output circuit outputs a pull signal.
A fail-safe drive circuit for the optical data transmission device described in 2. 3) The push-pull transistor output circuit includes a constant voltage element that is connected between the negative power source and the transistor conductor that conducts during push output, and regulates the charging voltage of the capacitor to control the drive current of the light emitting element. A fail-safe drive circuit for an optical data transmission device according to claim 2, characterized in that: