JPS6128761A - Ignition device of single-cylinder internal-combustion engine - Google Patents

Abstract

PURPOSE:To suppress a quick change of output torque and prevent over-rotations by igniting at least at every two-pulse signal generation when the engine speed is between the first predetermined speed and the second predetermined speed. CONSTITUTION:A pulser coil generates pulse signals in synchronization with the engine rotation. The number of output signals (1) of an OR circuit 22 is equal to the number of trigger pulses (h) when the engine speed is the first predetermined speed N1 or less, and an ignition plug 2 is ignited at every pulse signal generation. When the engine speed is greater than the first predetermined speed N1 and less than the second predetermined speed N2, the number of output signals (1) of the OR circuit 22 is equal to the number of output signals (j) of a frequency divider 16, and the ignition plug 2 is ignited at least at every two-pulse signal generation. When the engine speed exceeds the second predetermined speed, ignition is stopped. Accordingly, a quick change of output torque is suppressed, and over-rotations can be prevented smoothly.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a single cylinder internal combustion engine ignition system, and more particularly to a single cylinder internal combustion engine ignition system having an overspeed prevention function.

As an internal combustion engine ignition device having an overspeed prevention function, an ignition device of a type that controls the engine speed by stopping ignition when the engine speed exceeds a predetermined speed is already known. However, in a single-cylinder internal combustion engine, the number of ignitions during two rotations of the crankshaft is small, such as once or twice, and when the ignition is stopped to prevent overspeeding, a sudden drop in output occurs, so it is used in vehicles such as motorcycles. There was a problem in that when installed in a vehicle, drivability deteriorated significantly.

Accordingly, an object of the present invention is to provide an ignition device that can suppress sudden fluctuations in output torque of a single-cylinder internal combustion engine while smoothly preventing overspeed. A pulse signal is generated in synchronization with the rotation of the engine, and when the engine rotation speed is the first
Ignition occurs every time a pulse signal is generated when the engine speed is below a predetermined speed, and the pulse signal is generated at least twice when the engine speed is above a first predetermined speed and below a second predetermined speed that is greater than the first predetermined speed. Embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows the arrangement of an ignition device according to the present invention applied to a single-cylinder engine mounted on a motorcycle. In this figure, a spark plug 2 is attached to a cylinder of an engine 1, and the spark plug 2 is connected to an ignition coil 4 via a high tension cord 3. Reference numeral 5 denotes a pulse generator, which has a pulser coil to be described later, and generates a pulse signal according to the rotation of the crankshaft and supplies it to the electric circuit unit 6. ! Ta. The output terminal of the battery 7 is connected to the main switch 8. It is connected to the ignition coil 4 via a kill switch 9.

FIG. 2 shows circuits formed in the electric circuit unit 6.

It shows the path. In this figure, the pulse generator 5
The pulsar coil 11 is disposed at a predetermined rotational angle position near a rotating magnet (not shown) that rotates in synchronization with a rotating body such as a crankshaft that rotates in response to engine operation, and Generates synchronized pulse signals.

A pulse signal obtained from the pulser coil 11 is converted into a rectangular wave pulse by a waveform shaping circuit 12. A trigger circuit 13 and a charging/discharging circuit 14 are connected to the waveform shaping circuit 12 . Trigger circuit 13 generates a trigger pulse in response to the rectangular wave pulse and supplies it to one input terminal of AND circuit 15 and frequency divider circuit 16 . The frequency dividing circuit 16 supplies a predetermined portion of the trigger pulse generation frequency to one input terminal of the AND circuit 17 . On the other hand, the charge/discharge port jli 514 has a capacitor and generates an output voltage corresponding to the engine rotation speed by charging and discharging the capacitor in accordance with the rectangular wave pulse.

Comparators 18 and 19 are connected to the output terminal of the charging and discharging circuit 14. The comparator 18 determines whether the output voltage of the charge/discharge circuit 14 is equal to the first predetermined rotation speed N (for example, 10000 r, p, m
) K5tH5f, 6Fl'iゝ11"avo, =to~
L/ < /l/ (7).

get the output. The comparator 19 outputs a high level only when the output voltage of the charging/discharging circuit 14 is equal to or lower than a predetermined voltage v2 corresponding to a second predetermined rotation speed N2 (for example, 12000 r, pom) which is greater than the first predetermined rotation speed N□. get.

The logical sum of the respective output levels of the waveform shaping circuit 12 and the comparator 18 is taken by the OR circuit 2o and supplied to the other input terminal of the AND circuit 15. Also, the logical sum of the output levels of the waveform shaping circuit 12 and the comparator 19 is taken by the OR circuit 21 and is supplied to the other input terminal of the AND circuit 17.
. Further, the OR circuit 22 takes the logical sum of the output levels of the AND circuits 15 and 17, and outputs the power transistor 23.
supplied at the pace of. Transistor 23 is OR circuit 2
The transistor 23 turns on or off depending on the output level of the ignition coil 4. Current flows intermittently to the primary coil of the ignition coil 4, and a high voltage is generated in the secondary coil, causing the spark plug to turn on or off. It creates a spark in 2.

In the ignition device according to the present invention, the pulse signal (α) obtained from the pulser coil 11 is a signal in which a pair of positive and negative pulses are successively formed as shown in FIG. 3 (α). This pulse signal < a) is generated by the waveform shaping circuit 12 into a rectangular wave pulse ( A). When the engine speed increases with time as shown in FIG. 3, the interval between the occurrences of the rectangular wave pulses (A) becomes shorter. Square wave pulse Cb
) is generated, the capacitor of the charging/discharging circuit 14 is charged, and the predetermined voltage v, (V8〉■,〉■) is applied to the charging/discharging circuit 1.
Thereafter, by discharging the capacitor with a predetermined current, the output voltage CC) gradually decreases. When the square wave pulse Ch) disappears, the output voltage (
The drop in c) is stopped and the output voltage level is maintained until the generation of the first-order rectangular wave pulse. Therefore, the charging/discharging circuit 14
The output waveform is a triangular wave as shown in Figure 3 (CC).

The output voltage (c) during the holding period has a level corresponding to the engine speed. The output level (d) of the comparator 18 is the third
As shown in figure (d), the output voltage (C) of the charging/discharging circuit 14
When the voltage is less than the first predetermined voltage v0, it becomes a high level, and when the first predetermined voltage (2) is higher than the first predetermined voltage, it becomes a low level. Square wave pulse (d
) and the output signal Cd) of the comparator 18 using the OR circuit 20, the output voltage (C) during the holding period of the charging/discharging circuit 14 becomes the first predetermined voltage v, as shown in FIG. □
In the following range, that is, in the range where the engine speed is equal to or less than the first predetermined rotation speed N, the high level state continues, and the output voltage (C) during the holding period is greater than the first predetermined voltage v0, That is, the engine rotation speed is the first predetermined rotation speed N□
In a larger range, it becomes equal to the level change of a rectangular wave pulse. Furthermore, the output level σ of the comparator 19 is as shown in FIG.
Predetermined voltage ■, high level when below, second predetermined voltage ■2
When the amount is large, the level becomes low. The OFL circuit 21 calculates the logical sum of the rectangular wave pulse (d) and the output signal (d) of the comparator 19.
As shown in Figure 3(g), the charging/discharging circuit 1
In the range where the output voltage CC) during the holding period of 4 is below the second predetermined voltage (2), that is, within the range where the engine speed is below the second predetermined speed N2, it becomes equal to the level change of the rectangular wave pulse.

On the other hand, the trigger pulse output from the trigger circuit 13 (
The slope represents the ignition timing, and as shown in Fig. 3 (A), the square wave pulse (A) occurs slightly later than the rectangular wave pulse (A), and as the engine speed rises and exceeds the first predetermined speed N at most, the rectangular wave pulse occurs. Occurs in the absence of (b).

The output signal (B) of the AND circuit 15 which takes the logical product of this trigger pulse (N), OEI, and the output signal of the circuit 20 (B)
As shown in FIG. 3 <i), the trigger pulse C is generated during a period in which the output level of the OR circuit 20 continues to be at a high level, that is, in a range where the engine rotational speed is equal to or lower than the first predetermined rotational speed N0.
In other ranges, the level is low.

Further, the frequency of the trigger pulse Ch) is divided by a frequency dividing circuit 16. Here, if the division ratio of the frequency divider circuit 16 is 17'2, the output signal (j) of the frequency divider circuit 16 is obtained as a signal with every other trigger pulse Ch) as shown in Figure 3 Cj). . AND circuit 17 that takes the logical product of the output signal (j) of the branch port w516 and the output signal (g) of the OR circuit 21
As shown in FIG. 3 (&), the output signal Ck) of the frequency dividing circuit 16 is output during a period in which the output level of the OR circuit 21 continues to be at a high level, that is, in a range where the engine rotational speed is equal to or less than the second predetermined rotational speed N. The output signal 0) is equal to the output signal 0), and the level is low in other ranges. Since the OR circuit 22 takes the logical sum of each output signal <in, (k) of the AND circuits 15 and 17, the output signal (e) of the OR circuit 22 is
As shown in Figure V), the engine rotation speed is the first predetermined rotation speed N.
□ Below, it is equal to the trigger pulse (A), and when it is greater than the first predetermined rotation speed Nl and below the second predetermined rotation speed N2, it is equal to the output signal (j) of the frequency dividing circuit 16, and the second predetermined rotation speed NI
If it is larger than i, it will be in a low level state. Therefore, the transistor 23 turns on and off according to the output signal of the OR circuit 22 and intermittently supplies current to the ignition coil 4, thereby producing a spark in the spark plug 2. In the case of
Normal ignition is performed with multiple ignitions. Further, the engine rotation speed is greater than the first predetermined rotation speed Nl and the second predetermined rotation speed N,
In the following cases, skipped ignition is performed in which ignition occurs once every two rotations of the crankshaft, and ignition is stopped when the engine speed is equal to or higher than a second predetermined speed.

Next, the configuration and operation of the trigger circuit 13 are shown in FIGS. 4 and 5.
This will be explained according to the diagram.

In the circuit shown in FIG. 4, the input terminal INK is supplied with a rectangular wave pulse (8) equal to the above rectangular wave pulse (A) from the waveform shaping circuit 12. This rectangular wave pulse is connected to transistors Q, , Q, turn on and off. When the transistor Q0 is turned on, the transistor Q8 is also turned on, and the capacitor C0 is charged through the resistor R0. When the transistor Q0 is turned off, the capacitor C0 is charged through the resistor R1.
It is discharged via R, . Therefore, a signal waveform as shown in FIG. 5 is supplied to one terminal of the comparator 31. A reference voltage vR□ is supplied to the other terminal of the comparator 31 by a voltage divider consisting of resistors R8, R, .
1 generates a rectangular wave signal (Q) as shown in FIG.
is charged through the resistor R5゜R6 and discharged through the resistor R6 and the transistor Q when the transistor Q2 is turned on. Therefore, the collector voltage of the transistor Q changes as shown in FIG. Therefore, the square wave signal 0 is supplied to one terminal of the comparator 32. The other terminal of the comparator 32 is connected to a resistor L9. A reference voltage vR2 is supplied by the voltage divider R, 8, and the comparator 32 outputs a rectangular wave signal as shown in FIG. Square wave signal (Q
, [F] are respectively supplied to the set terminal S and reset terminal R of the flip-flop 330, and the flip-flop 33 is set and reset at the falling edge of the rectangular wave signal (Q, CD). Therefore, flip-flop 3
At the Q terminal of 3, a rectangular wave signal [F] as shown in Fig. 5 is obtained as a trigger pulse <A) shown in Fig. 3 Ch).

FIG. 6 shows a frequency dividing circuit 16 when dividing the frequency of the output signal of the trigger circuit 13 by 1/2 using a two-cycle engine.
In the circuit shown in this figure, which shows the specific structure of J, a flip-flop 35 and an AND circuit 36 are used. 7C (
In response to the falling edge of the trigger pulse (a) shown in L), the flip-flop 35 is set so that its output terminal Q becomes a high level, and the falling edge of the next trigger pulse (α) becomes si. Accordingly, the flip-flop 35 is reset and the output terminal Q
Is it a low stamen? It becomes cold. By repeating this operation, a rectangular wave signal Cb) with a duty ratio of 50% as shown in FIG. When this is taken by the AND circuit 36, a 1/2 frequency divided output CC) with every other trigger pulse (α) is obtained from the output terminal OUT, as shown in FIG. 7(C). Note that the terminal J of the flip-flop 35
, the CLR is set to a high level ■.

FIG. 8 shows the frequency dividing circuit 16 when dividing the frequency of the output signal of the trigger circuit 13 by 1/4 using a 4-cycle engine.
○The frequency dividing circuit shown in this figure is 2
3 JK flip-flops and 3 AND circuits
It consists of 9. Figure 9 (α) supplied to input terminal IN
Flip-flop 3 is activated in response to the trigger pulse (α) shown in
From the output Q of the flip-flop 70, a square wave pulse is obtained as shown in FIG. Trigger pulse (α) as shown in figure (C)
A square wave pulse (C) is obtained by dividing the generation frequency by 1/4.〇This square wave pulse (C) and the trigger pulse (α)
When the AND circuit 39 calculates the logical product with
), the trigger pulse (α) is set every two pulses.
The pulse-cut output (d) is obtained from the output terminal OUT.

FIG. 10 shows another embodiment of the invention.

In this figure, the output terminal of the charging/discharging circuit 14 is shown in FIG.
A holding circuit 40 that holds the output voltage of the charging/discharging circuit 14 according to the falling edge of the rectangular wave pulse shown in b) is connected, and the output voltage of the holding circuit 40 is supplied to the comparators 18 and 19. Further, the output terminal of the comparator 18 is connected to the other input terminal of the AND circuit 15, and the output terminal of the comparator 19 is connected to the A, N D circuit 1.
is connected to the other input terminal of 7. The rest of the structure of the ignition device according to the invention is the same as that in FIG. 2, except that AND circuits 20 and 21 are not provided. Therefore, comparator 18
The output level becomes a high level when the engine speed is below the first predetermined speed N1, and becomes a low level when the engine speed is higher than the first predetermined speed N1. Further, the output level of the comparator 19 is set to a high level when the engine speed is below the second predetermined speed N2;
When the second predetermined rotation speed is reached, the level becomes low. Therefore,
Similar results are obtained with the ignition system according to the invention shown in FIG.

As described above, according to the single-cylinder internal combustion engine ignition device of the present invention, normal ignition is performed when the engine speed is less than or equal to the first predetermined speed, and when the engine speed is υ greater than the first predetermined speed and the second Since the ignition is skipped when the engine speed is below a predetermined speed, and the ignition is stopped when the engine speed is 9 times higher than the second predetermined speed, overspeed can be prevented without causing a sudden drop in engine output. In addition, it is possible to prevent deterioration of drivability when used in vehicles.

[Brief explanation of drawings]

FIG. 1 is a perspective view showing the arrangement of an ignition device according to the present invention in a motorcycle, FIG. 2 is a block diagram showing an embodiment of the invention, FIG. 3 is a waveform diagram showing the operation of the device shown in FIG. 4
The figure is a circuit diagram showing the specific configuration of the trigger circuit in the device shown in Figure 2, Figure 5 is a waveform diagram showing the operation of the circuit in Figure 4, and Figure 6 is a waveform diagram showing the operation of the circuit in Figure 4.
8 and 8 are circuit diagrams showing the specific configuration of the frequency dividing circuit in the device shown in FIG. 2, FIG. 7 is a waveform diagram showing the operation of the circuit shown in FIG. 6, and FIG. 9 is the circuit shown in FIG. 8. FIG. 3 is a waveform diagram showing the operation of FIG. FIG. 10 is a block diagram showing another embodiment of the present invention. Explanation of symbols of main parts

Claims (1)

[Claims] A pulse signal is generated in synchronization with the rotation of the engine, and when the engine rotation speed is below a first predetermined rotation speed, ignition is performed each time the pulse signal is generated, and when the engine rotation speed is higher than the first predetermined rotation speed and the first The engine is characterized in that the engine is ignited every time the pulse signal is generated at least twice when the engine speed is less than or equal to a second predetermined rotation speed that is greater than the first predetermined rotation speed, and the ignition is stopped when the engine rotation speed is greater than the second predetermined rotation speed. single-cylinder internal combustion engine ignition system.