JPS61280768A - Apd dc high voltage generator circuit - Google Patents

Apd dc high voltage generator circuit

Info

Publication number
JPS61280768A
JPS61280768A JP12141785A JP12141785A JPS61280768A JP S61280768 A JPS61280768 A JP S61280768A JP 12141785 A JP12141785 A JP 12141785A JP 12141785 A JP12141785 A JP 12141785A JP S61280768 A JPS61280768 A JP S61280768A
Authority
JP
Japan
Prior art keywords
voltage
apd
high voltage
pulse signal
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12141785A
Other languages
Japanese (ja)
Inventor
Kiyoshi Kubo
潔 久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP12141785A priority Critical patent/JPS61280768A/en
Publication of JPS61280768A publication Critical patent/JPS61280768A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a DC high voltage of an arbitrary amplitude in a small-sized inexpensive electronic circuit by multiplying to rectify two pulse signals of different phases by a multiplying rectifier having a plurality of diode groups and capacitor groups. CONSTITUTION:A low DC voltage is converted by a pulse signal generator 5 like an astable multivibrator (AMV) into two pulse signals 7, 8 of different phases of 180 deg.. The signals 7, 8 are input to a multiplying rectifier 6 having a plurality of diode groups and capacitor groups, converted to a high DC voltage, and supplied to an avalanche photodiode (APD). Thus, even if a stepup transformer to become a noise generation source is not used, an arbitrary high DC voltage can be produced by a small-sized electronic circuit.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、光通信に用いる光受信部のAPD(アバラン
シェホトダイオード)に印加する直流高電圧の発生回路
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a DC high voltage generation circuit applied to an APD (avalanche photodiode) of an optical receiver used in optical communication.

(従来の技術) APDを用いた光受信装置の光受信部には、前記光受信
部の回路動作に必要な直流の低電圧電源とは別に、AP
D動作に必要な直流の高電圧を前記APDに印加するた
め、低電圧と高電圧の2種類の直流電源が必要である。
(Prior Art) The optical receiver of an optical receiver using an APD is equipped with an AP
In order to apply the high DC voltage necessary for the D operation to the APD, two types of DC power supplies, low voltage and high voltage, are required.

前記光受信部の直流高電圧発生回路の電源に直流低電圧
を用いた従来の一例を、第4図に示す従来の光受信部の
ブロック図を参照して説明する。
An example of a conventional example in which a DC low voltage is used as a power source for a DC high voltage generating circuit of the optical receiver will be described with reference to a block diagram of a conventional optical receiver shown in FIG.

第4図において、光受信部に供給されている、例えば5
V、9V、12Vなどの、直流低電圧は、D C−D 
Cコンバータ1により昇圧されてAPD2の動作に必要
な直流高電圧となり、APD2のカソード側に印加され
る。光入力信号は、前記APD2において、前記直流高
電圧の動作で、光増幅されるとともに電流信号に変換さ
れ、負荷抵抗器3により光信号の強弱に応じた電圧信号
となって、直装低電圧により動作するプリアンプ4によ
り増幅されて出力される。
In FIG. 4, for example, 5
DC low voltage such as V, 9V, 12V, etc. is D C-D
It is boosted by the C converter 1 to become a high DC voltage necessary for the operation of the APD 2, and is applied to the cathode side of the APD 2. In the APD 2, the optical input signal is optically amplified and converted into a current signal by the DC high voltage operation, and the load resistor 3 converts the optical input signal into a voltage signal according to the strength of the optical signal. The signal is amplified by the preamplifier 4 which operates as follows.

(発明が解決しようとする問題点) APDを用いた光受信部の直流電源としては、低電圧と
高電圧の2種類の直流電源を別々に備えるか、または前
記従来例のようにD C−D Cコンバータにより直流
低電圧を変換して得た直流高電圧がある。
(Problems to be Solved by the Invention) As a DC power supply for an optical receiver using an APD, two types of DC power supplies, low voltage and high voltage, are provided separately, or a DC- There is a DC high voltage obtained by converting a DC low voltage using a DC converter.

しかし、前記D C−D Cコンバータは、発振回路と
、前記発振回路による発振電圧を増幅する昇圧トランス
と、整流回路とで構成されており、構造的に大きくて高
価であるとともに、前記昇圧トランスの交流高圧ノイズ
またはスイッチングノイズなどが、光受信部のプリアン
プに影響して、妨害ノイズになることが非常に多いとい
う問題点があった。
However, the DC-DC converter is composed of an oscillation circuit, a step-up transformer that amplifies the oscillation voltage from the oscillation circuit, and a rectifier circuit, and is structurally large and expensive, and the step-up transformer is There is a problem in that AC high-voltage noise or switching noise very often affects the preamplifier of the optical receiver and becomes interfering noise.

(問題点を解決するための手段) 本発明は、前記問題点を解決するため、昇圧用トランス
を用いることなく、光受信部の低電圧直流電源をAMV
 (アステーブルマルチバイブレータ)によりパルス信
号に変換し、前記パルス信号をダイオードおよびコンデ
ンサにより構成された逓倍整流回路にて、任意のAPD
用の直流高電圧に変換する方法を提供するものである。
(Means for Solving the Problems) In order to solve the above problems, the present invention provides an AMV-based low-voltage DC power supply for the optical receiver without using a step-up transformer.
(astable multivibrator) converts the pulse signal into a pulse signal, and then converts the pulse signal into a multiplier rectifier circuit composed of a diode and a capacitor, and converts it into an arbitrary APD.
The present invention provides a method for converting to DC high voltage for use.

(作 用) 本発明によれば、交流高電圧による妨害ノイズの発生源
となる昇圧トランスを使用せずに、前記構成のAPD用
直流高電圧発生回路を光受信部に内蔵することにより、
小形構成の電子回路で安価に、任意の直流高電圧を作り
出すことができる。
(Function) According to the present invention, the APD high voltage generation circuit having the above configuration is built into the optical receiver, without using a step-up transformer which is a source of interference noise due to AC high voltage.
Any high DC voltage can be generated at low cost using a small electronic circuit.

(実施例) 本発明の実施例を、第1図ないし第3図を参照して説明
する。
(Example) An example of the present invention will be described with reference to FIGS. 1 to 3.

第1図は、本発明の第1の実施例を示す光受信部のブロ
ック図であり、光受信部動作用の直流低電圧は、TTL
(トランジスタ・トランジスタ・ロジック)のICによ
り簡単に構成されたAMV5により、180°位相の異
なった2つのパルス信号に変換された後、複数のダイオ
ードと複数のコンデンサにより構成された逓倍整流回路
6に入力されて直流高電圧に変換される。光入力信号は
、APD2において、前記APD2のカソード側に印加
された前記直流高電圧により、光増幅されるとともに電
流信号に変換されて、負荷抵抗器3により光信号の強弱
に応じた電圧信号となり、前記直流低電圧により動作さ
せられるプリアンプ4により増幅出力される。
FIG. 1 is a block diagram of an optical receiver showing a first embodiment of the present invention, and the DC low voltage for operating the optical receiver is TTL
After being converted into two pulse signals with a 180° phase difference by the AMV5, which is simply configured with a (transistor-transistor-logic) IC, the signals are sent to a multiplier rectifier circuit 6 that is configured with multiple diodes and multiple capacitors. It is input and converted to DC high voltage. The optical input signal is optically amplified and converted into a current signal in the APD 2 by the DC high voltage applied to the cathode side of the APD 2, and then converted into a voltage signal according to the strength of the optical signal by the load resistor 3. , is amplified and outputted by the preamplifier 4 operated by the low DC voltage.

第2図は、本発明の第1の実施例における、前記AMV
5と前記逓倍整流回路6の具体的回路図を示す。第2図
において、AMV5は、入力の直流低電圧を180°位
相の異なった2つのパルス信号7,8に変換して、逓倍
整流回路6に供給するなお、前記2つのパルス信号7,
8の振幅の大きさは、前記AMV5のTTLを駆動させ
ている前記直流低電圧の振幅の大きさまで得ることがで
きるので、例えば直流5vでTTLが動作すると5■、
−2の振幅のパルス信号が得られる。次に、逓倍整流回
路6は、第2図に示すように、複数のダイオードと複数
のコンデンサにより構成されており、前記逓倍整流回路
6に前記2つのパルス信号7.8が入力されると、ダイ
オード9が片方のパルス信号7の正の期間のみ導通し、
同時に他方のパルス信号8がコンデンサ10を介して負
の期間をクランプするので、前記ダイオード9のカソー
ド側では片方の前記パルス信号7の振幅に他方の前記パ
ルス信号8の振幅がコンデンサ1oを介して加算され2
倍の振幅のパルス信号が得られる。さらに、ダイオード
11は1片方のパルス信号8の正の期間のみ導通し、同
時に他方のパルス信号7がコンデンサ12を介して負の
期間をクランプするので、前記ダイオード11のカソー
ド側では、前記加算されて2倍となったパルス信号の振
幅に、更に前記パルス信号7の振幅が加算されて3倍の
振幅のパルス信号が得られる。前記のように、必要の電
圧を得るまで順次ダイオードおよびコンデンサを交互に
接続し、終端のダイオード13のカソード側に接続され
るコンデンサ14の他方をアースすれば、前記終端のダ
イオード13のカソード側がら任意の直流高電圧を得る
ことができる。また、最初のダイオード9のみは、カソ
ード側を直流の低電圧側に接続してもよい0水力式によ
れば、一般のTTLを用いたAMV5を動作させ、逓倍
整流回路6に5例えば6個のダイオードと6個のコンデ
ンサを使用することにより6倍の直流電圧が得られ。
FIG. 2 shows the AMV in the first embodiment of the present invention.
5 and a specific circuit diagram of the multiplier rectifier circuit 6 are shown. In FIG. 2, the AMV 5 converts the input DC low voltage into two pulse signals 7 and 8 with a 180° phase difference and supplies them to the multiplier rectifier circuit 6.
The amplitude of 8 can be obtained up to the amplitude of the DC low voltage that drives the TTL of the AMV5, so for example, if the TTL operates with 5V DC, 5■,
A pulse signal with an amplitude of −2 is obtained. Next, as shown in FIG. 2, the multiplier rectifier circuit 6 is composed of a plurality of diodes and a plurality of capacitors, and when the two pulse signals 7.8 are input to the multiplier rectifier circuit 6, Diode 9 conducts only during the positive period of one pulse signal 7,
At the same time, the other pulse signal 8 clamps the negative period via the capacitor 10, so on the cathode side of the diode 9, the amplitude of one of the pulse signals 7 and the amplitude of the other pulse signal 8 are connected via the capacitor 1o. added 2
A pulse signal with twice the amplitude is obtained. Furthermore, the diode 11 is conductive only during the positive period of one pulse signal 8, and at the same time clamps the negative period of the other pulse signal 7 via the capacitor 12. The amplitude of the pulse signal 7 is further added to the amplitude of the pulse signal, which has been doubled, to obtain a pulse signal with a tripled amplitude. As described above, if the diodes and capacitors are connected alternately until the required voltage is obtained, and the other of the capacitors 14 connected to the cathode side of the terminating diode 13 is grounded, the cathode side of the terminating diode 13 is connected to the ground. Any DC high voltage can be obtained. In addition, only the first diode 9 may have its cathode side connected to the low voltage side of DC. According to the hydraulic type, an AMV 5 using a general TTL is operated, and the multiplier rectifier circuit 6 has 5, for example, 6 diodes. By using 1 diode and 6 capacitors, 6 times the DC voltage can be obtained.

例えば5vの直流低圧で30Vの直流高電圧が得られる
。ただし、実際にはダイオードの順方向降下電圧により
、逓倍された電圧値は、計算電圧値より多少下がる。
For example, a DC high voltage of 30V can be obtained with a DC low voltage of 5V. However, in reality, the multiplied voltage value is somewhat lower than the calculated voltage value due to the forward voltage drop of the diode.

前記第1の実施例の方法は、数Vの直流低電圧から数十
Vの直流高電圧を得るためには適切であるが、数百Vの
直流高電圧を得るためには部品点数が膨大になるので、
経済的に効率が悪い。本発明の第2の実施例として、数
Vの直流低電圧から効率よく数百Vの直流高電圧が得ら
れる直流高電圧発生回路を、第3図に示す光受信部の直
流高電圧発生回路のブロック図を参照して説明する。
The method of the first embodiment is suitable for obtaining a high DC voltage of several tens of V from a low DC voltage of several V, but requires a huge number of parts in order to obtain a high DC voltage of several hundred V. So,
Economically inefficient. As a second embodiment of the present invention, a DC high voltage generation circuit for efficiently obtaining a DC high voltage of several hundred V from a DC low voltage of several V is constructed as shown in FIG. This will be explained with reference to the block diagram.

第3図において、前記本発明の第1の実施例と同じ方法
で、逓倍整流回路6により逓倍整流された直流電圧出力
を、抵抗器15.16およびトランジX 夕17,18
を通した前記AMV5出カッ180″位相差の異なった
2つのパルス信号7,8により、抵抗器19,20を介
してスイッチング動作を行ない。
In FIG. 3, in the same manner as in the first embodiment of the present invention, the DC voltage output multiplied and rectified by the multiplier rectification circuit 6 is connected to resistors 15, 16 and transistors 17 and 18.
A switching operation is performed via resistors 19 and 20 by two pulse signals 7 and 8 having different phase differences through the AMV5 output 180''.

トランジスタ17.18のコレクタ側から180°位相
の異なった2つの高振幅パルス信号21.22が得られ
る。前記180°位相の異なった2つの高振幅パルス信
号21.22を、前記逓倍整流回路6と同様の構成の第
2の逓倍整流回路6′に入力すれば、前記逓倍整流回路
6と同様の動作により、更に高電圧の直流高電圧を得る
ことができる。例えば、第1の逓倍整流回路6および第
2の逓倍整流回路6′を、それぞれ6個のトランジスタ
および6個のコンデンサで構成し、AMV5の直流低電
圧を5vとすれば、第1の逓倍整流回路6により30V
、第2の逓倍整流回路6′により180vの直流高電圧
が得られる。なお、一般のAPDの印加電圧は。
Two high amplitude pulse signals 21, 22 having a phase difference of 180° are obtained from the collector side of the transistor 17, 18. If the two high-amplitude pulse signals 21 and 22 having a 180° phase difference are input to a second multiplier rectifier circuit 6' having the same configuration as the multiplier rectifier circuit 6, the same operation as that of the multiplier rectifier circuit 6 can be achieved. Accordingly, even higher DC voltage can be obtained. For example, if the first multiplier rectifier circuit 6 and the second multiplier rectifier circuit 6' are each composed of six transistors and six capacitors, and the DC low voltage of AMV5 is 5V, then the first multiplier rectifier circuit 6' 30V by circuit 6
, a DC high voltage of 180V is obtained by the second multiplier rectifier circuit 6'. In addition, the applied voltage of a general APD is as follows.

Ge−APD(ゲルマニウムAPD)では20〜40v
の直流電圧が、 5i−A P D (シリコンAPD
)では100〜250 Vの直流高電圧が必要である。
20-40v for Ge-APD (germanium APD)
The DC voltage of 5i-APD (silicon APD
) requires a high DC voltage of 100 to 250 V.

また、これらAPDの電流容量は、数nA〜数μAと非
常に小さい。
Further, the current capacity of these APDs is very small, ranging from several nA to several μA.

(発明の効果) 前記のように、APDの電流容量が非常に少なく直流電
源に高電圧を必要とする場合、本発明は極めて簡単な回
路構成で任意の電圧を作り出すことができ、しかも、パ
ルス信号の振幅も大きくすることがないので、交流高電
圧によるノイズの発生を小さくすることができて、実用
的に極めて有用である。
(Effects of the Invention) As described above, when the current capacity of the APD is very small and a high voltage is required from the DC power supply, the present invention can generate any voltage with an extremely simple circuit configuration, and moreover, Since the amplitude of the signal does not increase, noise generation due to high AC voltage can be reduced, which is extremely useful in practice.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1の実施例における光受信部のブロ
ック図、第2図は本発明の直流高電圧発生回路の一実施
例の具体的回路図、第3図は更に高電圧を得るための本
発明の第2の実施例における光受信部のブロック図、第
4図は従来の直流高電圧を得るための光受信部のブロッ
ク図を示す61 ・・・ D C−D Cコンバータ、
 2 ・・・ API)(アバランシェホトダイオード
)、 3 ・・・負荷抵抗器、 4 ・・・プリアンプ
、 5 ・・・AMV(アステーブルマルチバイブレー
タ)、 6 ・・・逓倍整流回路、 6′ ・・・第2
の逓倍整流回路、7.8 ・・・パルス信号、 9 、
11.13・・・・・・ダイオード、to、12.14
・・・コンデンサ、15,16,19゜20・・・抵抗
器、17.18・・・ トランジスタ、21゜22・・
・高振幅パルス信号。 特許出願人 松下電器産業株式会社 第1図 第2図 1−−−−−−−+−−−+++++−+−++j−・
−0−6第3図 第4図
FIG. 1 is a block diagram of an optical receiver in a first embodiment of the present invention, FIG. 2 is a specific circuit diagram of an embodiment of a DC high voltage generating circuit of the present invention, and FIG. 3 is a block diagram of an optical receiver according to a first embodiment of the present invention. A block diagram of an optical receiver in the second embodiment of the present invention for obtaining a conventional DC high voltage is shown in FIG. 4. 61...D C-DC converter ,
2...API) (avalanche photodiode), 3...load resistor, 4...preamplifier, 5...AMV (astable multivibrator), 6...multiplier rectifier circuit, 6'... Second
Multiplying rectifier circuit, 7.8...Pulse signal, 9,
11.13...Diode, to, 12.14
...Capacitor, 15,16,19゜20...Resistor, 17.18... Transistor, 21゜22...
・High amplitude pulse signal. Patent applicant: Matsushita Electric Industrial Co., Ltd. Figure 1 Figure 2
-0-6Figure 3Figure 4

Claims (2)

【特許請求の範囲】[Claims] (1)パルス信号発生回路から異なった位相で取り出さ
れた2つのパルス信号を、複数個のダイオード群および
複数個のコンデンサ群からなる逓倍整流回路により、順
次逓倍整流して直流の高電圧を得ることを特徴とするA
PD用の直流高電圧発生回路。
(1) Two pulse signals taken out with different phases from the pulse signal generation circuit are sequentially multiplied and rectified by a multiplication rectification circuit consisting of multiple diode groups and multiple capacitor groups to obtain a high DC voltage. A characterized by
DC high voltage generation circuit for PD.
(2)パルス信号発生回路から異なった位相で取り出さ
れた2つのパルス信号を、複数個のダイオード群および
複数個のコンデンサ群からなる逓倍整流回路により、順
次逓倍整流して得られた直流の高電圧を、更に前記2つ
のパルス信号によりスイッチングして第2のパルス信号
を作り、前記第2のパルス信号を第2の逓倍整流回路で
、順次逓倍整流して更に電圧の高い直流高電圧を得るこ
とを特徴とする特許請求の範囲第(1)項記載のAPD
用の直流高電圧発生回路。
(2) Two pulse signals taken out with different phases from the pulse signal generation circuit are sequentially multiplied and rectified by a multiplier rectification circuit consisting of a plurality of diode groups and a plurality of capacitor groups. The voltage is further switched by the two pulse signals to create a second pulse signal, and the second pulse signal is sequentially multiplied and rectified by a second multiplier rectifier circuit to obtain an even higher DC high voltage. An APD according to claim (1) characterized in that
DC high voltage generation circuit for use.
JP12141785A 1985-06-06 1985-06-06 Apd dc high voltage generator circuit Pending JPS61280768A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12141785A JPS61280768A (en) 1985-06-06 1985-06-06 Apd dc high voltage generator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12141785A JPS61280768A (en) 1985-06-06 1985-06-06 Apd dc high voltage generator circuit

Publications (1)

Publication Number Publication Date
JPS61280768A true JPS61280768A (en) 1986-12-11

Family

ID=14810641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12141785A Pending JPS61280768A (en) 1985-06-06 1985-06-06 Apd dc high voltage generator circuit

Country Status (1)

Country Link
JP (1) JPS61280768A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04355666A (en) * 1991-05-30 1992-12-09 Oki Electric Ind Co Ltd High voltage generator

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5760864A (en) * 1980-09-29 1982-04-13 Nec Corp Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5760864A (en) * 1980-09-29 1982-04-13 Nec Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04355666A (en) * 1991-05-30 1992-12-09 Oki Electric Ind Co Ltd High voltage generator

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