JPS61265608A - Current limiting circuit - Google Patents

Current limiting circuit

Info

Publication number
JPS61265608A
JPS61265608A JP10790485A JP10790485A JPS61265608A JP S61265608 A JPS61265608 A JP S61265608A JP 10790485 A JP10790485 A JP 10790485A JP 10790485 A JP10790485 A JP 10790485A JP S61265608 A JPS61265608 A JP S61265608A
Authority
JP
Japan
Prior art keywords
circuit
resistor
current
emitter
main transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10790485A
Other languages
Japanese (ja)
Inventor
Kenichi Arimura
有村 健一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP10790485A priority Critical patent/JPS61265608A/en
Publication of JPS61265608A publication Critical patent/JPS61265608A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To reduce the power loss, and also to improve the temperature characteristic by forming a circuit by a main transistor, a detecting resistor, a comparing circuit, a reference voltage generating resistor, etc., of a Darlington connection. CONSTITUTION:One end of a detecting resistor RS is connected to an emitter of a main transistor TRPTR, and between the other end and a base of the TRPTR, a constant-current output circuit 1 and a comparing circuit 2 are connected in parallel, respectively. Also, an output terminal of the output circuit 1 is connected to the other end of the resistor RS through a reference voltage generating resistor R3. In this state, a reference voltage V0 generated in the resistor R3 and a detected voltage VS generated in the resistor RS are compared by the comparing circuit 2, and an emitter current is limited so as to be constant by controlling a base current of the TRPTR. In this way, a power loss in the detecting resistor RS can be reduced, and also the temperature characteristic can be improved.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 この発明は出力トランジスタの出力電流を一定値に制限
する電流制限回路の構成に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field to Which the Invention Pertains] The present invention relates to the configuration of a current limiting circuit that limits the output current of an output transistor to a constant value.

〔従来技術とその問題点〕[Prior art and its problems]

従来の電流制限回路としてはg5図に示すものが知られ
ている。すなわち主トランジスタPT rのエミッタに
検出抵抗体FL、を接続し、この検出抵抗体Psの他端
と主トランジスタP T rのベースとの間に複数個の
ダイオードD1 e D2 * 03を直列接続し、主
トランジスタのベース電圧を一定化することにより主ト
ランジスタP?rのエミッタ電流を一定値に制限するよ
うに構成されていた。図中B。
As a conventional current limiting circuit, the one shown in Fig. g5 is known. That is, a detection resistor FL is connected to the emitter of the main transistor PTr, and a plurality of diodes D1eD2*03 are connected in series between the other end of the detection resistor Ps and the base of the main transistor PTr. , by keeping the base voltage of the main transistor constant, the main transistor P? It was configured to limit the emitter current of r to a constant value. B in the figure.

C,Eはこの回路の端子を示すもので、端子Bはベース
負荷および電源の正廟子に接続され、端子Cは負荷およ
び電源の正端子に接続され、端子Eは電源の負端子に接
続される。
C and E indicate the terminals of this circuit, terminal B is connected to the base load and the positive terminal of the power supply, terminal C is connected to the load and the positive terminal of the power supply, and terminal E is connected to the negative terminal of the power supply. be done.

第5図に示す回路では、検出抵抗体島に発生する電圧は
 V、 = 0.6 Vであるのでここでの電力損失は
大きい。−男顔方向電圧■Fを電圧発生源としているた
め、トランジスタをシリコンで形成した場合温度特性が
約2絨々であるから主トランジスタPT rの電流制限
としての温度特性は2fnV0.6■と太きt【値であ
る。このように従来の回路は温度特性が悪いこと、電力
損失が多いこと等の難点をもっていた。
In the circuit shown in FIG. 5, the voltage generated across the detection resistor island is V, = 0.6 V, so the power loss here is large. -Male face direction voltage■ Since F is used as the voltage generation source, if the transistor is made of silicon, the temperature characteristic will be approximately 2K, so the temperature characteristic as a current limit of the main transistor PTr will be 2fnV0.6■. t [value. As described above, conventional circuits have disadvantages such as poor temperature characteristics and high power loss.

〔発明の目的〕[Purpose of the invention]

本発明は上述の事情に鑑み、検出抵抗体における電力損
失が少なく、かつ制限電流が温度に左右されず安定した
出力′電流が得られる電流制限回路を提供することを目
的とする。
SUMMARY OF THE INVENTION In view of the above circumstances, it is an object of the present invention to provide a current limiting circuit in which the power loss in the detection resistor is small and the limiting current is not affected by temperature and a stable output current can be obtained.

〔発明の豐点〕[The highlight of invention]

この発明では、上記目的達成のためダーリントン接続さ
れた主トランジスタと該主トランジスタのエミッタ電流
を検出する検出抵抗体とを直列接続した回路に、比較回
路および定電流出力回路をそれぞれ並列接続するととも
に前記比較回路のプラス側入力端子と前記検出抵抗体の
主トランジスタのエミッタに接続されない側の端子との
間に基準電圧発生抵抗体を接続して電流制限回路を構成
し、前記基準電圧抵抗体を流れる電流により発生する基
準電圧と、前記主トランジスタのエミッタ電流が前記検
出抵抗体を流れることにより発生する検出電圧とを比較
回路で比較し、該比較回路の出力で前記主トランジスタ
のベース電流を制御することによりエミッタ電流を制限
する。
In order to achieve the above object, in this invention, a comparison circuit and a constant current output circuit are respectively connected in parallel to a circuit in which a Darlington-connected main transistor and a detection resistor for detecting the emitter current of the main transistor are connected in series. A reference voltage generating resistor is connected between the positive input terminal of the comparator circuit and the terminal of the detection resistor on the side not connected to the emitter of the main transistor to configure a current limiting circuit, and the current flows through the reference voltage resistor. A comparison circuit compares a reference voltage generated by the current with a detection voltage generated when the emitter current of the main transistor flows through the detection resistor, and the base current of the main transistor is controlled by the output of the comparison circuit. This limits the emitter current.

〔発明の実施例〕[Embodiments of the invention]

第1図はこの発明の一実施例である電流制限回路の電気
回路を示し、従来回路(第5図)と同じ構成要素には同
一の符号を付し説明を省略する。
FIG. 1 shows an electric circuit of a current limiting circuit according to an embodiment of the present invention, and the same components as in the conventional circuit (FIG. 5) are given the same reference numerals and their explanations will be omitted.

この回路は、主トランジスタptaのエミッタ側に検出
抵抗体RBの一端を接続し、他端と主トランジスタp’
rnのベースとの間に定1jL流出力回路1と比較回路
2とをそれぞれ並列接続し、さらに定電流出力回路の出
力端を基準電圧発生抵抗体R3を介して検出抵抗体R8
の他方端に接続することにより基準電圧発生抵抗体R3
に発生する基!S電圧Voと検出抵抗体R,に発生する
検出電圧■8とを比較回路2で比較し、この比較回路2
の出力で主トランジスタのベース電流を制御することに
よりエミッタ電流を一定に保つように構成している。
In this circuit, one end of the detection resistor RB is connected to the emitter side of the main transistor pta, and the other end and the main transistor p'
A constant 1jL output circuit 1 and a comparison circuit 2 are connected in parallel between the base of rn and the output terminal of the constant current output circuit is connected to a detection resistor R8 via a reference voltage generating resistor R3.
By connecting to the other end of the reference voltage generating resistor R3
The group that occurs in! The comparison circuit 2 compares the S voltage Vo and the detection voltage 8 generated in the detection resistor R, and the comparison circuit 2
The emitter current is kept constant by controlling the base current of the main transistor using the output of the main transistor.

このように構成すると検出抵抗体R8に発生する′電圧
は低(することが原理的に可能であるので、検出抵抗体
R,における電力損失を減少させることができる。
With this configuration, the voltage generated across the detection resistor R8 is low (in principle), so that the power loss in the detection resistor R can be reduced.

さらに主トランジスタの電流制限の温度特性についても
以下に述べることから改善される。すなわち基準電圧発
生抵抗R3に発生する基準電圧v。
Furthermore, the temperature characteristics of the current limit of the main transistor are also improved as described below. That is, the reference voltage v generated at the reference voltage generating resistor R3.

および1℃当たりのvoの変動△voは次式で求められ
る。
And the variation Δvo of vo per 1°C is determined by the following formula.

ここでT:絶対温度 ■r:主トランジスタのベース・エミッタ間電圧からj
glのトランジスタQ1のベース・エミッタ間電圧を差
引いた値、す なわちダイオード接合1ケ分に相当す る電圧である。約2fF!■々 q:電子の電荷量 に:ボルツマン定数 I(t:第1のトランジスタのエミッタ電流Icz:i
E2のトランジスタのエミッタ電流従来技術による第5
図の回路ではvrの温度変動がそのまま制限電流の変動
となっていたのに対し、V、、7)温度変動が、。ge
 (VP+V・)R・どなるため極めC2 て少なくなり、温度変動が改善される。第4図に示す温
度特性図を説明すると、横軸に温度℃、縦軸に制限電流
の変動率%をとると、aは従来技術による回路における
温度特性、bは本発明の一実施例による温度特性を表わ
す。
Here, T: Absolute temperature ■r: From the base-emitter voltage of the main transistor to j
This is the value obtained by subtracting the voltage between the base and emitter of the transistor Q1 of the gl, that is, the voltage corresponding to one diode junction. Approximately 2 fF! ■q: Electron charge amount: Boltzmann constant I (t: Emitter current of the first transistor Icz: i
E2 transistor emitter current 5th according to prior art
In the circuit shown in the figure, temperature fluctuations in vr directly result in fluctuations in the limiting current, but V, 7) Temperature fluctuations. ge
(VP+V・)R・C2 is extremely reduced due to the noise, and temperature fluctuations are improved. To explain the temperature characteristic diagram shown in FIG. 4, the horizontal axis is the temperature in degrees Celsius, and the vertical axis is the fluctuation rate of limiting current (%), where a is the temperature characteristic of the circuit according to the conventional technology, and b is the temperature characteristic according to an embodiment of the present invention. Represents temperature characteristics.

木兄明番こよる温度特性は前述(2)式で求められるが
、ここで第2図の定電流出力回路1においては第1のダ
イオードQtのエミッタ電流rat)第2のダイオード
Q2のエミッタ電流IC2であるから、前述(1)式に
おいてVoの絶対値を200〜5QQmVに設定すると
△voは微少ながら正の値を示す。すなわち第4図にお
ける本発明による温度特性すは、従来回路の温度特性a
に比べれば大幅な改善されているがなお若干温度変動が
ある。これをさらに改善し理想とする破測Cで示すごと
き温度特性を得るため、その補正を抵抗体を用いてより
高性能化したのが第2図に示す本発明の他の実施例であ
る電流制限回路である。すなわち第1図に示す電流制限
回路における電流出力回路lの第1のトランジスタQl
のコレクタから補正抵抗体R[を通じて出力トランジス
タPTrのエミッタと検出抵抗体Rsとの接続点に接続
したものである。このように補正抵抗体R[を付加する
と、前記(2)式は次式のようになる すなわちvFの温度特性により負の補正が行なわれる。
The temperature characteristics determined by Akira Kinei are determined by the above-mentioned equation (2), but here, in the constant current output circuit 1 shown in Fig. 2, the emitter current of the first diode Qt (rat) and the emitter current of the second diode Q2 Since it is IC2, when the absolute value of Vo is set to 200 to 5QQmV in the above-mentioned equation (1), Δvo shows a positive value, albeit slightly. That is, the temperature characteristic according to the present invention in FIG. 4 is the temperature characteristic a of the conventional circuit.
Although this is a significant improvement compared to , there is still some temperature fluctuation. In order to further improve this and obtain the ideal temperature characteristic shown in the failure measurement C, the correction was made more efficient by using a resistor as shown in FIG. 2, which is another embodiment of the present invention. It is a limiting circuit. That is, the first transistor Ql of the current output circuit l in the current limiting circuit shown in FIG.
The collector of the output transistor PTr is connected through the correction resistor R to the connection point between the emitter of the output transistor PTr and the detection resistor Rs. When the correction resistor R[ is added in this way, the above equation (2) becomes the following equation, that is, a negative correction is performed depending on the temperature characteristic of vF.

第3図は本発明のさらに別なる実施例である電流制限回
路の電気回路図で、補正抵抗体R4は比較回路2内に組
込んだものである。すなわちトランジスタQ4 、 Q
iおよび固定抵抗Rcで差動的な比較回路を構成し、そ
の出力をトランジスタQy、Qsで構成される電流ミラ
ー回路を通して制御出力トランジスタQe 、 QIG
を駆動するようにし、トランジスタQ9の温度特性と補
正抵抗体R,fにより比較したときのトランジスタQ4
 、 Qsの電流比に温度特性をもたせるものである。
FIG. 3 is an electrical circuit diagram of a current limiting circuit which is still another embodiment of the present invention, in which the correction resistor R4 is incorporated into the comparator circuit 2. In FIG. That is, transistors Q4, Q
i and a fixed resistor Rc, and its output is passed through a current mirror circuit composed of transistors Qy and Qs to control output transistors Qe and QIG.
Transistor Q4 when compared by the temperature characteristics of transistor Q9 and correction resistors R and f
, Qs gives temperature characteristics to the current ratio.

この温度特性は次式%式% (4)式の第2項のRf、 Rc  を任意に設定する
ことにより■2の温度特性により第2項を負の特性にす
ることができる。これにより、本回路の電流制限の温度
特性に負の補正を行なえる。
This temperature characteristic can be expressed by the following formula: % By arbitrarily setting Rf and Rc in the second term of the equation (4), the second term can be made negative according to the temperature characteristic (2). This allows negative correction to be made to the temperature characteristics of the current limit of this circuit.

〔発明の効果〕〔Effect of the invention〕

この発明では主トランジスタのエミッタと検出抵抗体と
を直列接続した回路に比較回路および定電流出力回路を
それぞれ並列接続し、かつ比較回路のプラス側出力端子
と検出抵抗体の自由端子との間に基準電圧発生抵抗体を
設けたので、従来方式に比して検出電圧を100mV程
度から実施することが可能で検出抵抗体での消費電力を
極めて少なくできる。また従来技術では主トランジスタ
のベースエミッタ間ドロ、プVFの温度変動が即制限電
流の変動となっていたのが、本回路構成によりvrの温
度変動がJoge VF〜となるため極めて小さい変動
となり温度特性は改善された。また補正抵抗体を設ける
ことによりさらに温度特性の補正が行なわれる。
In this invention, a comparator circuit and a constant current output circuit are each connected in parallel to a circuit in which the emitter of the main transistor and a detection resistor are connected in series, and between the positive output terminal of the comparator circuit and the free terminal of the detection resistor. Since the reference voltage generating resistor is provided, the detection voltage can be set from about 100 mV compared to the conventional method, and the power consumption in the detection resistor can be extremely reduced. In addition, in the conventional technology, the temperature fluctuation between the base and emitter of the main transistor and the temperature fluctuation in VF caused an immediate fluctuation in the limiting current, but with this circuit configuration, the temperature fluctuation in vr becomes Joge VF ~, so it becomes an extremely small fluctuation and the temperature Characteristics have been improved. Further, by providing a correction resistor, the temperature characteristics can be further corrected.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例である電流制限回路の電気
回路図、第2図はこの発明の他の実施例である電流制限
回路の電気回路図、第3図はこの発明のさらに別の実施
例である電流制限回路の電気回路図、第4図は電流制限
回路の温度特性図、第5図は従来技術による電流制限回
路の電気回路図である。 1:定電流出力回路、2:比較回路、R3:基準電圧発
生抵抗体、Rf:補正抵抗体、R8:検出抵抗体、PT
、 :主トランジスタ。
FIG. 1 is an electrical circuit diagram of a current limiting circuit which is an embodiment of the present invention, FIG. 2 is an electrical circuit diagram of a current limiting circuit which is another embodiment of the invention, and FIG. FIG. 4 is a temperature characteristic diagram of the current limiting circuit, and FIG. 5 is an electrical circuit diagram of the current limiting circuit according to the prior art. 1: Constant current output circuit, 2: Comparison circuit, R3: Reference voltage generation resistor, Rf: Correction resistor, R8: Detection resistor, PT
, : Main transistor.

Claims (1)

【特許請求の範囲】 1)ダーリントン接続された主トランジスタと該主トラ
ンジスタのエミッタ電流を検出する検出抵抗体とを直列
接続した回路に、比較回路および定電流出力回路をそれ
ぞれ並列接続するとともに、前記比較回路のプラス側入
力端子と前記検出抵抗体の主トランジスタのエミッタに
接続されない側の端子との間に基準電圧発生抵抗体を接
続して回路を構成し、前記基準電圧発生抵抗体を流れる
電流により発生する基準電圧と、前記主トランジスタの
エミッタ電流が前記検出抵抗体を流れて発生する検出電
圧とを比較回路で比較し、該比較回路の出力で前記主ト
ランジスタのベース電流を制御することによりエミッタ
電流を制限することを特徴とする電流制限回路。 2)特許請求の範囲第1項記載の電流制限回路において
、主トランジスタのエミッタと検出抵抗体との接続点お
よび比較回路のマイナス側入力側端子と、定電流出力回
路との間に温度補正抵抗体を備えたことを特徴とする電
流制限回路。 3)特許請求の範囲第2項記載の電流制限回路において
、温度補正抵抗体を比較回路の中に組込んだことを特徴
とする電流制限回路。 4)特許請求の範囲第1項〜第3項のいずれかに記載の
電流制限器において、定電流出力回路は第1および第2
のトランジスタと第1および第2の抵抗体からなり、第
1のトランジスタのベース、コレクタおよび第2のトラ
ンジスタのベースが接続され、第1の抵抗体はこの接続
点と主トランジスタのエミッタが検出抵抗体に接続され
る点との間に配設され、第2の抵抗体は第2のトランジ
スタのエミッタと、第1のトランジスタのエミッタと主
トランジスタのベースとの接続点との間に配設される構
成であることを特徴とする電流制限回路。
[Claims] 1) A comparator circuit and a constant current output circuit are each connected in parallel to a circuit in which a Darlington-connected main transistor and a detection resistor for detecting the emitter current of the main transistor are connected in series, and A circuit is constructed by connecting a reference voltage generating resistor between the positive input terminal of the comparator circuit and the terminal of the detection resistor that is not connected to the emitter of the main transistor, and the current flowing through the reference voltage generating resistor. A comparison circuit compares a reference voltage generated by the main transistor with a detection voltage generated when the emitter current of the main transistor flows through the detection resistor, and the output of the comparison circuit controls the base current of the main transistor. A current limiting circuit characterized by limiting emitter current. 2) In the current limiting circuit according to claim 1, a temperature compensation resistor is provided between the connection point between the emitter of the main transistor and the detection resistor, the negative input side terminal of the comparator circuit, and the constant current output circuit. A current limiting circuit characterized by having a body. 3) A current limiting circuit according to claim 2, characterized in that a temperature compensation resistor is incorporated into the comparator circuit. 4) In the current limiter according to any one of claims 1 to 3, the constant current output circuit
The base and collector of the first transistor are connected to the base of the second transistor, and the first resistor is connected to the sensing resistor at this connection point and the emitter of the main transistor. The second resistor is disposed between the emitter of the second transistor and the connection point between the emitter of the first transistor and the base of the main transistor. A current limiting circuit characterized by having a configuration.
JP10790485A 1985-05-20 1985-05-20 Current limiting circuit Pending JPS61265608A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10790485A JPS61265608A (en) 1985-05-20 1985-05-20 Current limiting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10790485A JPS61265608A (en) 1985-05-20 1985-05-20 Current limiting circuit

Publications (1)

Publication Number Publication Date
JPS61265608A true JPS61265608A (en) 1986-11-25

Family

ID=14471012

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10790485A Pending JPS61265608A (en) 1985-05-20 1985-05-20 Current limiting circuit

Country Status (1)

Country Link
JP (1) JPS61265608A (en)

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