JPS61255119A - Optical receiver - Google Patents

Optical receiver

Info

Publication number
JPS61255119A
JPS61255119A JP60096532A JP9653285A JPS61255119A JP S61255119 A JPS61255119 A JP S61255119A JP 60096532 A JP60096532 A JP 60096532A JP 9653285 A JP9653285 A JP 9653285A JP S61255119 A JPS61255119 A JP S61255119A
Authority
JP
Japan
Prior art keywords
signal
voltage
circuit
waveform
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60096532A
Other languages
Japanese (ja)
Inventor
Toshiji Tamura
田村 年司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP60096532A priority Critical patent/JPS61255119A/en
Publication of JPS61255119A publication Critical patent/JPS61255119A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce remarkably pulse width distortion by providing a delay circuit retarding a threshold voltage for a prescribed time and a comparison circuit inputting a voltage from the delay circuit and a signal being electric conversion of an optical input and reproducing and outputting the signal. CONSTITUTION:The optical signal is converted into a current by a photodetector 1, converted into a voltage b an amplifier 2 and amplified into a waveform of a signal V4d1 required by a comparison circuit 9. An amplifier 7 generates a reference voltage when no optical signal exists. Since the output of a switching circuit 6 rises at the same time when the waveform of the signal V1 descends, the lower part from the center of the waveform of the signal V1 is sliced and then accurate waveform reproduction is not attained. Thus, a delay circuit 10 is provided after the switching circuit 6 and the entire thresh old voltage V2 is retarded from the waveform of the signal V1 so that a thresh old voltage V2' keeps the center position of the waveform of the signal V1 even if the waveform of the signal V1 descends, a pulse width distortion DELTATw' of an output voltage V3 outputted from the comparator circuit 9 is expressed as DELTATw'=t3-t2, and a signal with less distortion is obtained.

Description

【発明の詳細な説明】 [発明の背景と目的] 本発明は光受信器に係り、特にパルス幅歪を大幅に低減
させるのに好適な直流成分の符号伝送を行う光入力の受
信に使用されるディジタル光信号器に関するものである
[Detailed Description of the Invention] [Background and Objectives of the Invention] The present invention relates to an optical receiver, and in particular to an optical receiver used for receiving an optical input that performs code transmission of a DC component suitable for significantly reducing pulse width distortion. This invention relates to a digital optical signal device.

従来、直流成分の符号伝送を行う光信号の受信に使用さ
れるディジタル光受信器として第3図に示す回路構成の
ものがある。光信号は受光素子1によって電流に変換さ
れ、増幅器2によって電圧に変換されるとともに次段以
降の波形処理に必要な波形の信号■lまで増幅される。
2. Description of the Related Art Conventionally, there is a digital optical receiver having a circuit configuration shown in FIG. 3, which is used to receive an optical signal that transmits codes of DC components. The optical signal is converted into a current by the light-receiving element 1, converted into a voltage by the amplifier 2, and amplified to a signal 1 with a waveform necessary for waveform processing in the next stage and subsequent stages.

また、上記の信号■lは、抵抗3,4によって1/2に
分割され、ピーク検出回路5でその信号がホールドされ
る。6はスイッチング回路で、上記信号Vlの振幅と直
流成分を発生する増幅器7の出力電圧にレベルシフト回
路8の電圧を加えた電圧の振幅とを比べて高い方のレベ
ルのものをしきい電圧V’2として、このvlと、Vz
とを比較回路9に入力して、比較回路9より波形を再生
した出力電圧■3を出力する。
Further, the above-mentioned signal 1 is divided into 1/2 by the resistors 3 and 4, and the signal is held in the peak detection circuit 5. 6 is a switching circuit which compares the amplitude of the signal Vl with the amplitude of the voltage obtained by adding the voltage of the level shift circuit 8 to the output voltage of the amplifier 7 that generates the DC component, and sets the higher level as the threshold voltage V. '2, this vl and Vz
is input to the comparator circuit 9, and the comparator circuit 9 outputs an output voltage (3) whose waveform is reproduced.

第4図は第3図の比較回路9の入出力波形図で、(a)
は入力波形、(b)は出力波形でおる。しきい電圧v2
は、信号電圧Vtを1/2に分割してピーク検波回路5
で電圧保持を行うが、第4図に示すように、信号電圧v
1の波形が立ち下がり始めると、しきい電圧■2も同様
に立ち下がるため、信号電圧■1のパルス幅tlに対し
て出力電圧■3のパルス幅がt2となり、パルス幅歪Δ
7w=tt −11が生じ、歪が大きな光受信器とな“
っている。
FIG. 4 is an input/output waveform diagram of the comparator circuit 9 in FIG. 3, and (a)
is the input waveform, and (b) is the output waveform. Threshold voltage v2
divides the signal voltage Vt into 1/2 and generates the peak detection circuit 5.
However, as shown in Fig. 4, the signal voltage v
When the waveform of signal voltage ■1 begins to fall, threshold voltage ■2 also falls, so the pulse width of output voltage ■3 becomes t2 relative to the pulse width tl of signal voltage ■1, and the pulse width distortion Δ
7w=tt -11 occurs, resulting in an optical receiver with large distortion.
ing.

本発明は上記に鑑みてなされたもので、その目的とする
ところは、パルス幅歪を大幅に低減することができるデ
ィジタル光受信器を提供することにある。
The present invention has been made in view of the above, and an object thereof is to provide a digital optical receiver that can significantly reduce pulse width distortion.

[発明の概要] 本発明の特徴は、光入力を電気値に変換した信号振幅の
172の電圧を発生するピーク検出回路と、上記光入力
がない場合の電圧に相当する基準電圧発生用増幅器から
の電圧を所定の電圧だけ引き上げるレベルシフト回路と
、このレベルシフト回路からの電圧と上記ピーク検出回
路からの電圧゛ を比較して高い方の電圧をしきい電圧
とするスイッチング回路と、上記しきい電圧を所定時間
遅延させる遅延回路と、この遅延回路からの電圧と上記
光入力を電気値に変換した信号とを入力して上記信号を
再生出力する比較回路とからなる構成とした点にある。
[Summary of the Invention] The present invention is characterized by a peak detection circuit that generates a voltage of 172 signal amplitudes obtained by converting optical input into an electrical value, and an amplifier for generating a reference voltage corresponding to the voltage when there is no optical input. a level shift circuit that raises the voltage of the circuit by a predetermined voltage; a switching circuit that compares the voltage from the level shift circuit with the voltage from the peak detection circuit and sets the higher voltage as a threshold voltage; The present invention consists of a delay circuit that delays a voltage for a predetermined period of time, and a comparison circuit that inputs the voltage from the delay circuit and a signal obtained by converting the optical input into an electrical value, and reproduces and outputs the signal.

[実施例] 以下本発明を第1図に示した実施例および第2図を用い
て詳細に説明する。
[Example] The present invention will be described in detail below with reference to the example shown in FIG. 1 and FIG. 2.

第1図は本発明の光受信器の一実施例を示す回路ブロッ
ク図である。第1図は、光信号を電流に変換する受光素
子1と、上記電流を電圧に変換して増幅する増幅器と、
直流伝送を可能とするために増幅器2と同じ回路構成を
持ち、基準電圧を発生する増幅器7と、この基準電圧に
所定電圧を加えて引き上げるレベルシフト回路8と、抵
抗3゜4によって1/2に分割されて増幅器2がらの電
圧のピークの検出を行ってホール下する検出回路5と、
ピーク検出回路5の出力電圧とレベルシフト回路8の出
力電圧のうちの高い方をしきい電圧とするスイッチング
回路6と、スイッチング回路6からの電圧を所定時間だ
け遅らせる遅延回路10と、信号を再生出力する比較回
路9とから構成しである。
FIG. 1 is a circuit block diagram showing an embodiment of the optical receiver of the present invention. FIG. 1 shows a light receiving element 1 that converts an optical signal into a current, an amplifier that converts the current into a voltage and amplifies it,
In order to enable DC transmission, it has the same circuit configuration as amplifier 2, and includes an amplifier 7 that generates a reference voltage, a level shift circuit 8 that adds a predetermined voltage to this reference voltage to raise it, and a resistor 3゜4 to reduce the voltage by 1/2. a detection circuit 5 which detects the peak of the voltage of the amplifier 2 and detects the peak of the voltage of the amplifier 2;
A switching circuit 6 whose threshold voltage is the higher of the output voltage of the peak detection circuit 5 and the output voltage of the level shift circuit 8, a delay circuit 10 which delays the voltage from the switching circuit 6 by a predetermined time, and a signal regeneration circuit. It consists of a comparison circuit 9 that outputs.

第2図は第1図の比較回路9の入出力波形図で、(a)
は遅延回路がないときの入力波形、(b)は遅延回路を
設けたときの入力波形、(C)は出力波形である。
FIG. 2 is an input/output waveform diagram of the comparator circuit 9 in FIG. 1, and (a)
is an input waveform when there is no delay circuit, (b) is an input waveform when a delay circuit is provided, and (C) is an output waveform.

光信号は受光素子1で電流に変換され、さらに増幅器2
で電圧に変換されて比較回路9に必要な信号Vlの波形
まで増幅される。増幅器7は受光素子が接続されていな
いので光信号がない場合の基準電圧を発生する。直流成
分の符号伝送を行う場合は、上記基準電圧をレベルシフ
ト回路8で所定の電圧まで引き上げることによって直流
を識別可能となる。ざらに正確に信号を識別するために
、抵抗3.4によって増幅器2からの信号を1/2に分
割し、ピーク検出回路5で上記信号のピーク検出を行っ
ててそれを保持し、この信号とレベルシフト回路8の出
力のうちどちらか高い方をしきい電圧Vzとするスイッ
チング回路6によって信号■1の波形の中央にしきい電
圧v2がくるようにした。ところで、スイッチング回路
6の出力は、信号V1の波形が立ち下がるそれと同時に
立ち下がるため、信号■1の波形の中央より下を切るた
め、正確な波形再生が行えないので、スイッチング回路
6のあとに遅延回路10を設け、しきい電圧■2全体を
信号■1の波形より遅らせて、信号Vlの波形が立ち下
がってもしきい電圧Vz −は、信号Vrの波形の中央
の位置を保持するようにし、比較回路9から出力される
出力電圧v3のパルス幅歪ΔTw”がΔl” W −−
t3  t 2なり、非常に歪の少ない信号が得られる
ようにした。
The optical signal is converted into a current by the photodetector 1, and then the amplifier 2
The voltage is converted into a voltage by the comparator circuit 9 and amplified to the waveform of the signal Vl required by the comparator circuit 9. Since the amplifier 7 is not connected to a light receiving element, it generates a reference voltage when there is no optical signal. When performing code transmission of a DC component, the level shift circuit 8 raises the reference voltage to a predetermined voltage, thereby making it possible to identify the DC component. In order to roughly and accurately identify the signal, the signal from the amplifier 2 is divided into 1/2 by the resistor 3.4, and the peak detection circuit 5 detects the peak of the signal and holds it. By using the switching circuit 6 which sets the higher of the outputs of the level shift circuit 8 and the output of the level shift circuit 8 as the threshold voltage Vz, the threshold voltage v2 is placed at the center of the waveform of the signal 1. By the way, since the output of the switching circuit 6 falls at the same time as the waveform of the signal V1 falls, it cuts below the center of the waveform of the signal 1, so accurate waveform reproduction cannot be performed. A delay circuit 10 is provided to delay the entire threshold voltage (2) from the waveform of the signal (1) so that even if the waveform of the signal (Vl) falls, the threshold voltage (Vz-) maintains the center position of the waveform of the signal (Vr). , the pulse width distortion ΔTw" of the output voltage v3 output from the comparison circuit 9 is Δl"W --
t3 t2, so that a signal with very little distortion can be obtained.

[発明の効果] 以上説明したように、本発明によれば、パルス幅歪を大
幅に低減することができ、また、遅延回路を設けること
によって信号波形の立ち下がり部分に対してしきい電圧
がほぼ直角で横切るようにしたので、ジッタの少ない信
号再生ができ、さらに、信号波形のオーバーシュート、
アンダーシュートに対して影響の少ない回路構成とする
ことができるという効果がある。
[Effects of the Invention] As explained above, according to the present invention, pulse width distortion can be significantly reduced, and by providing a delay circuit, the threshold voltage can be reduced for the falling portion of the signal waveform. Since they cross at almost right angles, signal reproduction with less jitter is possible, and signal waveform overshoot and
This has the effect of providing a circuit configuration that is less affected by undershoot.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の光受信器の一実施例を示す回路ブロッ
ク図、第2図は第1図の比較回路の入出力波形図、第3
図は従来の光受信器の回路ブロック図、第4図は第3図
の比較回路の入出力波形図である。 1・・・受光素子、 2・・・増幅器、 3.4・・・抵抗、 5・・・ピーク検出回路、 6・・・スイッチング回路、 7・・・基準電圧発生用増幅器、 8・・・レベルシフト回路、 9・・・比較回路、 10・・・遅延回路。 代理人  弁理士  佐 藤 不二雄 r  2
FIG. 1 is a circuit block diagram showing one embodiment of the optical receiver of the present invention, FIG. 2 is an input/output waveform diagram of the comparison circuit of FIG. 1, and FIG.
The figure is a circuit block diagram of a conventional optical receiver, and FIG. 4 is an input/output waveform diagram of the comparison circuit of FIG. 3. DESCRIPTION OF SYMBOLS 1... Light receiving element, 2... Amplifier, 3.4... Resistor, 5... Peak detection circuit, 6... Switching circuit, 7... Reference voltage generation amplifier, 8... Level shift circuit, 9... Comparison circuit, 10... Delay circuit. Agent Patent Attorney Fujio Sato r 2

Claims (1)

【特許請求の範囲】[Claims] (1)直流成分の符号伝送を行う光入力を受信するディ
ジタル光受信器において、前記光入力を電気値に変換し
た信号振幅の1/2の電圧を発生するピーク検出回路と
、前記光入力がない場合の電圧に相当する基準電圧発生
用増幅器からの電圧を所定の電圧だけ引き上げるレベル
シフト回路と、該レベルシフト回路からの電圧と前記ピ
ーク検出回路からの電圧を比較して高い方の電圧をしき
い電圧とするスイッチング回路と、前記しきい電圧を所
定時間遅延させる遅延回路と、該遅延回路からの電圧と
前記光入力を電気値に変換した信号とを入力して前記信
号を再生出力する比較回路とからなることを特徴とする
光受信器。
(1) A digital optical receiver that receives an optical input that performs code transmission of a DC component includes a peak detection circuit that generates a voltage that is 1/2 of the signal amplitude obtained by converting the optical input into an electrical value; a level shift circuit that raises the voltage from the reference voltage generation amplifier by a predetermined voltage, which corresponds to the voltage when A switching circuit that sets a threshold voltage, a delay circuit that delays the threshold voltage for a predetermined time, and inputs the voltage from the delay circuit and a signal obtained by converting the optical input into an electrical value, and reproduces and outputs the signal. An optical receiver comprising a comparison circuit.
JP60096532A 1985-05-07 1985-05-07 Optical receiver Pending JPS61255119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60096532A JPS61255119A (en) 1985-05-07 1985-05-07 Optical receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60096532A JPS61255119A (en) 1985-05-07 1985-05-07 Optical receiver

Publications (1)

Publication Number Publication Date
JPS61255119A true JPS61255119A (en) 1986-11-12

Family

ID=14167737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60096532A Pending JPS61255119A (en) 1985-05-07 1985-05-07 Optical receiver

Country Status (1)

Country Link
JP (1) JPS61255119A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008011001A (en) * 2006-06-28 2008-01-17 Nec Electronics Corp Current/voltage conversion circuit and conversion method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008011001A (en) * 2006-06-28 2008-01-17 Nec Electronics Corp Current/voltage conversion circuit and conversion method

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