JPS61245258A - Method and device for controlling memory - Google Patents

Abstract

PURPOSE:To speed up bit map processing and to reduce overheads of a memory control, which is caused by a bit map, by providing a mechanism setting and resetting a bit map retrieval and bit strings with one instruction. CONSTITUTION:The operation is started at the base register number of the instruction set to an instruction register 51 and an address shown by a displacement. Among a bit map 12 having a length of contents stored in a size register 52 shown by a register number, bit strings in continuous '0' states having the length of contents stored in a counter register 53 shown by the register number of the instruction register 51 are sequentially retrieved, an the positions are stored in a register 56. An AND between n-number of bits at the left side of information on all '1's set to an internal register 55 and bits in the bit map 12 is calculated until it comes to zero or the counter 54 comes to zero so as to retrieve the bit string.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a storage management method and apparatus using bitmaps in a computer system, and particularly provides new means or steps that enable high-speed management of bitmaps.

[Background of the invention]

FIG. 1 shows the concept of storage management using bitmaps. A storage management program 14 running on the CPU I manages the corresponding storage 13 using the bitmap 12. The bitmap itself exists in the memory that it manages or in the main memory.

FIG. 2 shows the correspondence between bitmap and memory. The memory 13 is divided into sections 21 of fixed size, each section corresponding to one bit on the bitmap 12. This bit has two states: set state (1") and reset state ("O"), and indicates whether the corresponding storage partition is in use or not.
Indicates whether it is unused.

When a storage area allocation request is made, the storage management program searches this bitmap, searches for an unused area that meets the request, and, if found, allocates that area to the request source. Then, the state of the bit on the bitmap corresponding to the allocated area is changed to indicate that it is in use.

When a storage/area release request is made, the state of the bit on the bitmap corresponding to the storage area requested to be released is changed to display an unused state.

The concept of searching, setting, and resetting one or more consecutive bit strings on the bitmap described above is shown in Figure 3.
To perform a search, proceed as shown in (a) of the same figure.

A part of the bitmap 12 is copied to the register 31, the bits at the end (in the figure, the left end as an example) are tested, the whole is shifted by one bit, and the test is repeated again to search for an area that meets the request. Also.

To set and reset the bit string, use registers 32 and 33 with values set in the corresponding bit positions as shown in (b) of the same figure.
A method such as preparing a bitmap logical sum or logical product is used. However, a search for a single bit in the "1" state is performed using an instruction (FLM-Find Left Most If you use one), you can do it at high speed.

The test instruction and shift instruction described above can only process one bit at a time, so they must be used repeatedly to search for bit strings that are in the same state continuously, resulting in a large overhead.

OR and AND instructions can only process registers at a time, and have a large overhead including copying to a bitmap.

Regarding storage management using bitmaps, there is an overhead problem as described above.

[Purpose of the invention]

The purpose of the present invention is to provide instructions for quickly searching for one or more bit strings in one state in handling bitmaps, and also for setting and resetting bit strings at arbitrary positions and arbitrary lengths. Accordingly, an object of the present invention is to provide a storage management method and device that makes it possible to reduce the overhead of storage management using bitmaps.6 [Summary of the Invention] In order to speed up bitmap handling, There are four new instructions implemented using microinstructions. The first instruction searches for a bit string that holds one state continuously for the specified number of bits from the bitmap with the address and bit length specified by the instruction operand, and reports its position. Search Bit Map
: S B M) command, and the second and third commands are:
From the bit position specified using the instruction operand,
Set Bit Map (STBM) that sets the entire bit string with a specified length.
) command and reset bitmap (Re
set Bit Map: R378M) command. Similar to the first instruction, the fourth instruction searches for a bit string that is in one state consecutively for the specified number of bits from the bitmap with the address and bit length specified using the operand of the instruction. In addition, there is a Search and Set Bit Map that changes the searched bit string to another state.
: SSBM) instruction and search and reset bitmap (Search and Re5et Bi)
tMap: SRBM) instruction.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using three examples.

Embodiment 1 From the 88M instruction outlined above, that is, from a bitmap (bit string) starting from an address specified using the instruction's operand and having a separately specified length and number of bits,
Furthermore, an example of the format of an instruction that searches for a specified number of consecutive bit strings that hold one state and reports their positions is shown in FIG. 4, and an example of the hardware that implements the 88M instruction is shown in FIG. It is shown in Figure 5. In this hardware example, starting from the address indicated by the pace register number B2 and displacement D2 of the instruction set in the instruction register 51, the length of the content stored in the size register 52 indicated by the register number R3 is calculated. It is stored in the counter register 53 indicated by the register number R of the instruction 51 from the bitmap 12 that it has. A continuous bit string in the "O" state with a length of content n is searched in order, and its position is stored in the register 56 indicated by register number R1+1.The search is performed in the following steps.First, the internal register 54 is Initial value m of count for search
-n is set. Similarly, all 14 set in the internal register 55 with a length greater than or equal to the given number n
The left n bits of information in bitmap 111 are ANDed with the bits in bitmap 12. If the result is not zero,
After shifting the position of the bitmap corresponding to the internal register 55 to the right by 1 bit, the counter 54 is decremented by 1, and the logical AND is performed again. If the logical AND result is zero or the counter 5
Repeat the above process until 4 becomes zero. If the result of the logical product is zero, the value of the counter 54 is subtracted from m and the value is stored in the register 56 as the position of the bit string that satisfies the request.

If the corresponding bit string cannot be found until the counter reaches zero, a condition code is set using another circuit not shown. FIG. 6 shows a processing flow diagram when this operation is realized using microinstructions.

Example 2 The 578M instruction and the R5TBM instruction described in the overview, that is, a bit string that continues for a separately specified length from a bit position that has been moved by a separately specified number of bits from the specified address using the operand of the instruction. Examples of the format of instructions for setting and resetting are shown in 71 in FIG. 7(a) and 72 in FIG. In the software example, from the address indicated by the pace register number B2 and displacement D2 of instruction 81,
The content n stored in the register 83 indicated by the register number R1 starts from a position separated by the number of bits of the content capacity stored in the register 82 indicated by the register number R1.
Set or reset a bit string with length. Information of "1" or "O" is set in advance in the internal register 55 having a bit number larger than the value n, and the distinction between set and reset is made by decoding the instruction code and turning the logic operation circuit 84 as appropriate. This is done by switching.

FIG. 9 shows a processing flow diagram when this operation is implemented using microinstructions.

Embodiment 3 A further specified number of bitmaps (bit strings) starting from an address specified using the 538M instruction outlined above, that is, an operand of the instruction, and having a separately specified length and number of bits. An example of the format of an instruction that searches for a continuous bit string that is in the reset state, reports its position, and changes the bit string to the set state at the same time is shown at 101 in FIG. An example of this is shown in FIG. Regarding the 388M instruction, the setting state of the 538M instruction is changed to the reset state as shown in 102 in FIG. 10(b), and the other processing is the same as that of SSBM. Therefore, the 5SBH will be described below. In this hardware example, starting from the address indicated by the pace register number B2 and displacement D2 of the instruction set in the instruction register 111, the length of the content stored in the size register 112 indicated by the register number R3 is calculated. From the bitmap 12 that it has, a continuous "0" state bit string with a length of content n stored in the counter register 113 indicated by the register number R1 of the instruction 111 is searched in order, and its position is searched for by register number R1+1. The data is stored in the register 116 indicated by . The search is performed in the same manner as in the first embodiment, and the explanation will be omitted here. If a corresponding bit string is found, the long size register 55 is used to set the bit string. If the corresponding bit string cannot be found until the counter reaches zero, another circuit (not shown) is used to return an error condition.6 A processing flow diagram is shown in FIG. 12 when this operation is realized using microinstructions.

Although the embodiments of the present invention have been described above, the internal registers and arithmetic circuits may have different configurations, and the microinstruction processing order may also be different.

〔Effect of the invention〕

Since the present invention has a mechanism for searching a bitmap and setting and resetting a bit string with a single instruction, bitmap management can be speeded up and the overhead of storage management processing using bitmaps can be reduced.

[Brief explanation of the drawing]

Figures 1 to 3 are explanatory diagrams of conventional examples. Figure 1 is a conceptual diagram of storage device management using bitmaps, Figure 2 is an explanatory diagram of the correspondence between bitmaps and storage areas, and Figure 3 is an illustration of the correspondence between bitmaps and storage areas. FIG. 3 is an explanatory diagram of an example of a bitmap management method. Figure 4 is 88M
FIG. 5 is a block diagram of a hardware embodiment of the 88M instruction, and FIG. 6 is a flow diagram of an embodiment of the 88M instruction using microinstructions. FIG. 7 is an explanatory diagram of a format example of the 378M instruction and R3TBM instruction, FIG. 8 is a block diagram of a hardware embodiment of the 378M instruction and R3TBM instruction, and FIG. 9 is a flowchart of an embodiment of the 378M instruction using microinstructions. It is a diagram. FIG. 10 is an explanatory diagram of an example of SBN and SRBM all 8M formats, FIG. 11 is a block diagram of a hardware embodiment of 338M instructions, and FIG. 12 is a flow diagram of an embodiment of 338M instructions using microinstructions. 12...Bit map (bit string), 13...Storage device, 41, 71, 72, 101 and 102... Examples of formats of instructions newly created in the present invention, 51, 81 and 11
1... Example of implementation of newly created instructions according to the present invention, 52.
53, 82, 83, 112 and 113...Registers storing various numerical values, 55...Long size internal register for bitmap management, 56...To inspection 11 Figure 2 Figure z 3 Port 4 Figure I V; 5th day'fJ Figure'f: J7riU Figure 2'fJt+ Figure 1z

Claims (1)

[Scope of Claims] 1. In a computer system that manages storage using a bitmap, there is provided a means for rapidly searching the bitmap for an arbitrary number of consecutive bit strings that are in a set state or a reset state. A storage management device comprising: 2. A patent claim characterized in that a computer system that manages storage using a bitmap has means for changing the state of a bit string having an arbitrary length from an arbitrary bit position in the bitmap at once. The storage management device according to item 1. 3. A computer system that manages storage using a bitmap, characterized by having means for rapidly searching the bitmap for an arbitrary number of consecutive bit strings that are in a reset state and setting the bit strings. A storage management device according to claims 1 and 2. 4. A storage management device according to claims 1 to 3, comprising means for managing the external storage device in units of areas divided into fixed sizes. 5. Claims 1 to 5, wherein the virtual device and real storage are controlled using paging and segmentation, and the virtual storage area is managed in units of areas divided into a certain size. 3. The storage management device according to item 3. 6. In a computer system that has micro-instructions and uses bitmaps to manage storage, the micro-instructions are used to create any number of consecutive bit strings in the set or reset state from the bitmap. A step of searching at high speed, or a step of changing the state of a bit string of any length from any bit position in the above bitmap at once, or resetting an arbitrary number of consecutive bits from the above bitmap. 1. A storage management method comprising the steps of rapidly searching for a bit string in a state and setting the bit string.