JPS61244058A - Band gap voltage reference circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

TECHNICAL FIELD The present invention relates to integrated circuit bandgap voltage references, and more particularly to bandgap voltage references obtained using CMOS (complementary metal oxide semiconductor) manufacturing techniques. Regarding standards.

PRIOR ART A voltage reference is required to provide a substantially constant output voltage regardless of input voltage ζ output current and temperature. The voltage reference has many design applications, such as digital-to-analog converters, power supplies, cold-junction thermistor compensation circuits, analog-to-digital converters, mid-panel meters, calibration standards, precision current sources, and control settings. Applied to point circuits.

Modern voltage standards are generally based on Zener diode or bandgap generated voltages. Zener devices are characterized by high power consumption and poor noise characteristics. Bandgap voltage references, on the other hand, are designed to provide a temperature-stable output voltage by summing a pair of voltages with negative and positive temperature coefficients.

A negative temperature coefficient voltage is obtained from the base-emitter junction of a transistor, and a positive temperature coefficient voltage is obtained from the difference between the base-emitter voltages of two transistors operating at unequal current densities. When the differential voltage is amplified and added to the base-emitter voltage of the first transistor,
The sum is 1.23, which is close to the bandgap voltage of silicon.
being equal to volts results in a voltage level with a low temperature coefficient.

That 1.25 volts is then amplified, typically 5.0
Or a stable output voltage of 10.0 volts is provided.

A typical bipolar transistor or diode is
With a base-emitter voltage of about 600 mV when the device is on, it has a negative temperature coefficient of about -2 mV/'C. The positive temperature coefficient voltage resulting from the difference between the base-emitter voltages of two transistors is typically 60 mV at 25°C when the current densities of the two transistors are in a 10:1 ratio. Yes, 1.23 pol) -
In order to achieve the level II, it must be amplified before being applied to the base-emitter of the first transistor.

A 60 mV difference is about 200 mV for a large device? FI
However, it is insufficient for practical use and needs to be further amplified.

The early bandgap voltage standard was IEEE J.

5olid 5tate C1rcuits (197
1, February) Vol. 5C-6, pages 2-7
, Widlar. Recently, a more general circuit was developed by Paul Brokaw and published in IEEE J.

5olid 5tate C1rcuits (19
1974, December) Vol. 5C-9, 383-393
page paper [ASimple Three-Termin
al ICBandgap Reference J. The basic approach adopted in this circuit is shown in FIG. There, a pair of bipolar transistors Q1 and Q2 have their collectors each resistor R
1 and R2 to the positive voltage bus V+, with the paces connected in common to provide a 1.25 volt reference. The collectors of transistors Q1 and Q2 are also connected to respective inputs of operational amplifier A1, the output of which is connected to a voltage reference output. The emitters of transistors Q1 and Q2 are connected to both ends of resistor R3, and the emitter of transistor Q2 is connected to ground via resistor R4. transistor Q
1 and Q2 by scaling the geometry of Ql larger than Q2, or by making resistor R1 larger than R2, or both (larger transistor geometry or smaller current passing results in smaller current densities). ) and operated at different current densities. A voltage difference thereby occurs across resistor R3 and a current proportional to temperature is generated, which also flows through resistor R4. By appropriately selecting resistors R6 and R4, any voltage proportional to temperature can be generated across resistor R4. Resistance R
The voltage developed at Q4 is added to the base-emitter voltage of transistor Q2 to produce a relatively stable reference output.

The circuit shown in Figure 1 can use standard bipolar manufacturing, but unfortunately the CMO8
Manufacturing techniques cannot be easily applied. CMOS
In manufacturing, the collector of the transistor is formed from the substrate, and assuming the circuit of FIG. 1 uses CMOS manufacturing, it will be coupled to V+ and resistors R1 and R2 will be shorted. Although it is possible to overcome this problem by adding extra manufacturing steps, this in turn increases costs.

The standard P-well CMO8 has useful parasitic NPN bipolar transistors, but their collectors are not individually available and are all connected to +.

Such a transistor is shown in FIG. This transistor uses an N+ (heavily doped) source/drain diffusion 2 as an emitter, a P well 4 as a base through a P+ diffusion 6, and a N+ diffusion 10.
is assembled by using an N- (weakly doped) substrate 8 as a collector. The polarity of each component can be reversed to form an N-well CMO8.

Several attempts have been proposed and used to modify the configuration of FIG. 1 to form a CMO8 voltage reference using parasitic bipolar transistors as shown in FIG. An example thereof is shown in FIG. In this circuit, transistor Q
The collectors of 5 and Q4 are connected directly to V+ and their paces are connected to the 1.23 volt reference output. The emitter of transistor Q6 is connected in series with resistors R5 and R.
6, the emitter of transistor Q4 is connected to resistor R7, and the opposite sides of resistors R6 and R7 are both connected to ground. Operational amplifier A2 has its inputs connected to the emitter of transistor Q4 and R5, respectively.
and the connection point of R6, and its output is connected to the voltage reference output.

Amplifier A2 directly amplifies the base-emitter voltage difference appearing across resistor R5 to generate an output reference voltage similar to the circuit of FIG. Different current densities for transistors Q3 and Q4 are obtained by making Q3 larger than Q4 and/or making R6 larger than R7.

One problem with the circuit of FIG. 6 is the accuracy required for amplifier A2. Even if the current densities of transistors Q6 and Q4 differ by a factor of 100 (which is probably the practical limit), about 120 mVl or resistor R5
does not appear in Amplifier A2 is assembled with MOS devices, so even with careful design the input offset is only 20 m.
It becomes about V. This results in an error of approximately 16% (20mV/120mV) in the base-emitter voltage difference.
This causes an error of approximately 8% in the output reference voltage.

Furthermore, the temperature coefficient of the offset voltage is unpredictable and the output voltage varies with temperature. One way to improve the circuit of Figure 5 is to stack NPN transistors to increase the base-emitter voltage difference. . This method is illustrated in FIG. 4, where the bases of transistors Q3 and Q4 are connected to the emitters of transistors Q5 and Q6, respectively, as shown, and the collectors of the four transistors are connected to +. Resistors R5, R6 and R7, along with amplifier A2, connect transistors Q6 and Q4 as shown in FIG.
The voltage reference output is connected to the emitter of Q3 and Q
Connected to the bases of Q5 and Q6 instead of Q4. The bases of the latter two transistors are held above ground by resistors R8 and R9, respectively. Again, the geometric scaling of Q3 and Q4 and the resistance ratio of R6 and R7 are chosen to produce different current densities in Q6 and Q4.

Furthermore, transistor Q5. Q6 and resistors R8 and R9 are Q
3. Q4 and R6, R7 are similarly scaled to produce different current densities in Q5 and Q6.

As a result, the base-to-emitter voltage difference across resistor R5 is doubled, and the overall error is halved. Unfortunately, however, the voltage difference between the inputs to amplifier A2 includes the base-emitter voltages of four transistors instead of two, doubling the base-emitter differential voltage and Double the voltage. This results in a power reference of 2.46 volts) K, which is too high for many applications. Moreover, even halving the errors produced by this circuit is insufficient for many purposes.

SUMMARY OF THE INVENTION In view of the drawbacks associated with the prior art described above, it is an object of the present invention to provide a new and improved bandgap reference voltage circuit with very low output reference voltage errors.

Another object of the invention is to provide a band gap voltage reference circuit that is compatible with both bipolar and CMO8 manufacturing technologies.

In order to achieve the above and other objects of the present invention, two sets of bipolar transistors are connected to accumulate base-emitter voltages, and each transistor's collector and
A bandgap voltage reference circuit is provided including: transmission means for passing respective currents to the emitter circuits. 5. The number of transistors in each set, the geometry of each transistor, and the current flowing through each transistor are such that the accumulated base-emitter voltages of the first and second sets differ by an amount corresponding to a predetermined bandgap voltage. Selected. Output means are provided for providing the accumulated base-emitter voltage difference between the two sets of transistors as a precision reference voltage.

In a preferred embodiment, the first set of transistors is
It contains one more transistor than the set. Each transistor in each set is provided with an individual current source such that the current flowing through the transistors in the first set is greater than the current in the second set. The second set of transistors is scaled larger than the first set of transistors. Therefore, the current density flowing through the first set of transistors is greater than the current density through the second set. As a result, the base-emitter voltage for each transistor in the first set is larger, resulting in an accumulated base-emitter voltage difference between the two sets of 1.25 volts. If the circuit elements used are formed using typical CMO8 manufacturing methods, a current density difference of about 100:1 is typically required. This reduces the current in the first set of transistors to the second set of transistors.
This is easily accomplished by making the area of the second set of emitters ten times larger than the first set. If the circuit elements are formed by typical bipolar manufacturing methods, the current density imbalance will be approximately 50=1.

The reason for this is that the V of the transistor depends on the bipolar manufacturing method.
be is C because of its generally high doping level.
Approximately 90mV lower than MOS parasitic bipolar transistor
This is because it gets bigger. A 50:1 ratio can similarly be achieved with a 721 current scaling and a 7:1 emitter area scaling.

By grounding the base of the first transistor in each set, the bandgap reference is obtained directly from the voltage difference between the emitters of the last transistor in each set. Alternatively, if a ground reference is desired, the emitter of the last transistor of each set is connected to each input of the operational amplifier. With this, 2
An accumulated base-emitter voltage difference between the two sets appears across the bases of the first transistors of each set. The bases of these transistors are connected to another operational amplifier and a ground reference voltage divider circuit to produce a ground reference bandgap output.

Another embodiment, when the circuit is bipolar, is to connect both sets of transistors as diodes, provide one current source for each set, and route all but two current sources.

(Explanation of Examples) The present invention will be explained in detail below according to examples.

FIG. 5 shows a bandgap voltage reference circuit with a much lower offset voltage error than the conventional one. This circuit also
Bipolar processing (manufacturing) technology and CMO3 processing (manufacturing)
Compatible with both technologies. 6 transistors Q7, Q
8. Q9. Q10. Qll and Q12 are connected one after the other with the emitter of each transistor coupled to the base of the next transistor, except for the last transistor Q12. The collector of each transistor is connected to the positive voltage bus ■+, and the emitter is connected to each current source I7. I8. I9.110゜1
11 and 112. The base of the first transistor Q7 is grafted, and the emitter of the transistor Q12 is connected to the output terminal 12.

Transistors Q13, Q14. Q15. Q16 and Q
The second set of transistors on the left side of the circuit consisting of 17 are connected in sequence with the emitter of each transistor coupled to the base of the next transistor, except for the last transistor Q17. The collector of each transistor is connected to the positive voltage bus V
+, and the emitter is connected to each current source 113,114,1
15, connected to 116 and 117. The base of the first transistor Q13 of the second set is grounded, and the emitter of the last transistor Q17 is connected to the output terminal 14.

The first set of transistors Q7-Q12 includes one more transistor than the second set of transistors Q13-Q17, such that the voltage at output terminal 12 is
is one base-emitter voltage drop lower than the voltage of . Furthermore, the geometry of transistors Q7-Q12 is made smaller than the geometry of corresponding transistors Q'13-Q17, so that current source air 112 is smaller than current source 11.
A current greater than 3 to 117 is drawn from the collector-emitter circuit of each transistor. As a result of this geometry and current scaling, a current density is generated in transistors Q7-Q12 that is greater than the density of the current flowing through transistors Q13-Q17. Accordingly, the base-to-emitter voltage drop of transistors Q7-Q12 becomes larger than that of transistors Q13-Q17, and the voltage difference between output terminals 12 and 14 increases. The current source size and transistor geometry scaling are:
Considering the additional base-emitter voltage drop at output terminal 12, the voltage difference between output terminals 12 and 14 is 1.2
The desired bandgap reference level of 3 volts is selected. In this way, the bandgap reference voltage is achieved directly as the difference between the two sets of transistors. Conventional amplification of differential voltages resulted in amplification of the voltage and associated error components, which is avoided in the present invention.

The number of transistors used in each set is somewhat arbitrary. A larger number of transistors requires a smaller geometric scaling ratio, but requires more area. And when the number of transistors decreases,
Less area is required, but the geometric scaling ratio is greater. However, regardless of the absolute number of transistors in each set, it is desirable to have one more transistor in the first set than in the second set. The base-emitter voltage component is added to the base-emitter voltage differential to generate a bandgap reference that is stable for the desired temperature.

In bipolar assembly techniques, the base-emitter voltage drop is typically in the range of 0.65 to 0.75 volts;
Transistors Q13 to Q17 to transistors Q7 to Q1
2 by about a factor of 7, and the current source I7
~112 than the current sources 113-117 as well by a factor of about 7
By increasing K by an amount K, we achieve the desired 1.23 volt bandgap reference between output terminals 12.14.

In this case, the current sources F-112 each have a current of about 14.6 μA, and the current sources 113-117 each have a current of about 100 μA. CM
With O8 processing technology, the base-emitter voltage is typically in the 0.55-0.65 volt range, requiring slightly larger area and current scaling to achieve a 1.25 volt differential output. . For the circuit of FIG. 5, a scaling of approximately 10=1 in both transistor area and current provides the desired output for a CMOS device.

Although the circuit of FIG. 5 has a lower error component than the conventional CMO8 circuit, one advantage is that the reference voltage across output terminals 12.14 is floating and not referenced to ground. A variation of this circuit is shown in FIG. 6, which provides an adjustable ground referenced output voltage. In this circuit, transistors Q7-Q17 and current sources 17-117 are incorporated as essential components, similar to the circuit of FIG. However, instead of taking the output directly, the emitters of Q12 and Q17 are connected to the input of operational amplifier (OP amp) A5. Since the operational amplifier operates to equalize the voltages applied to its inputs, the effect of this connection is to make the emitter voltages of transistors Q12 and Q17 substantially equal, and the previous 1.23 volt output is routed through the two sets of transistors. It is returned as a voltage difference between the bases of the first transistors Q7 and Q13 of each set. Rather than being grounded as in the circuit of FIG. 5, the bases of transistors Q7 and Q150 are respectively connected to the output terminal 16 and the inverting input of another operational amplifier A40, and the output of amplifier A3 is connected in common with the base of transistor Q1!1. Connected to the inverting input of amplifier A4. In addition to the connection to output terminal 16, the base of transistor Q7 is connected to the output of amplifier A4 and one end of a voltage divider circuit consisting of the series connection of resistors RID and R11. The non-inverting input to amplifier A4 is connected to resistor R1 of the voltage divider circuit.
It is taken from the midpoint 18 between 0 and R11.

The action of amplifier A4 is to raise the voltage at output terminal 16 until the base voltage of transistor Q13 is equal to the voltage at node 18, making the voltages at the two inputs to amplifier A4 equal. Therefore, the 1.2'5 volts developed between the bases of transistors Q7 and Q13 is applied to resistor R1.
It also appears on both ends of 0. Under these conditions, terminal 1
The output voltage of 6 is (R10+R11)/R11 with ground reference.
It is equal to 1.23 times of . This circuit also has the advantage that a more accurate output voltage is obtained than in the prior art, even though amplifiers A5 and A4 are not as accurate as the amplifiers used in conventional circuits. The reason is that the amplifiers A3 and A4 are not at very small voltages as in the prior art, but at 1.
This is because it amplifies 23 volts.

Another embodiment of the invention, particularly adapted to bipolar assembly methods, is shown in FIG. In this embodiment, two sets of transistors are provided, similar to the circuit of FIG. The first set typically consists of six transistors Q18°Q19 . Q20. Q21
, Q22 and Q23, the second set usually consists of five transistors Q24, Q25, Q23, Q27 and Q
Consists of 2B. The emitter of each transistor, except the last transistor in each set, is connected to the base of the next transistor as shown in FIG. However, each transistor in FIG. 7 acts as a diode by shorting its collector and base. The bases of the first transistors Q1B and Q24 of each set are not grounded, and the collectors are both connected to KV+. The transistors of each set are connected in series, with only the first transistor of each set connected to V+.

In this embodiment, the only two current sources can be eliminated, which greatly simplifies the circuit. One current source T:18 is connected to the emitter of transistor Q23 and draws current from each of transistors Q1B-Q23, - a force sensing current source 119 is connected to the emitter of transistor Q28 and draws current from each of transistors Q24-Q28. bring out. The scaling of the transistors and the two current sources are selected similarly to the circuit of FIG.
A bandgap reference voltage of 1.23 volts is established between 20 and 20 volts.

Various embodiments of new and improved high precision bandgap voltage reference circuits that can be implemented in both bipolar and CMO8 fabrications have been described.

However, it will be apparent to those skilled in the art that many modifications and other embodiments are possible. For example, the circuit could be fabricated in N-well CMO8 fabrication by simply reversing the polarity of each circuit element, and such an embodiment would be considered an exemplary circuit.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional bandgap reference circuit. FIG. 2 is an enlarged cross-sectional view of a parasitic bipolar transistor present within a CMOS device. 5 and 4 are circuit diagrams of conventional bandgap voltage reference circuits compatible with CMO8 manufacturing technology. FIG. 5 is a circuit diagram showing one embodiment of the present invention. 6 and 7 are circuit diagrams of other embodiments of the present invention. Seen 8.2°

Claims (6)

[Claims] (1) a first set of bipolar transistors interconnected to accumulate base-emitter voltage; and a second set of bipolar transistors interconnected to accumulate base-emitter voltage; a device for transmitting current to the collector-emitter circuit of each transistor; and the number of transistors in each set, the geometry of each transistor, and the current transmitted to the collector-emitter circuit of each transistor are the accumulated base-emitter voltage difference between the first and second sets of transistors is selected such that the accumulated base-emitter voltages of the second set differ by an amount corresponding to a predetermined bandgap voltage; A bandgap voltage reference circuit having an output device connected to provide a reference voltage. (2) The circuit of claim 1, wherein the first set of transistors includes one more transistor than the second set of transistors; For transistors,
A higher current density than the second set and a corresponding base
Bandgap voltage reference circuit selected to provide higher emitter voltage. 3. The circuit of claim 1, wherein the cumulative base-emitter voltage difference between the first and second sets of transistors is substantially equal to 1.23 volts. (4) In the circuit according to claim 1, each element of the circuit is assembled by a bipolar manufacturing method, both sets of transistors are diode-connected, and a current transmission device is provided for each of the first and second transistor sets. A bandgap voltage reference circuit comprising first and second current sources connected to carry current. (5) In the circuit according to claim 1, the base-emitter circuits of the transistors in each set are connected in series from the first transistor to the last transistor in each set, and the base-emitter circuit of the first transistor in each set is connected in series. is grounded, the output device is connected to the emitter of the last transistor of each set, and the voltage difference therebetween is provided as a reference voltage. (6) In the circuit according to claim 1, the base-emitter circuits of the transistors in each set are connected in series from the first transistor to the last transistor in each set, and (a) the last transistor in each set a first operational amplifier having an input connected to the emitters of the transistors of the first transistor of each set, the first operational amplifier having inputs connected to the emitters of the transistors of the first transistor of each set; (b) a ground reference voltage divider circuit connected to the bases of the first transistors of the first set; and (c) the bases of the first transistors of the second set. a second operational amplifier having one input connected to the voltage divider circuit, the other input being connected to the voltage divider circuit, and the output thereof being connected to the base and output terminal of the first transistor of the first set; A second ground reference voltage is thereby established at the output terminal that is proportional to the cumulative base-emitter voltage difference between the two sets.
A bandgap voltage reference circuit having an operational amplifier.