JPS6124033B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The object of the present invention is a zigzag sewing machine, particularly a sewing machine that electrically controls stitch patterns, which enables normal forward-feeding pattern sewing and reverse-feeding pattern sewing, or To provide a sewing machine capable of performing tacking stitches performed at a terminal end by reliably tracing back the stitches up to the terminating end.

In conventional sewing machines, the stitches that reverse feed the fabric are limited to straight stitches or simple zigzag patterns, and the tacking stitches are generally independent of the regular pattern stitches as shown in Figures 1 and 2. Since the sewing machine performs the tacking stitches in a unique trajectory, the sewing machine had the disadvantage that the pattern of the pattern stitches was disordered.

The present invention eliminates the above-mentioned conventional drawbacks and, as shown in Fig. 3, backstitching retraces the pattern that was sewn before the start of backstitching, making it possible to perform tacking stitches that are aesthetically superior. This is what I did.

Before explaining the structure of the present invention, the conventional method of forming a pattern with a zigzag sewing machine is as follows.
Generally, a pattern is formed by moving the needle bar left and right and moving the fabric back and forth in areas where the needle is not in the fabric. In such a case, the pattern forming device will
It is well known to set the needle by moving it from side to side, controlling the feed regulator in areas where the needle enters the fabric, and then feeding the fabric in areas where the needle does not enter the fabric. The present invention has the same control range as these conventional examples, and to explain its configuration in detail, as shown in FIG. In normal pattern sewing, each stitch is controlled by a pair of signals, such as the width (for example, M ₂₀ ) and the feed for the next stitch (for example, N ₂₀ - ₂₁ ), and back stitches (tacking stitches) are controlled. When a signal is input and held, the control for the first swing width (M ₁ in the figure) is performed and the last stitch of normal pattern stitching (first stitch of back stitch, needle position 1) is performed. ), and the feed for the next stitch after the back stitch is controlled by a pair of signals N ₁ - ₂₂ and the width M ₂₂ of the stitch after the back stitch, and the next feed is The signal N ₁ - ₂₂ is the feed signal N ₂₂ - ₁ for the last stitch of the normal pattern sewing.
and thus in the subsequent stitches of the backstitch the feed (e.g. N ₂₂ - ₂₁ and width (e.g. M ₂₁ )) controlled by paired signals for each subsequent stitch are With the last stitch of the normal pattern stitching as the turning point, only the feed signal is inverted, and the width signal is left as is, the generation order of these signal pairs is the same as that of the normal pattern sewing in between until the turning point. When the back stitch signal is terminated, the stitches of the back stitch can be traced to normal pattern stitching in the same way as when the back stitch is started. It is something.

Next, to explain the embodiment of the present invention in detail with reference to the drawings, FIG. The relationship c between each stitch coordinate b and each stitch coordinate when transitioning from normal pattern stitching to back stitching is shown.The stitch pattern a is a reproduction of Fig. 3, and the stitch number near the tacking stitch is shown. is the same as in Figure 4. Since each stitch of the pattern can be expressed as the coordinates of the width and feed components, in Fig. 5, the center coordinate of the maximum needle width is set to 0, and the left and right maximum width coordinates are -15, respectively. +15, and for feed, the coordinate for the feed amount is 0, the coordinate for the forward maximum feed amount is 15, and the coordinate for the backward maximum feed amount is 0.
15. The coordinate for the backward maximum feed amount is -15, and for convenience, each step is expressed as a pair of the width coordinate of each stitch and the feed amount for each next stitch, and steps 1 to 22
This represents a waveform pattern that ends one unit at . Furthermore, a backstitch pattern with Step 1 as the turning point in a continuous pattern of normal pattern sewing is also shown, and the step A for the feed amount for the next stitch at the turning point and the amplitude coordinate of the stitch are shown below. Furthermore, the feed amount for the next stitch is paired and sequentially steps from step B to step J.
This shows an example in which backstitching was performed until the end. In addition, as shown in FIG. 5a, the stitches of the normal pattern stitch and the back stitch are the same.

FIG. 6 is an electrical circuit diagram exemplified for convenience in explaining FIG. 7 as an embodiment of the present invention, and 1 generates a signal for a stitch in which a pattern is selected for normal sewing. This circuit is essentially a circuit filed in a patent application filed in 1973 by the same applicant as the present invention.
Same as No. 124306. In the figure, _S1 to _S8 are pattern selection switches, ROM1 is a static storage device that stores stitch control signals, _A1 to _A8 are input terminals for inputting the address signals, and _O1 to _O6 are input terminals for inputting the address signals. an address change output terminal for addressing the static storage device itself one after another with its output; O ₇ ;
~ _O11 is an output terminal for the cloth feed control signal, _O12 ~ _O16 is an output terminal for the needle swing width control signal, L3 and L4 are latch circuits, and the pattern selection signals of the switches _S1 ~ _S8 are output. NAND circuit for encoding
The latch circuit L3 receives the signal via NA6, NA7, and NA8, and the NAND circuit NA detects when any of the switches is selected.
5, the monostable circuit MM5 is activated, and the signal is received by the trigger terminal C _P of the latch circuit L3, which latches the encoded pattern selection signal and stores the pattern in the static storage device ROM1. Addressing is now based on selection. The AND-OR circuit (AND-OR) is a monostable circuit MM3 and a delay circuit when the pattern is selected.
A pattern selection signal is given to the static storage device ROM1 as an address via TD3, and address signals for the second and subsequent stitches are sent to the latch circuit L.
This circuit selects a signal for the terminal A6 so as to output the output signal from the terminal A6. The latch circuit L4 is
A static memory device is created by applying a rising signal via the NAND circuits NA10 and NA2, which are first reset by the pattern selection signal via the NAND circuit (NA9) and then released from reset, to the trigger terminal C _P.
Terminals A ₁ to _{A 6} of the address signals for the first stitch are used for address terminals A ₁ to A ₈ of ROM1.
latching the signals of the address conversion terminals O ₁ to _{O 6} using the pattern selection signal as an address signal,
Address and blank for the first stitch, and every time the trigger terminal C _P of the latch circuit L4 receives the needle up/down position detection rising signal synchronized with the upper axis of the sewing machine generated from the timing pulse generator TPG, the second and subsequent stitches Address change terminal O ₁ for
This is for latching the signals of ~ _O6 to the address terminals _A1 ~ _A6 . It also plays the role of latching an address signal for back stitching, which will be described later. Note that R receives the control DC power supply (+V) and connects each of the switches S ₁ to S ₈ , the timing pulse generator TPG, and the return switch described later.
This is a normal limiting resistor to provide a reference voltage for control to RET. The timing pulse generator (TPG) is set to a high level H in the area where the needle is not in the fabric, and a high level H in the area where the needle is not in the fabric, for one period of vertical movement of the needle corresponding to one revolution of the upper shaft of the sewing machine. As will be described later, while the sewing machine is operating, the rising signal at the time of switching between each level is used as a synchronizing signal for needle swing width control, and the falling signal is used as a synchronizing signal for needle swing width control. is used as a synchronization signal for cloth feed control. Its output terminal is connected to the monostable circuit MM1, the trigger terminal C _P of the latch circuit L2 for the needle width signal, and is connected via the inverter IN to the trigger terminal C _P of the latch circuit L1, which will be described later, and the delay circuit TD.
1 input terminal in, D-type flip-flop circuit F/
The trigger terminal C _P of F is connected to one input terminal of the AND circuit A1, respectively. When the return switch RET, which is the operating section for switching between normal stitching and back stitching, is operated and held, the sewing machine that was performing normal pattern stitching will continue to perform back stitching, and the operation will continue. This is a manual switch that returns to normal pattern sewing when released, and one end is grounded and the other end is connected to the limiting resistor R and also to the data input terminal D of the flip-flop circuit F/F. . This flip-flop circuit has a preset terminal P _S
is designed to receive the output of the NAND circuit NA9 and be preset when selecting a pattern. NAND circuit
NA1 receives the signals from the output terminal Q of the monostable circuit MM1 and the positive output terminal Q of the flip-flop circuit (F/F) and serves as one of the inputs of the NAND circuit NA2, and the NAND path NA3 is the output terminal of the delay circuit TD1. The negative output terminal of the Q flip-flop circuit F/F receives the output signals of the astable circuit AM and the NAND circuit NA4, which will be described later, and its output is used as the other input of the NAND circuit NA2.
The NAND circuit receives these three signals together with the NAND circuit NA10, and latches the latch circuit L4 at the rising edge of its output signal. The latch circuit L4 advances the address of the static storage device ROM1 for each stitch with each signal from the timing pulse generator TPG, and when the return switch RET is operated, the latch circuit L4 continuously advances the address of the static storage device ROM1 for each stitch before forming each stitch of the back stitch. A circulating signal is given to the comparator 2 which detects the address for the next stitch (previous stitch for normal pattern stitching) by the signal of the astable circuit AM which sends the running signal, and an address change signal is sent. It serves as a timing buffer that changes O ₁ to _{O 6} until the required address signal is reached. L1 is a latch circuit whose input terminals I ₁ to I ₆ are respectively connected to address terminals A ₁ to _{A 6} of the static storage device ROM1.
The signals _I1 to _I6 , which are latched by the rising signal of the timing pulse generator TPG (signal when the needle emerges from the cloth onto the cloth) via the NAND circuit NA1, are generated to the next falling signal via the inverter IN. At the same time, inverted data is latched at output terminals ₁ ' to ₆ , and each of these output terminals is connected to an exclusive OR circuit.
When the return switch RET is operated to designate backstitching at the same time as the falling edge, the L level signal and the timing By the falling signal of the pulse generator TPG and the delayed output of the signal delay circuit TD1 of the flip-flop circuit F/F, or when the return switch RET is operated after the falling edge, the timing pulse generator TPG The next falling signal and the delayed output output the NAND circuit NA3.
As mentioned above, the signal from the astable circuit AM through the astable circuit circulates the address change signals _O1 to _O6 of the static storage device ROM1 one after another, and supplies comparison data to the exclusive OR circuits EX and OR connected to these, respectively. It's starting to feel like it's forcing me. The outputs of the circuits EX and OR serve as the inputs of the NAND circuit NA4, and the respective output signals ₁ ' to ₆ ' of the latch circuit L1 when latched before the operation of the return switch RET, and the exclusive OR When the circular address change signals O ₁ to _{O 8} of the static storage device ROM1 forming a pair in the circuits EX and OR are different for each pair (inputs I ₁ to I when the latch circuit L1 latches), ₍₆ ) when they match with each other, that is, when they match with the address for the stitch one before the addresses I ₁ to I ₆ ), the NAND circuit NA4
The output becomes L level, invalidating the signal of the astable circuit AM to the latch circuit L4 and stopping the address progression.
MM2 is now running. C1 is a counter circuit, whose input terminals I ₇ to I ₁₁ are connected to the cloth feeding output terminals O ₇ to O 11 of the static storage device ROM 1, and whose output terminals O' ₇ to O' ₁₁ are connected to the _flip -flop circuit F. /F's positive side output signal Q
Each of the circuits is connected to a switching circuit SC which is a set (only one set is shown in the figure) of an AND circuit AND or each NOR circuit switched to the NOR side and its output received by each OR circuit OR. There is. The latch circuit L2 is a timing pulse generator TPG.
When the needle is at the H level, that is, the needle is in the area on the cloth, the needle swing width data of the output terminals _O12 to _O16 of the static storage device ROM1 connected to the input terminals _I12 to _I16 , respectively, is latched. Output data O' ₁₂ to O' ₁₆ are given to the amplitude drive device BD. Regarding the signal to the load input terminal L for setting the count start value of the counter circuit C1, for the NOR circuit NOR1,
Timing pulse generator for normal pattern sewing
When TPG is at L level, that is, in the area where the needle is in the fabric, one input of AND circuit A1 becomes H level and is loaded, and when backstitching, the needle is in the fabric as described above. The signal at the positive output terminal Q of the monostable circuit MM2 that is generated when the monostable circuit MM2 is in the input state, the signal at the negative output terminal before operation of the delay circuit TD2 that uses this as input, and the negative output of the flip-flop circuit F/F. The terminal signal is input and preset is performed via an AND circuit. Then, the signal at the positive output terminal Q when the delay circuit TD2 operates after a certain period of time, the signal at the negative output terminal ₁ after the operation of the monostable circuit MM2, and the negative output terminal of the flip-flop circuit F/F. The input terminal signal of the count-up terminal uP is then incremented by 1 through the AND circuit A3 with the signal Q as input, and the output signal O' ₇ to O' ₁₁ is switched to the switching circuit SC. When the signal of the positive side output terminal Q of the flip-flop circuit F/F is at H level, that is, when sewing a normal pattern, the switching is made to the AND circuit AND side, and the cloth feed signal of the static storage device ROM ₁ is switched through this. O ₇ to O ₁₁ are applied to output terminals ₇ '' to ₁₁ '' for the feed drive device FD, and when the level is L, that is, for back stitching, the NOR circuit is applied.
Becomes the NOR side and sends the cloth feed signal _O7 through this
_O11 is counted up by 1 as described above, inverted by the circuit NOR, and applied to the output terminals _O7 '' to _O11 ''. The reason for counting up and reversing these data is the static storage
Since the cloth feed data in ROM1 is 5 bits, it is 10.
The data for cloth feeding in the static storage device ROM1, which is stored in an ordered manner for normal pattern stitching, is data in codes representing decimal numbers 0 to 31, and must be reversed for each stitch in back stitching. For example, the relationship between the feed coordinate and the code is -15
is set so that code 0 and 0 equals 15+15 equals 30, so in order to invert each of these codes, that is, code 0 to code 30, 15 to 15, and 30 to 0, for example, code 0, or binary code 00000, is set. Count up once and set it to 00001, then the reverse code is 11110
In other words, it is intended to perform the operation of 30.

In the configuration shown in FIG. 6 described above, the pattern selection switches S ₁ to 1 are operated without operating the return switch RET.
When any one of _S8 is turned on, the NAND circuit NA
The static memory ROM1 is addressed for the first stitch by the pattern selection signal encoded by 6, NA7, and NA8, and when the needle is on the fabric, the needle oscillation of the stitch signal in ROM1 is Width control data O ₁₂ -O ₁₆ are latched by latch circuit L2 to determine the initial stitch coordinates. Then, when the sewing machine rotates and the needle enters the cloth, the cloth feed control data _O7 to _O11 is loaded into the load input terminal L of the counter C1 as it becomes L level by the signal via the AND circuit A1. It is output to the cloth feed drive device FD via the switching circuit SO to control a feed regulator (not shown). The output data of the static storage device ROM ₁ advances each time the sewing machine rotates, and the needle swing width and cloth feed are controlled. Next, while the sewing machine is rotating or once the sewing machine has stopped, turn on the return switch.
Turning on and holding RET causes the flip-flop to be activated in the falling phase of the timing pulse generator TPG when the needle enters the fabric for the first time thereafter, i.e. when forming the last stitch according to the control signal before operating the switch. The circuit F/F is inverted. The last stitch is based on the output signal of the static storage device ROM1 outputted at the rising edge before the falling edge, and the signal outputted to the swinging width driving device BD at the rising edge regarding the needle width data _O12 to _O16 . .
Regarding the cloth feed data _O7 to _O11 , the latch circuit L1 latches the address signal for the last stitch at the subsequent falling edge, that is, the above-mentioned inversion of the flip-flop circuit F/F, and then the delay circuit TD latches the address signal for the last stitch.
1, the signal of the astable circuit AM sequentially advances the address change signal of the static storage device ROM1 via the NAND circuits NA3 and NA2, and when this matches the address signal for the last stitch,
In other words, when the address change signal that is output together with the stitch signal in the previous stage of the stitch is output, the exclusive
Monostable circuit MM2 is operated via OR circuit (EX, OR) and NAND circuit NA4, and then NAND
The output of the circuit NA4 sets the NAND circuit NA3 to H level and stops the latch function of the latch circuit L4, thereby stopping the progress of the address change signal. Therefore, the stitch control signal in the static storage device ROM1 is a signal for the stitch preceding the last stitch. The output signal Q of monostable circuit MM2 is AND circuit A
2. Provided to the load input terminal L of the counter C1 via the NOR circuit NOR1 and stored in the static storage device ROM1.
Of the stitch signals before the last stitch, the feed control signals O ₇ to O ₁₁ are sent to the output terminals O' _{7 to} O of the counter.
_However , before the feed drive control device FD operates, the delay circuit TD2 continues to operate and the monostable circuit becomes inoperative, so the counter C1 is counted up by 1 via the AND circuit A3, and the data is gives a feed signal to the feed drive control device ED, which is reversed by the switching circuit SO and returns to the stitch immediately before the final stitch. At this time, the static storage device ROM
As mentioned above, each output of 1 is a stitch signal before the last stitch, and when the sewing machine rotates and the needle comes out on the fabric, the timing pulse generator
In response to the H level signal of TPG, the latch circuit L2 latches needle width control signals O ₁₂ to O ₁₆ of the stitch signals and supplies them to the width driving device. When rising to the H level, the monostable circuit MM1 operates, but since the positive output terminal Q of the flip-flop circuit F/F has already reached the L level, the NAND circuit NA1 goes to the H level.
level, the latch circuit L4 does not latch the new address change data, and the width drive device BD is eventually driven by the stitch control signal before the last stitch. Furthermore, when the sewing machine rotates and the needle enters the cloth, the latch circuit L1 latches (inverts) the address signal for the previous stitch at the falling edge of the timing pulse generator TPG, and outputs the address signal to the comparator 2.
Comparison standard data and none, so NAND circuit NA
4 becomes H level, and continues to wait for the output of delay circuit TD1 to be sent to the astable circuit via NAND circuit NA3.
The address change data _O1 to _O6 of the static storage device ROM1 is advanced by the signal AM. Then, when the pattern control output signal becomes the signal of the preceding stage, the output signal is fixed. Then, in the same way as above, the output signal is counted up and inverted and applied to the feed drive device FD, and subsequently to the swinging width drive device BD when the next needle is on the cloth. In this way, the normal pattern stitches are traced in reverse one after another, but when the return switch RET is released, the first falling phase of the subsequent timing pulse generator TPG, that is, the back When the last stitch of sewing is formed, the flip-flop circuit F/F is inverted and the signal is
Since the operation of the latch circuit L4 is related to the timing pulse generator TPG through the NAND circuit NA1 and is made independent of the astable circuit AM, the comparator 2
Although the latch circuit L1 changes the comparison reference data for each stitch, the address change signal does not advance within one stitch as in back stitching, so the NAND circuit NA4 never goes to L level, and henceforth, The feed control signals O ₇ to O ₁₁ are the AND circuit A1 as explained in the first normal pattern sewing.
The feed drive FD is controlled by a signal via the feed drive FD, ie loaded each time the needle enters the fabric. If we trace the operation of switching stitches when the above-mentioned hold of the switch RET is released, we can see that during back stitching, the output data of the static storage device ROM1 is changed in the L level area of the timing pulse generator TPG. A set of output data at this time is for controlling the feed drive device ED in the L level region and controlling the width drive device BD in the next H level region, and for the first time after the switch is turned off. When the timing pulse generator TPG falls, that is, when a seam is formed, the flip-flop circuit F/F is inverted, but when there is no new rise of the timing pulse generator TPG, the data in the static storage device ROM1 is transferred by a signal via the NAND circuit NA1. will not change. When the last set of output data before the switch-off is at L level due to the falling edge, the signal via the AND circuit A1 loads the counter C1, and the switching circuit SC outputs the signal from the flip-flop circuit F/F to the AND circuit.
Switch to the circuit AND side, thus static storage ROM
1 output signals O ₇ to _{O 11} are given as they are to the feed drive control device FD. It can be seen that the output signals O'' ₇ to O'' ₁₁ given to this feed drive device are coordinately inverted versions of the last feed amount signal before the switch-off. Then, at the next rising edge of the timing pulse generator TPG, the output signal of the static storage device ROM1 is advanced by one, and the next amplitude and feed coordinates are respectively advanced. Thus, the regular pattern seam after the back stitch still follows the back stitch.

FIG. 7 is an electric circuit diagram showing an embodiment of the present invention, in which pattern selection switches S ₁ to S ₈ , latch circuit L2,
L3, NAND circuit NA ₅ ~ NA ₈ , monostable circuit MM
3. The limiting resistor R, return switch RET, timing pulse generator TPG, counter C ₁ and switching circuit SC all have the same roles and connections as in FIG. ROM2 is a static storage device that stores stitch control signals;
ROM2 is adapted to be addressed by an up-down counter C2. Each input terminal of the counter C2 is connected to a normal pattern sewing address storage device NAM for determining the counting start point of the counter (the address of the first stitch of the pattern) for normal pattern sewing, and a counter for back stitching. Each is connected to a back stitch address storage device BAM for determining the starting point (for normal patterns, the address of the last stitch of the pattern), and these storage devices NAM and BAM are connected to a latch circuit L.
3, the encoded signals of the pattern selection switches _S1 to _S8 are received, and as will be described later, either one of these outputs operates effectively for the counter C2 according to designation.
The output side of the NAND circuit NA14 is the counter C.
Sewing is controlled by the signal of the positive side output Q, which is connected to the load terminal L of No. 2 and generates a monostable circuit MM3 when any of the pattern selection switches _S1 to _S8 is operated. Load the count starting point at the beginning, and static storage ROM
When one unit of sewing pattern 2 is completed and a specific signal (code 11111) is received for repetition
A gate is formed to form the first stitch by initiating a count in stitch repetition via NAND circuit NA15. The static storage device ROM2 stores the specific signal (code 11111) for each pattern in the storage device before the signal for the first stitch and the storage location after the signal for the last stitch.
It is memorized by intervening. The normal and back stitch address storage devices NAM and BAM are connected to the positive side and negative side outputs Q of the flip-flop circuit F/F and each chip select terminal C _S , respectively, and the return switch RET is used to determine whether normal pattern stitch or back stitch is to be sewn. Depending on the selection, one of them can be selectively activated. The counter C2 has a count up terminal up connected to an AND circuit A4 receiving the output Q of the monostable circuit MM4 which operates at the rising edge of the timing pulse generator TPG and the positive output Q of the flip-flop circuit F/F, and the count down terminal up. DN receives the positive side output Q of the monostable circuit MM5, which operates on the rising edge of the delay circuit, and the negative side output of the flip-flop circuit F/F, via the delay circuit TD3, which operates on the falling signal of the timing pulse generator TPG. It is connected to the AND circuit A5. The load terminal L of the counter C1 is connected to the output terminal of the NAND circuit NA13, and one input terminal of the NAND circuit receives the positive output Q of the flip-flop circuit F/F and the inverted signal of the timing pulse generator TPG. It is connected to the output terminal of the NAND circuit NA11. A monostable circuit that receives the negative output of monostable circuit MM5 and operates on its falling edge.
In MM6, the positive output Q is connected to the first input terminal of the NAND circuit NA12 and the input in of the delay circuit TD4, and the negative output of the delay circuit is connected to the NAND circuit NA.
12, and the positive side output Q
is connected to the first input terminal of AND circuit A6,
The negative output of the flip-flop circuit F/F is
It is connected to the second input terminal of the NAND circuit NA12 and the AND circuit A6, and the negative output of the monostable circuit MM6 is connected to the third input terminal of the AND circuit A6, and the output terminal becomes the count up terminal up of the counter C1. It is connected to the.

In the configuration shown in FIG. 7 described above, the pattern selection switches S ₁ to 1 are operated without operating the return switch RET.
When any one of _S8 is turned on, the encoded signal is latched by the latch circuit L3, and at that time, the normal pattern sewing address memory device NAM is enabled and the selected normal pattern sewing is started. Specify the starting position on counter C2,
The load terminal L of the counter receives and loads the signal from the NAND circuit NA5, and provides an address signal for the first stitch to the static storage device ROM2.
Thereafter, each time the needle rises, the count-up terminal UP receives the signal via the monostable circuit MM4 and the AND circuit A4, and counts up, and outputs the amplitude control signal from the output signal of the static storage device ROM2, which is advanced each time. To the extent that the needle is on the cloth, the latch circuit L2 latches and applies it to the swing drive controller BD. Regarding the cloth feed control signal, when the needle is in the cloth, the counter C1 is loaded via the NAND circuits NA11 and NA13, and the switching circuit SC is loaded.
Since the AND (see FIG. 6) side of the AND circuit is selected, the output signal of the static storage device ROM2 is directly applied to the feed drive control device FD. Next, if the return switch RET is turned on and held while the sewing machine is rotating or once the sewing machine is stopped, the pattern control signal in the static storage device ROM2 is applied when the needle enters the cloth for the first time, that is, before operating the switch. Therefore, at the falling edge of the timing pulse generator TPG when forming the last stitch, the flip-flop circuit F/F is inverted. The last stitch is determined by the needle swing width control data O ₁₂ - out of the output of the static storage device ROM2 output at the rising edge before the falling edge.
This is based on the signal outputted to the amplitude drive device BD at the time of the rise of _O16 . Cloth feed data O ₇
Regarding ~ _O11 , at the subsequent falling edge, that is, at the above-mentioned inversion of the flip-flop circuit F/F, the signal at its negative output terminal makes the back stitch address memory device BAM valid, and from then on, the counter C2 sends a signal to the load terminal L. When the specified data is received, the designated data of the storage device is loaded. Subsequently, the delay circuit TD3 operates to count down the counter C2 via the monostable circuit MM5 and the AND circuit A5, and the static storage device ROM2 is used for back stitching in the same way as when the NAND circuit NAND4 outputs in FIG. The output signal is set as a signal one stitch before the last stitch in normal pattern sewing. Monostable circuit at the same time
MM6 operates, and the operation signal and the negative side output signal before the delay circuit TD4 operates are connected to the NAND circuit NA.
12, Load the signal before the 1st stitch as the counter C1 via NA13, and continue to the delay circuit.
The output signal of TD4 is passed through AND circuit A6 to the sixth
As in the figure, the counter C1 is incremented by 1, and at this time, as shown in Fig. 6, the switching circuit SC is on the NOR side of the NOR circuit, so the feed drive control device FD is turned in the opposite direction before the first stitch in forward sewing. Send. Thereafter, the back stitches follow the pattern stitches in the same way, and when they reach the first stitch in the normal pattern stitches, a specific signal (code 11111) is read out, and the counter C2 outputs the signal from the load terminal L at this time. Then, load the output data of the back stitch address storage device BAM,
That is, the last stitch for normal pattern stitching is designated, and back stitching is subsequently repeated. When the hold on the return switch RET is released, the flip-flop circuit F/F is reversed at the falling edge of the timing pulse generator TPG and the normal pattern sewing is performed by tracing the back stitch. It is something. In addition to locking stitches, it is also possible to perform regular pattern stitches and reverse pattern stitches.

As described above, the present invention uses an electronic control circuit to operate the operation switch for backstitching, so that the tacking stitches are formed by reliably following the normal pattern seams. It enables aesthetically excellent tacking stitches that do not collapse, and even if the tacking stitches change to normal stitching due to such operations, the pattern does not become distorted, and furthermore, It exhibits extremely excellent functions, such as pattern stitching and reverse pattern stitching that can be easily performed by simply operating a switch, and is a highly effective invention in industrial practice.

[Brief explanation of the drawing]

Figures 1 and 2 show tacking stitches that can be considered with a conventional sewing machine, and Figure 1 shows how to tack the tacking stitches using a pre-memorized swing width and feed pitch. This is used to sew, and Fig. 2 shows tacking stitches with a fixed swing width and a fixed reverse pitch. Fig. 3 shows a pattern of tacking stitches formed by the device of the present invention, and Fig. 4 shows a pattern of tacking stitches formed by the device of the present invention, and Fig. 4 shows a pattern of the tacking stitches of the present invention when transitioning from normal stitching to tacking stitches, and from tacking stitches to normal stitching. FIG. 5 shows the coordinates of each step of the seam in the embodiment of the present invention, and FIG. 6 is an example for convenience in explaining FIG. 7 as an embodiment of the present invention. control circuit, 7th
The figure shows a control circuit according to an embodiment of the present invention. In the figure, the swinging width drive device BD and cloth feed drive device FD are the main elements of the pattern forming device, ROM ₂ is the static storage device, TPG is the timing pulse generator, return switch RET is the operating section, and D-type flip-flop circuit F/ F is the main element of the switching means, pattern selection switches S ₁ to _{S 2} are the main elements of the pattern selection device,
NAM is a normal pattern stitch address storage device, BAM is a back stitch address storage device, C ₂ is an up-down counter, NAND circuit NA ₁₄ is the main element of the loading means, switching circuit SC, and counter circuit C ₁ are the main elements of the conversion means. be.

Claims (1)

[Scope of Claims] 1. A pattern forming device that forms a pattern by stitches by alternately controlling the needle swing width and cloth feed, and each stitch control of a plurality of stitch patterns as a signal for operating the pattern forming device. A storage device that electronically stores signals, and each stitch control signal read out as the address progresses corresponds to the progression of each consecutive stitch, and also controls the stitch of the first stitch of each stitch pattern. A static storage device in which a signal read before the signal and a signal read after the stitch control signal of the last stitch each constitute a specific signal for specifying that the stitch pattern is repeatedly formed. and generating a synchronizing signal at two different phases of rotation of the upper shaft of the sewing machine, reading out a stitch control signal from the static storage device, and controlling the timing and the stitch control signal to cause the pattern forming device to adjust each predetermined timing to each of the two phases. a timing pulse generator that determines the timing for bringing about the alternating control in correspondence with each other; an operating section that switches and specifies between normal pattern stitching and back stitching; switching means for determining the designation of sewing, storing the determination result in a switching phase corresponding to the cloth feed control of the two phases following the operation, and retaining the determination result until a new operation is performed thereafter; a pattern selection device that selects a desired pattern from the plurality of patterns by operation and generates a unique code signal for each of the patterns; a normal pattern sewing address storage device that outputs an address signal for reading a stitch control signal for the first stitch of the pattern for a period during which the switching means determines and stores the designation of the normal pattern sewing; An address signal for reading out a stitch control signal for the last stitch of the pattern from the static storage device based on a signal from the pattern selection device is transmitted during a period in which the switching means determines and stores the back stitch designation. a backstitch address storage device that outputs a backstitch address over a period of time, and the synchronization that occurs in a phase corresponding to needle swing width control of the two phases over a period in which the switching means discriminates and stores the designation of the normal pattern stitching. generation of the synchronization signal that occurs in a phase corresponding to cloth feed control of the two phases over a period in which the count is advanced each time the signal is generated and the designation of back stitching is determined and stored; an up-down counter whose count is incremented each time, and these count values increment the address of the static storage device corresponding to the forward movement and the backward movement; and an operation signal of the pattern forming device or the static storage device. loading means for loading an address signal output from the normal pattern stitching address storage device or the back stitching address storage device into the up-down counter when receiving the specific signal read from the device; and the cloth feed control. and converting means for converting data so that when the switching means specifies back stitching, the pattern forming device reverses the cloth feeding direction and performs a corresponding operation for each stitch control signal.