JPS61239620A - Plasma chemical vapor deposition (cvd) device - Google Patents
Plasma chemical vapor deposition (cvd) deviceInfo
- Publication number
- JPS61239620A JPS61239620A JP8017085A JP8017085A JPS61239620A JP S61239620 A JPS61239620 A JP S61239620A JP 8017085 A JP8017085 A JP 8017085A JP 8017085 A JP8017085 A JP 8017085A JP S61239620 A JPS61239620 A JP S61239620A
- Authority
- JP
- Japan
- Prior art keywords
- plasma
- substrate
- film
- mask
- cvd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明はプラズマCVD装置にかかわり、特に界面部分
の制御性と再現性の優れた半導体膜i の形成に
好適なプラズマCVD装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a plasma CVD apparatus, and particularly to a plasma CVD apparatus suitable for forming a semiconductor film i with excellent controllability and reproducibility of an interface portion.
従来のプラズマCVD装置は、ドーピングプロフィル制
御の目的で、p型、n型および真性の各半導体層をそれ
ぞれ分離された反応室内で形成するようになっていた。In conventional plasma CVD apparatuses, p-type, n-type, and intrinsic semiconductor layers are formed in separate reaction chambers for the purpose of doping profile control.
この麺の装置としては1例えば桑野らの’ Prepa
ration and Pro−pertiea of
Amorphous 5ilicon Produc
ed by ”(a Con5ecutiv
e * 5eparated Reaction Ch
amberMethod ’ : Japanese
Journal of Applied Ph−ysi
ca * Vol、 21 r No、3 + p41
5なる文献に記・載された装置などが挙げられる。しか
し、従来の装置では、各半導体層間の界面部分の形成に
ころであるにもかかわらず、従来法によれば放
□\はなんらの配慮もなされていなかった。従って、各
半導体層の界面は接合形成にとって重要なと電開始直後
および放電停止時の特異な条件下で形成されるため、構
造的にも物性的にも内部とは異なったものとなり、界面
の制御は困難であった。As a device for this noodle, for example, Kuwano et al.'s 'Prepa'
ration and pro-perty of
Amorphous 5ilicon Product
ed by ”(a Con5ecutiv
e * 5eparated Reaction Ch
amberMethod' : Japanese
Journal of Applied Ph-ysi
ca * Vol, 21 r No, 3 + p41
Examples include devices described and described in the document No. 5. However, although the conventional equipment is difficult to form the interface between each semiconductor layer, the conventional method
No consideration was given to □\. Therefore, since the interface between each semiconductor layer is formed under unique conditions, which are important for junction formation, immediately after the start of the discharge and when the discharge is stopped, the interface between the semiconductor layers becomes structurally and physically different from the inside. Control was difficult.
本発明の目的は、プラズマCVDによって半導体の接合
を形成する際、界面を各層内部とあまり異ならない条件
下で形成することが可能なプラズマCVD装置を提供す
ることにある。An object of the present invention is to provide a plasma CVD apparatus that can form a semiconductor junction by plasma CVD under conditions that do not significantly differ from those inside each layer at the interface.
界面部分を各層内部とあまり異ならない条件下で形成す
るためには、放電開始後からプラス11. マ
内の化学反応が定常状態となるまでの間は成膜しないよ
うにし、かつ放電終了より前に成膜を停止すればよい。In order to form the interface portion under conditions that are not very different from those inside each layer, it is necessary to increase the temperature by +11. It is sufficient that the film formation is not performed until the chemical reaction within the battery reaches a steady state, and that the film formation is stopped before the end of the discharge.
そのためには、基板をプラ11゜ズマから遮断する移動
可能なマスクを設け、このマスクでプラズマ内の化学反
応が定常状態になるまで基板を覆っておいて、定常状態
になってから開くようにし、また放電を停止する前に再
び基板を覆うようにすればよい。本発明はこl。To do this, a movable mask is provided that isolates the substrate from the 11° plasma, and this mask covers the substrate until the chemical reaction in the plasma reaches a steady state, and then opens. , and the substrate may be covered again before stopping the discharge. This invention is here.
の点に着目してなされたもので、プラズマ中の活性種を
計測する分析手段と、該分析手段からj の信号
により動作して基板をプラズマから遮断する基板マスク
とを設け、上述のマスク動作を行わせるようにしたもの
である。 、1゜プラズマ内の化学反応が
定常状態になった時点の検出には、プラズマ発光分析や
CAR8のようにプラズマの状態を逐次モニタできる手
法が望ましい。定常状態の判定は、プラズマ内の反応で
生じた化学種からの信号強度を測定し、(1)信号強度
がある値を越えたとき、(11)信号強度の時間微分が
0となったとき、0巾複数の化学種からの信号を測定し
て、強度の相対比が一定値となったとき、これを計測し
その結果によって定常状態を判定する方法を用いて行う
ことかで・。This method was developed with a focus on the above points, and includes an analysis means for measuring active species in plasma and a substrate mask that is operated by a j signal from the analysis means to shield the substrate from the plasma. It is designed to make the user perform the following steps. , 1° To detect when the chemical reaction within the plasma reaches a steady state, it is desirable to use a method that can successively monitor the state of the plasma, such as plasma emission spectroscopy or CAR8. Steady state is determined by measuring the signal intensity from chemical species generated by reactions within the plasma, and (1) when the signal intensity exceeds a certain value, (11) when the time derivative of the signal intensity becomes 0. , by measuring signals from multiple chemical species, measuring when the relative ratio of intensities reaches a constant value, and determining a steady state based on the results.
きる。Wear.
基板マスクの材料としては、プラズマの安定性を保つた
めに絶縁物が望ましく、ガラス、石英r 811N4
+ SiCrアルミナ等のセラミックス材料が耐熱性も
あり適している。The material for the substrate mask is preferably an insulator to maintain plasma stability, such as glass or quartz R811N4.
+ Ceramic materials such as SiCr alumina are suitable because of their heat resistance.
以下、本発明の一実施例としてプラズマ発光分析を用い
てプラズマ内の化学反応をモニタし、基板マスクを制御
した例について述べる。Hereinafter, as an embodiment of the present invention, an example will be described in which a chemical reaction in plasma is monitored using plasma emission spectrometry and a substrate mask is controlled.
本実施例の構成を第1図に示す。図において、プラズマ
CVD装置1には石英窓2を設け、これを通して装置外
に出てきたプラズマ発光3をレンズ4で集光し、その光
をグレーティング5で分光した後、これをデテクタ6で
受けて電気信号に変える。ついで、この電気信号を増幅
器゛7で増幅した後、これをA−D変換器8でデジタル
信号にし、その信号を電子計算機9に入力して信号の解
析を行い、その結果により基板マスク動力10を動作さ
せ、石英製の基板マスク11を基板12から外す。そし
て、一定時開成膜を行11っ−た稜、基板マスク11を
基板12にかぶせて成膜を終了させ、さらに放電を停止
する。なお、図中、符号13は高周波電源、14はガス
供給系を示す。The configuration of this embodiment is shown in FIG. In the figure, a plasma CVD apparatus 1 is provided with a quartz window 2. Plasma emission 3 coming out of the apparatus through this is collected by a lens 4, and after the light is separated by a grating 5, it is received by a detector 6. and convert it into an electrical signal. Next, this electrical signal is amplified by an amplifier 7, converted into a digital signal by an A-D converter 8, and input into a computer 9 to analyze the signal. Based on the results, the substrate mask power 10 is is operated to remove the quartz substrate mask 11 from the substrate 12. Then, the substrate mask 11 is placed over the substrate 12 on the edge where the film is formed for a certain period of time, and the film formation is completed, and the discharge is further stopped. In addition, in the figure, the code|symbol 13 shows a high frequency power supply, and 14 shows a gas supply system.
次に、本実施例の装置を用いた場合の電子計1へ算機に
よる情報処理のアルゴリズムの例を、プ。Next, an example of an algorithm for information processing by a computer in the electronic meter 1 when using the apparatus of this embodiment will be described.
ラズマCVD法で作られる代表的な半導体であるアモル
ファスシリコンの成膜の場合を例とし。Let us take as an example the case of film formation of amorphous silicon, which is a typical semiconductor produced by the plasma CVD method.
て、第2図により説明する。アモルファスシリコンは、
モノシランガスをプラズマ中で分解し1.(活性種にし
て、200℃前後に加熱された基板上 7に析出
させて作られる。そのとき、プラズマか ざ、3
らの発光は、モノシランの分解で生シタ5iH(“、f
z42on09、H(e * 655nm )、H2,
80、:こ、゛
St %SiH等からのものである。そこで、特に・
・、強度の高いSiHとHからの発光である4
20nmと655nmの光に注目し、定常状態の判定を
行った。This will be explained with reference to FIG. Amorphous silicon is
Decomposing monosilane gas in plasma 1. (It is made by precipitating it as an active species on a substrate heated to around 200°C. At that time, the light emitted from the plasma beam 3 is generated by the decomposition of monosilane.
z42on09, H(e*655nm), H2,
80: This is made from ゛St%SiH, etc. Therefore, especially
・Emission from SiH and H with high intensity 4
Steady state was determined by focusing on light of 20 nm and 655 nm.
定常状態は、420nmの光の強度の時間変化が毎秒全
強度の10チ以下となり、かつ655nmの光と420
nmの光の強度比が4:1より大きいといつ、・1条件
で判定した。このときの成膜条件は、圧力15.5Pa
、高周波出力80W、モノシランガス流量S CCms
基板温度200℃であった。なお、判定条件は成膜条件
により異なり、従ってあらかじめ同じ条件でプラズマ反
応を観測し、それぞれ1゜の条件に合わせてそれぞれの
発光強度の比を設定する必要がある。In a steady state, the time change in the intensity of 420 nm light is less than 10 degrees of the total intensity per second, and the intensity of 420 nm light and 420 nm light are
When the intensity ratio of the nm light was greater than 4:1, it was judged under the 1 condition. The film forming conditions at this time were a pressure of 15.5 Pa.
, high frequency output 80W, monosilane gas flow rate S CCms
The substrate temperature was 200°C. Note that the determination conditions differ depending on the film formation conditions, and therefore it is necessary to observe the plasma reaction in advance under the same conditions and set the ratio of the respective emission intensities in accordance with the 1 degree condition.
上記判定条件を満足すれば、マスクを基板から外す命令
が出され、成膜を開始し、同時に時間を計測し始める。If the above judgment conditions are satisfied, a command is issued to remove the mask from the substrate, film formation is started, and time measurement begins at the same time.
そして、所定の時間が経過1.。Then, a predetermined time elapses 1. .
すると、マスクを閉じ、成膜を停止し、ついで放電を止
める。Then, the mask is closed, film formation is stopped, and then the discharge is stopped.
なお、本実施例によれば、界面部のみならず、膜厚の制
御を正確にする効果も得られる。Note that, according to this embodiment, it is possible to obtain the effect of accurately controlling not only the interface portion but also the film thickness.
本発明によれば、プラズマCVDによって成膜を行うに
際し、基板上に形成された膜中に、プラズマ内の化学反
応が定常状態以外の条件で成膜される成分が含まれるこ
とんないので、各層中の均一性が高まり、特に層間の界
面部分の、、。According to the present invention, when forming a film by plasma CVD, the film formed on the substrate does not contain components that are formed under conditions other than the steady state of the chemical reaction in the plasma. Uniformity within each layer increases, especially at the interface between layers.
物性、特性の再現性、制御性を高めるという効果が得ら
れる。The effect of improving the reproducibility and controllability of physical properties and characteristics can be obtained.
第1図は本発明によるプラズマCVD装置の一実施例の
構成図、第2図は該実施例の装置を1用いた場合の成膜
制御のアルゴリズムの一例を示す流れ図である。
、 >−y’5XwcVD装置・2・・・石英窓
、 3・・・プラズマ発光、4・・・レンズ、
5山グレーテイング、6・・・デテクタ、
7・・・増幅器、8・・・A−D 変換器、
9・・・電子計算機、10・・・基板マスク動力、11
・・・基板マスク、12・・・基板、 13・
・・高周波電源、14・・・ガス供給系、。FIG. 1 is a block diagram of an embodiment of a plasma CVD apparatus according to the present invention, and FIG. 2 is a flowchart showing an example of a film deposition control algorithm when one of the apparatuses of the embodiment is used. , >-y'5XwcVD device・2...Quartz window, 3...Plasma emission, 4...Lens,
5-mounted grating, 6...detector,
7...Amplifier, 8...A-D converter,
9...Electronic computer, 10...Substrate mask power, 11
...Substrate mask, 12...Substrate, 13.
...High frequency power supply, 14...Gas supply system.
Claims (1)
れた基板台、および原料ガス供給系からなるプラズマC
VD装置であって、プラズマ中の活性種を計測する分析
手段と、該分析手段からの信号により動作して基板をプ
ラズマから遮断する基板マスクとを設けたことを特徴と
するプラズマCVD装置。 2、プラズマ中の活性種を計測する分析手段がプラズマ
発光分析装置であることを特徴とする特許請求の範囲第
1項に記載のプラズマCVD装置。[Claims] 1. Plasma C consisting of a vacuum container for performing vacuum discharge, a substrate stand provided inside the container, and a raw material gas supply system.
1. A plasma CVD apparatus comprising: an analysis means for measuring active species in plasma; and a substrate mask operated by a signal from the analysis means to shield a substrate from the plasma. 2. The plasma CVD apparatus according to claim 1, wherein the analysis means for measuring active species in the plasma is a plasma emission spectrometer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8017085A JPS61239620A (en) | 1985-04-17 | 1985-04-17 | Plasma chemical vapor deposition (cvd) device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8017085A JPS61239620A (en) | 1985-04-17 | 1985-04-17 | Plasma chemical vapor deposition (cvd) device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61239620A true JPS61239620A (en) | 1986-10-24 |
Family
ID=13710853
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8017085A Pending JPS61239620A (en) | 1985-04-17 | 1985-04-17 | Plasma chemical vapor deposition (cvd) device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61239620A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01205520A (en) * | 1988-02-12 | 1989-08-17 | Shimadzu Corp | Film-formation apparatus |
US5665167A (en) * | 1993-02-16 | 1997-09-09 | Tokyo Electron Kabushiki Kaisha | Plasma treatment apparatus having a workpiece-side electrode grounding circuit |
US9528254B2 (en) | 2009-11-17 | 2016-12-27 | Shanghai Kohler Electronics, Ltd. | Injection member assembly |
US9551140B2 (en) | 2009-11-17 | 2017-01-24 | Shanghai Kohler Electronics, Ltd. | Dryer component |
-
1985
- 1985-04-17 JP JP8017085A patent/JPS61239620A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01205520A (en) * | 1988-02-12 | 1989-08-17 | Shimadzu Corp | Film-formation apparatus |
US5665167A (en) * | 1993-02-16 | 1997-09-09 | Tokyo Electron Kabushiki Kaisha | Plasma treatment apparatus having a workpiece-side electrode grounding circuit |
US9528254B2 (en) | 2009-11-17 | 2016-12-27 | Shanghai Kohler Electronics, Ltd. | Injection member assembly |
US9551140B2 (en) | 2009-11-17 | 2017-01-24 | Shanghai Kohler Electronics, Ltd. | Dryer component |
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