JPS61224687A - Videotex terminal equipment - Google Patents

Videotex terminal equipment

Info

Publication number
JPS61224687A
JPS61224687A JP60065322A JP6532285A JPS61224687A JP S61224687 A JPS61224687 A JP S61224687A JP 60065322 A JP60065322 A JP 60065322A JP 6532285 A JP6532285 A JP 6532285A JP S61224687 A JPS61224687 A JP S61224687A
Authority
JP
Japan
Prior art keywords
brightness
display
semi
register
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60065322A
Other languages
Japanese (ja)
Inventor
Kuniaki Satou
晋亮 佐藤
Akira Kubota
晃 窪田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60065322A priority Critical patent/JPS61224687A/en
Publication of JPS61224687A publication Critical patent/JPS61224687A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make characters and graphic forms visible by providing a function executing rewrite processing of contents in a video RAM, where semi-brightness display information is stored, to total brightness information through user's operation of an operable switch. CONSTITUTION:One logical picture element 4 of display information transmitted through a videotex communication network is magnified into an area 6 of four pixels on a display plane, and a character pattern is displayed at semi brightness. Through a key input a processor reads out display information of one byte (8 bits) unit from each display plane and writes it on a register 8, where semi-brightness data is set as figure (a) shows. A CPU shifts said data to a left side by one bit, and writes it on a register 9. Then an ALU adds contents in the registers 8 and 9, and stores the added result in the register 8. Said operations are executed at every plane. As a result, the semi-brightness data is converted into the total brightness data, which is displayed in accordance with the key input.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はビデオテックス端末装aK関し、特に半輝度色
を含む画像情報に対してそれを表示する表示装置が半輝
度の表示能力を本来備えていない表示処理装置に関する
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a Videotex terminal equipment aK, in particular a display device that displays image information including half-brightness color, which inherently has a half-brightness display capability. It relates to a display processing device that does not.

〔従来の技術〕[Conventional technology]

従来、ビデオテックス端末装置においては、N色の表示
能力しか持たない表示装置に対して、N色に加えそれぞ
れの半輝度色の表示を行う方法として、表示情報の論理
的1ドツトを表示面の複数のドツト(ピクセル)に対応
させ、その半数のピクセルを輝点とし、残る半数のピク
セルを暗点とする方法(タイリング法)をとっていた。
Conventionally, in Videotex terminal equipment, as a method for displaying each half-brightness color in addition to N colors on a display device that only has the display capability of N colors, one logical dot of display information is placed on the display surface. A method (tiling method) was used in which multiple dots (pixels) were used, with half of the pixels being bright spots and the remaining half being dark spots.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述したタイリング法では、表示バタンか細い場合に連
続した線状バタンの見かけ上の幅が表示情報と異なって
見えたり、バタンか切断して見えることがらシ、特に小
型の文字を表示すると、読めないことがあった。
With the above-mentioned tiling method, if the display button is thin, the apparent width of the continuous linear button may appear different from the display information, or the button may appear cut off. Especially when displaying small characters, it may be difficult to read. There were times when it wasn't.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のビデオテックス端末装置は、利用者が操作可能
なキースイッチを操作することによって半輝度表示情報
がストアされているビデオRAMの内容を全輝度情報に
8き換える処理を実行させ 。
The Videotex terminal device of the present invention allows a user to execute a process of converting the contents of a video RAM in which half-brightness display information is stored into full-brightness information by operating a key switch that can be operated by the user.

る機能を設けたことを特徴とするO 〔実施例〕 次に、本発明の一実施例について図面を参照して説明す
る。
Embodiment Next, an embodiment of the present invention will be described with reference to the drawings.

第1図は装置の構成であって、処理装置1は利用者によ
るキーボード2の操作によって表示装置3に表示してい
る画像情報の全てを後述する手段によ)全輝度色にして
再描画できる。第3図は表示メモリ(ビデオRAM)の
構造であってG、R。
FIG. 1 shows the configuration of the device, in which the processing device 1 can redraw all the image information displayed on the display device 3 in full brightness color by the user's operation of the keyboard 2 (by means described later). . FIG. 3 shows the structure of the display memory (video RAM).

B3つの表示ブレーンを有し、それぞれ第1プレーン、
第2プレーン、第3プレーンと呼ぶ。表示色は各ブレー
ンの同一アドレス上の内容によシ決定される。
B has three display planes, each with a first plane,
They are called the second plane and the third plane. The display color is determined by the content on the same address of each brane.

第4図は第3図の各ブレーンのうち1つを取シ出したも
ので、処理装置は各表示プレーン7から1バイト(8ビ
ツト)単位の表示情報の読み出しこれをレジスタ8に書
き込む。レジスタ8には半輝度データが第5図(a)の
ようにセットされる。CPUaこれを1ビツト左ヘシフ
トしてレジスタ9へ書込む。そして、レジスタ8とレジ
スタ9の内容をALUで加算して結果をレジスタ8ヘス
ドアする。すなわち、表示プレーンから読み出した1バ
イトのデータをdとする゛と、dとバイナリパタン01
010101とのビット積をd′、全輝度への変換後の
データをfとすれば f=d’V (d’ X 2 ) である。但し、■Lビット毎の論理和、d/x2はd′
を1ビツト左ヘシフトする演算を示す。この変換は表示
装置のラスク番号が奇数である場所に適用し、ラスク番
号が偶数の位置では、dとバイナリパタン101010
10とのビット棟をd”として f:d″V(d“/2) を適用する。
FIG. 4 is an excerpt of one of the brains shown in FIG. Half brightness data is set in the register 8 as shown in FIG. 5(a). CPUa shifts this one bit to the left and writes it to register 9. Then, the contents of register 8 and register 9 are added by the ALU and the result is stored in register 8. In other words, if 1 byte of data read from the display plane is d, then d and binary pattern 01
If the bit product with 010101 is d', and the data after conversion to full brightness is f, then f=d'V (d' X 2 ). However, ■The logical sum for each L bit, d/x2, is d'
This shows an operation for shifting 1 bit to the left. This transformation is applied to locations where the rask number of the display device is odd, and where the rask number is even, d and the binary pattern 101010
Apply f:d″V(d″/2) with the bit ridge with 10 as d″.

但しd”/2はd“を1ビツト右ヘシフトする演算をす
ればよい。
However, d''/2 can be calculated by shifting d'' by 1 bit to the right.

以上の操作が各ブレーン毎に実行される。この結果、キ
ー人力に応答して、CPLIが前述のレジスタ操作を実
行するととKよって、半輝度データを全輝度データに変
換して表示できる。
The above operations are executed for each brane. As a result, when the CPLI performs the register operations described above in response to key input, half-brightness data can be converted to full-brightness data and displayed.

第6図は処理フローを示す図である。FIG. 6 is a diagram showing the processing flow.

〔発明の効果〕〔Effect of the invention〕

第2図は表示ドツトの対応関係を示し、4はビデオテッ
クス通信網を介して伝送されてくる表示情報の1論理画
素、これは表示面上では5に対応する4ビクセルの領域
に拡大され、第2図aの文字パタンを半輝度表示させた
表示装置上の各ビクセルの状態は同図すに示すようにな
る。本発明は、かかる半輝度表示によシネ明確なパター
ンが現れた場合これをキー人力によって全輝度にするこ
とにより、文字や図形を、見やすくすることができる。
FIG. 2 shows the correspondence of display dots, where 4 is one logical pixel of display information transmitted via the Videotex communication network, which is expanded to a 4-pixel area corresponding to 5 on the display screen. The state of each pixel on a display device displaying the character pattern shown in FIG. 2A at half brightness is as shown in FIG. According to the present invention, when a clear pattern appears in such a half-brightness display, it is possible to make characters and figures easier to see by manually increasing the brightness to full brightness.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の装置構成ブロック図、第2
図はタイリング法による表示例を示す図、第3図は実施
例の装置構成に於ける画像記憶回路の構成図、第4図は
全輝度による再描画の処理単位を示す説明囚、第5図は
全輝度変更の状態図、第6図は全輝度再抽画処理の流れ
図である。 1・・・・・・処理装置、2・・・・・・キー・スイッ
チ、3・・・・・・表示装置、4・・・・・・論理画素
、5・・・・・・論理画素に対応する表示領域、6・・
・・・・最小表示単位(ビクセル)、7・・・・・・表
示フレン、8,9・・・・・・レジスタ。 1++  1   7−+  、     4  − 
      、/、−〜。 第 / 図 第2図 第、3図 第4図 第6図
FIG. 1 is a block diagram of an apparatus configuration according to an embodiment of the present invention, and FIG.
The figure shows a display example using the tiling method, Figure 3 is a configuration diagram of the image storage circuit in the device configuration of the embodiment, Figure 4 is an explanatory diagram showing the processing unit of redrawing with full brightness, and Figure 5 The figure is a state diagram of changing the total brightness, and FIG. 6 is a flowchart of the full brightness re-extracting process. 1...Processing device, 2...Key switch, 3...Display device, 4...Logic pixel, 5...Logic pixel Display area corresponding to 6...
...Minimum display unit (pixel), 7...Display frame, 8,9...Register. 1++ 1 7-+, 4-
, /, -~. Figure / Figure 2, Figure 3, Figure 4, Figure 6

Claims (1)

【特許請求の範囲】[Claims] 利用者からのキー操作に応答して画像記憶回路の半輝度
表示データを全輝度表示データに変換する機能を設けた
ことを特徴とするビデオテックス端末装置。
1. A Videotex terminal device comprising a function of converting half-brightness display data of an image storage circuit into full-brightness display data in response to a key operation from a user.
JP60065322A 1985-03-29 1985-03-29 Videotex terminal equipment Pending JPS61224687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60065322A JPS61224687A (en) 1985-03-29 1985-03-29 Videotex terminal equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60065322A JPS61224687A (en) 1985-03-29 1985-03-29 Videotex terminal equipment

Publications (1)

Publication Number Publication Date
JPS61224687A true JPS61224687A (en) 1986-10-06

Family

ID=13283554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60065322A Pending JPS61224687A (en) 1985-03-29 1985-03-29 Videotex terminal equipment

Country Status (1)

Country Link
JP (1) JPS61224687A (en)

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