JPS61219997A - Voice synthesizer control system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention enables the generation of arbitrary words with a small amount of information,
The present invention relates to a speech synthesizer control method that improves the naturalness of speech by making it possible to arbitrarily set the generation time of a single syllable.

[Background of the invention]

Speech synthesis using the linear predictive analysis synthesis method stores speech information data obtained through language analysis in a speech-only memory, reads out the speech information data from the speech-only memory according to instructions from a microcomputer, and uses it in a digital filter. The synthesized voice is produced by applying the signal to the speaker via a digital-to-analog converter and an amplifier. The audio information data consists of signals representing the sound source pitch (pitch frequency) of the language, the reflection coefficient O, which is a coefficient of a digital filter, and the volume.
- stored in memory (only memory).

As a control method for voice synthesis of a voice generator using this basic voice synthesis, the method disclosed in Japanese Patent Application Laid-Open No. 18698/1980 is based on the information on each parameter of each element (syllable) of a language, that is, the voice information. data)1. OM (d
It is known that the data is stored in a read-only memory (read-only memory) and inputted to a speech synthesis LSI via a RAM (random read/write memory) in accordance with instructions from a micro combinator. According to this method, monosyllabic voice information data is stored in the OM, rearranged on the RAM according to the order of desired words to be generated, and then transferred to the voice stand F! ! Any word can be uttered by transmitting to the tLSI.

However, according to this method, all the repeated portions of audio information data must be prepared in RAM, which requires a large amount of
1, AM is required, and the burden on the microprocessor becomes large. In addition, this kind of synthesis by so-called syllable editing has the disadvantage that the pitch frequency and length of the syllables stored in the OM are fixed, so the utterance as a word becomes extremely unnatural. It is known that the naturalness of word pronunciation is due to (1) smooth changes in pitch frequency throughout the word, and (2) distribution of the length of each syllable.However, Conventionally, no consideration was given to this point.

[Purpose of the invention]

An object of the present invention is to solve the above-mentioned drawbacks of the prior art, connect a speech synthesizer to a microcombiner, make it possible to pronounce any word with a small memory capacity, and make it possible to pronounce one syllable in a timely manner. By allowing the pitch frequency parameters to be set arbitrarily and by connecting the pitch frequency parameters smoothly, vocalization can be made more naturally, and the burden on the voice synthesis processing of the microprocessor of the talented microcombi processor can be reduced. The present invention provides a speech synthesizer control method.

[Summary of the invention]

In order to achieve this object, the present invention provides an interface circuit between a microprocessor and a speech synthesis LSI, which is a speech synthesizer, using two sets of shift registers, counters,
It consists of a programmable counter, a control circuit, and a data switching circuit, and divides the audio information data given to the audio synthesis LSI into pitch frequency data and data other than pitch frequency data, that is, signal data representing reflection coefficient and volume. The pitch frequency change rate is set in each of the two shift registers, the pitch frequency change rate is set in a programmable counter, and the pitch frequency change rate is set in a counter that indicates the number of repetitions of the same voice information data. , the number of times the microprocessor transmits the audio information data is reduced by transmitting the audio information data to the audio stand M, LsI while changing the pitch frequency data by the number of repetitions of the same audio information data set in the counter; Another feature is that the utterance time of one syllable can be arbitrarily set by the value set in the counter, so that the utterance can be made more naturally.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

The speech synthesis LSI used as a speech synthesizer in the embodiments of the present invention is of the well-known PARCOR system.
If audio information data is given every frame period (10 to 20 m5ec), it is possible to synthesize audio between frame periods, and the amount of audio information data at this time is usually 4
It is an 8-96 bit Z frame.

FIG. 1 is a block diagram showing an embodiment of the speech synthesizer control method according to the present invention, where 1 is a microprocessor %
2 is a speech synthesis LSI (hereinafter referred to as a speech synthesis LSI) as a speech synthesizer, 3 is a speech synthesizer interface circuit (hereinafter referred to as an interface circuit), and 4 is a RAM.
, 5 is a ROM.

In the figure, the voice synthesis L8I2 always outputs a pulse F P 106 having the same period as the frame period, and furthermore, during voice generation, it receives voice information data DA 203 in response to a voice information data request signal DRQP107. The interface circuit 3 requests audio information data from the microprocessor 1 using an interrupt request signal INT8. In the figure, 6 is a data bus, 7 is an address bus, and 9 is a control bus.

Figure 2 shows 1! shown in Figure 1! FIG. 2 is a block diagram of an embodiment of the interface circuit 3 in the third embodiment, in which 11 is a counter and 12 is a control circuit.

13 is a programmable counter, 14 is a shift register S, 15 is a shift register M, and 16 is a data switching circuit.

In the figure, when performing speech synthesis, the microprocessor 1 sets data in the interface circuit 3 in the order described below.

The microprocessor 1 is a control circuit 12.
Pitch frequency data is set in the shift register 814 through the intra-interface data bus 101, and audio information data other than the pitch frequency is set in the shift register M15. Similarly, the counter 11 is set to the number of repetitions of the same voice information data, and the programmable counter 13 is set to pitch frequency data and pitch frequency change rate. This pitch frequency change rate is set as the frame period step in which the pitch frequency data is changed and the direction (increase/decrease) in which the pitch frequency data is changed. Further, the number of bits of pitch frequency data is set in the control circuit 12. In this state, the speech synthesis LSI 2 is started.

FIG. 3 shows a timing diagram of data transfer from the interface circuit to the speech synthesis LSI. As described above, the microprocessor 1 stores the pitch frequency data So in the shift register 814 and the audio information data m6 other than the pitch frequency data in the shift register M15 at the time point 301 in FIG.

The programmable counter 13 contains the pitch frequency data So, the frame period step at which the pitch frequency is changed, and the direction in which the pitch frequency is changed (in the case of the figure, 1 and the decreasing direction), and the counter 11 contains the number of repetitions of the same audio information data. (5 in the case of the figure), but the number of bits of pitch frequency data (1 in the figure) is further determined by the control circuit 12.
The number of bits corresponding to 1/4 of the audio information data required for the frame is set.

In this state, when the voice synthesis LSI 2 outputs the voice information data request signal QP107, the control circuit 12 sends it to the shift register S control signal 103.
At the same time, the data switching circuit 16 outputs the output 202 of the shift register 814 to the shift register 814 via the data switching signal 104. Set to output to data RDAT A 203 of SI2.

As a result, the pitch frequency data So is transferred to the voice synthesis LSI.
2 is output. L)RQPx for the number of bits of pitch frequency data set in the control circuit 12
After outputting o7 to the shift register 814, the control circuit 12 outputs DB and QP107 to the shift register M15 through the shift register S control signal 102, and the data switching circuit 16 changes the output of the shift register M15 by the data switching signal 104. 201 is data of speech synthesis LSI2) LDA'1
” Set it to output to A203. Like this.

As for the audio information data for one frame period, the pitch frequency data is sent from the shift register 814, and the data other than the pitch frequency data is sent from the shift register M15 to the audio synthesis LSI.
2.

At the end of this frame period, that is, at the falling edge of F P 106, the number of repetitions of the same voice information data set in the counter 11 is subtracted by 1, and furthermore, the pitch frequency data So in the 7ry grammar pull counter 13 is set. , and is set in the shift register S14. (In the case of the same figure, - is subtracted and S(
, -1 are set. ) However, if the frame period step for changing the pitch frequency set in the programmable counter 13 is not 1, this operation is performed for each set frame period step.

These operations are repeated as many times as the number of repetitions of the same voice information data set in the counter 11 (302, 303 in the figure).
, 304, 305, and 306, the counter 11 sends an interrupt request signal INT8 to the microprocessor 1 at the last fall of F P 106 (306).
to request the next audio information data. The microprocessor 1 uses the interrupt processing to process the audio information data ml and 81 from the next frame period in the same manner as the above-mentioned setting of SO and mO.

As mentioned above, according to the control scheme according to the invention, the voice information data requests to the microprocessor 1 are reduced to 115, for example, in the case shown in FIG.

For example, when pronunciation of a long sound is made by repeating a specific frame of a short sound for the length of the short sound data and making the long sound twice as long as the short sound, the voice to the microprocessor 1 for long sound pronunciation may be Information data requests are 1/1/2 compared to before.
2, and the audio information data to be prepared in RAM4 is also 1/
It becomes 2. Furthermore, using this method, it is easy to differentiate the pronunciation times for the same short sounds, such as 1-a and 1-sa, by applying the long-sound pronunciation method, improving the naturalness of vocal pronunciation. It becomes possible to do so.

〔Effect of the invention〕

As explained above, according to the present invention, it is possible to pronounce any word more naturally with a small memory capacity,
In addition, the burden on the microprocessor for speech synthesis can be reduced, making it possible to produce arbitrary speech using a speech synthesizer using a micro combinator with a small memory capacity, and also speeding up the processing speed of software that uses speech synthesis. Accordingly, it is possible to provide a control method for a speech synthesizer with excellent functions, while eliminating the drawbacks of the prior art described above.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the speech synthesizer control method according to the present invention, FIG. 2 is a block diagram showing an embodiment of the interface circuit in FIG. 1, and FIG. 3 is a speech synthesis LSI of the interface circuit. FIG. 3 is a timing diagram of data transfer to. 1... Microprocessor 2... Speech synthesis LSI 3... Interface circuit 4... I(, AM 5... Ordinary OM
11...Counter 12...Control circuit 13...Programmable counter 14...Shift register S 15...Shift register M 16...Data switching circuit

Claims (1)

[Claims] In a speech synthesizer control method comprising a microprocessor, a ROM, a RAM, a speech synthesizer, and a speech synthesizer interface circuit, the speech synthesizer interface circuit is composed of a programmable counter, two shift registers, and a counter. Then, the voice information data to be transmitted to the voice synthesizer is divided into pitch frequency data and data other than pitch frequency and given to each of the two registers, the number of repetitions of the same voice information data is given to the counter, and the pitch frequency data is given to each of the two registers. A syllable is generated by giving a change rate to a programmable counter, and repeatedly transmitting speech information data to the speech synthesizer while changing the pitch frequency data the number of times given to the counter according to the programmable counter. A speech synthesizer control method characterized in that a time can be arbitrarily set.