JPS61217952A - Jitter correcting circuit - Google Patents

Abstract

PURPOSE:To improve the rotation accuracy of a cylinder by eliminating a jitter component even if a speed control signal containing the jitter component, by generating a signal which has adjusted a phase and a level of a signal coinciding with a rotation of the cylinder to a servo-loop of a cylinder motor, and adding this signal to the servo-loop. CONSTITUTION:A jitter correcting circuit consists of a monostable multivibrator 12 for inputting a head switching signal 100 outputted from a PG delaying circuit 7, a monostable multivibrator 13 for inputting a signal 200 which has been delayed by this monostable multivibrator 12 and delaying it further, a low-pass filter 14 for eliminating an unnecessary high-frequency component from a signal 300 outputted from the monostable multivibrator 13, a level regulator 15 for adjusting a level of a signal 400 outputted from this low-pass filter 14, and an adding circuit 16 for inserting a jitter correcting signal 500 into a servo-loop. The jitter correcting signal 500 outputted from this level regulator 15 is applied to one input terminal of the adding circuit 16 which has been inserted between a DC amplifying circuit 10 and a motor driving circuit 11.

Description

[Detailed description of the invention] [Technical field of the invention] The present F! 11Fi, home video tape recorder (VT
R) regarding the jitter correction circuit.

[Technical background of the invention]

Conventionally, the cylinder rotation system of home VTRs has a speed control loop (
AFC loop) and a phase control loop (APC loop) that controls the phase of the motor, the cylinder is stably rotated at a predetermined speed and phase.

FIG. 4 is a block diagram showing an example of a conventional cylinder motor system. Cylinder motor 1 and this motor 1
A frequency generator (FG) for speed control is installed on the cylinder (not shown) driven by the cylinder (upper rotating cylinder).
2 and a pulse generator (PG) 3 for phase control are attached.

The rotational frequency (same as rotational speed) signal of the cylinder motor 1 detected by the FG 2 is outputted to the input 5 of the speed detection circuit 4 . The rotational phase signal of the cylinder motor 1 detected by the PO 2 is input to the Siemite circuit 6 and shaped into a rectangular wave, and then output to the PG delay circuit 7 . The PG delay circuit 7 delays the rectangular wave output from the limit circuit 6 to match the switching position of the video paddle P mounted on the cylinder to produce a video paddle P switching signal (head switching pulse) 100. Note that the degree to which the signal is delayed in the PG delay circuit 7 is determined by the switching position adjustment valve 71. The Hella r switching signal is used for switching the 100 tf video head, and one edge of the signal is input to the phase detection circuit 8. . The phase is compared with the O2 reference signal (29.97h) 200 in the case of NTSC, and a voltage corresponding to this phase difference is outputted from the phase detection circuit 8 as a phase control signal. This phase control signal is phase-compensated through a phase compensation filter 9 and then input to an adder circuit 5. The adder circuit 5 adds the phase control signal and the speed control signal, and the added signal is sent to the DC amplifier circuit 1.
After being amplified at 0, the signal is input to the motor drive circuit 11. The motor drive circuit 11 controls the cylinder motor 1 based on the addition result of the input speed control signal and phase control signal.
is rotated at a predetermined speed and phase.

[Problems with background technology]

By the way, if the frequency characteristics of the speed control loop are extended while the mechanical installation accuracy of the frequency generator is poor, the frequency characteristics of the motor detected by the frequency generator will vary based on the inaccurate speed control signal. The rotation of the motor 1 is controlled so that the rotation frequency of the motor 1 is kept constant. Therefore, the result is that rotational unevenness occurs in the cylinder.

In addition, when the inertia of the cylinder and motor rotor decreases due to the downsizing of VTRs, the tape and the The contact pressure with the rotating cylinder surface changes significantly during one rotation, and the uneven rotation caused by this cannot be suppressed only by the effect of inertia.

Therefore, in order to solve the above-mentioned problems, it was necessary to improve the precision of the frequency generator parts and the mounting precision, and it was also necessary to improve the precision of the mounting of the video to the cylinder and the mounting precision of the cylinder. However, this method has the disadvantage that it requires many man-hours and time to process the parts and assemble the VTR, which increases the cost of the VTR. However, when the precision of the motor rotational frequency signal detected by the frequency generator is not maintained as described above, jitter occurs every time the cylinder rotates, and the jitter between the odd number feel P and even number feel P on the TV screen increases. However, the disadvantage is that the edges of the screen are shifted from field to field.

[Purpose of the invention]

In view of the above-mentioned drawbacks, an object of the present invention is to improve the rotation accuracy of a cylinder by eliminating jitter components even if a speed control signal containing jitter components generated due to low mechanical precision is used. [Summary of the Invention] The present invention provides a fee P pack of a speed control signal and a phase control signal corresponding to the speed and phase of a motor that drives a rotating cylinder equipped with a video head to a motor drive circuit to control the speed of the motor. and a phase adjustment means for arbitrarily changing the phase of the signal by delaying the signal that corresponds to the rotation of the cylinder, in the motor low loop that controls the phase, and a phase adjustment means that arbitrarily changes the phase of the signal that corresponds to the rotation of the cylinder. The above object is achieved by using a jitter reduction circuit comprising a level adjustment means for changing the phase and level of a signal that corresponds to the rotation of the cylinder, and an addition means for adding a signal whose phase and level are adjusted in accordance with the rotation of the cylinder to the motor rose loop.

[Embodiments of the invention]

Hereinafter, an embodiment of the present invention will be described with reference to the drawings, in which the same parts as those of the conventional example are denoted by the same reference numerals. FIG. 1 is a block diagram showing an embodiment of a cylinder servo circuit equipped with a jitter correction circuit according to the present invention. Ji94kasenr81finge pG slow-burn old 1 mine 7jaku output nam head r switching signal 10 (1
a monomulti 12 that inputs the signal 200 delayed by the monomulti 12, a monomulti 13 that inputs the signal 200 delayed by the monomulti 12 and further delays it, and a signal 300 that the monomulti 13 outputs.
(consists of a low A-pass filter 14, a level adjuster 15 that adjusts the level of the signal 400 output from the low-pass filter 14, and an adder circuit 16 that inserts a jitter correction signal 500 into the servo louso. ing.

Jitter correction signal 5 output from this level adjuster 15
00 is applied to the -1 input terminal of the adder circuit 16 inserted between the DC amplifier circuit 10 and the motor drive circuit 11. The addition result of the speed control signal and the phase control signal output from the DC amplifier circuit 10 is input to the other input of the addition circuit 16, and the addition result of the addition circuit 16 is input to the motor drive circuit 11.

Additionally, the mono multi 12 is equipped with a phase adjustment/+J Neem 121 for adjusting the signal delay amount of this mono multi 12, and the mono multi 13 is equipped with a detei adjustment for adjusting the signal delay amount of this mono multi 13. The level adjuster 15 is provided with two level adjustment reams 151 for changing the amount of level adjusted by the level adjuster. The other configurations are the same as the conventional example shown in FIG. 4, so the explanation will be omitted.

The operation of this embodiment will be explained according to the operation timing chart shown in FIG. The Noculus signal 600 detected by the pulse generator (PG) 2 for phase control of the cylinder motor 1 has a waveform as shown in the second part. This signal 600 if the second
The signal is shaped into a waveform as shown in the figure), resulting in a signal 700. This signal 700 is delayed by the PG delay circuit 7,
The switching signal 100 as shown in FIG. 2C)
becomes. This head P switching signal 10 (l) is input to the monomulti 12, where the delay time T as shown in FIG.

The signal 200 is delayed by the amount of time. This delayed signal 200 is further processed by the monomulti 13 into a delayed signal 300 delayed by a delay time T2 as shown in FIG. 2G). Note that the delay time of the monomulti 13 is T*half of the period of the Jfi head P switching signal 700, and is approximately 16 in the NTSC system.
．． It is 7 ms. This delay time T can be adjusted by the controller adjustment system 131.

Therefore, the delayed signal 300 is the same as the P switching signal 70.
The signal is delayed by <T, as shown in FIG. 2, compared to 0. This delay time T can be changed by adjusting the position adjustment neem 121 of the #i monomulti 12, and T can be changed from 0 to 33.4 mt. Note that this corresponds to the period of the head switching pulse of the NTSC system, which is 33.4m5tj. Therefore, a delayed signal 300 having a phase difference of 0 to 360 degrees with respect to the head switching pulse 100 can be obtained. This delayed signal 300 is a signal 400 containing only the fundamental wave component from which odd harmonics have been removed by the hello noise filter 14.
The amplitude level of the signal is further adjusted by the level adjuster 15, and then input to the adder circuit 16. In addition,
The degree of level adjustment of the level adjuster 15 is adjusted by a level adjustment ZERIEM 151.

The other input of the adder circuit 16 receives a signal obtained by adding the speed control signal and the phase control signal from the DC amplifier circuit 10 as described in the conventional example. Therefore, this adder circuit 16
Then, the jitter correction signal 500 output from the level adjuster 15 is added to this addition signal, and the addition result is output to the motor drive circuit 11.Here, the level adjustment I ream 151 is varied, and the average The signal 500 is adjusted to a level (approximately enough) that can cancel out the jitter component. In this way, the jitter-free tape (master tape) is played back, and the played video signal is displayed on the screen through a measuring device called a jitter meter. This jitter meter displays the amount of jitter on the screen, and the separation width of the line showing the jitter displayed on the screen is NTSC.
In the case of the method, it indicates the amount of jitter of the odd frequency component of 29.97 Hz. FIG. 3(G) is a screen showing the amount of jitter before adjustment, where S indicates the separation width and G indicates the jitter line. In this state, the delay time T is adjusted by turning the monomulti 120 phase adjustment knob 121 so that the separation width S is at the minimum position. Furthermore, level adjuster 1
By turning the 50 level adjustment tool 151 and minimizing the g1 width S as shown in FIG. 3, the amount of jitter separation can be reduced to almost zero.

3) shows an example of the screen after adjustment, in which the jitter component has become almost zero. A monomulti 12 head switching signal 100 that matches the rotation of the cylinder
When the signal 500, which has been delayed in order to have a constant phase relationship with the signal 100 and whose amplitude level has been adjusted by the level adjuster 15, is added to the Qi 2 loop signal output from the DC amplifier circuit 10, This surge loop signal drift component can be suppressed. Therefore, since the signal output from the adder 16 and input to the motor P live circuit 11 does not include a jitter component, the rotation of the cylinder motor 1 is ultimately controlled by a speed control signal that does not include a jitter component. Note that when the signal 300 passes through the low-pass filter 14 and becomes the signal 400, a phase delay occurs, but since this amount of phase delay is always constant, by adjusting the delayed signal TI of the monomulti 12,
There is no change in the fact that the phase of the signal 5000 can be varied within the range of 0 to 360 degrees.

According to this embodiment, the jitter correction signal 500, which is obtained by shifting the phase and adjusting the level of the head switching signal 100 that corresponds to the rotation of the cylinder, is added to the speed control and phase control surge loop of the cylinder motor 1.
Even if the mounting accuracy of the frequency generator 3 for obtaining the speed control signal and the cylinder is compromised, the cylinder motor 1 can be rotated evenly and stably. Therefore, it is possible to reduce the number of man-hours for processing and assembling parts, and to remove the jitter component from the serze loop at a low cost, thereby making it possible to obtain a good screen.

In the above embodiment, the head switching signal 100 was used to generate the jitter correction signal 500, but the same effect can be obtained by using a signal that matches the rotation of the cylinder, such as the thermistor reference signal 200.

However, since the low-pass filter 14 has characteristics similar to those of the cylinder motor 1, it may be omitted in some cases.

〔Effect of the invention〕

As described above, the jitter correction circuit of the present invention generates a signal in which the phase and level of the signal that matches the rotational pressure of the cylinder is adjusted to the circling loop of the lever and cylinder motor, and adds this signal to the circling loop. By using a speed control signal that includes a jitter component caused by low mechanical precision, the original jitter component can be eliminated and the rotational precision of the cylinder can be improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a cylinder circus loop circuit equipped with a jitter correction circuit according to the present invention, and FIG.
``iThe operation time chart of the circuit shown in Fig. 1, Fig. 3 is a diagram showing an example of the amount of jitter displayed on the screen by a jitter meter, and Fig. 4 is a block diagram showing an example of a conventional cylinder circus loop circuit. 1... Cylinder motor 2... Frequency generator 3... Pulse generator 4... Speed detection circuit 5
．． 16...Addition circuit 8...Phase detection circuit 12, 1
3...Mono multi 14.°-low pass filter 15
... Level adjuster Fig. 1 1jl 111/1 Fig. 2 (G), , -7-1, -1, -1, -7 Fig. 3 Fig. 4

Claims (1)

[Claims] 1) A speed control signal and a phase control signal corresponding to the speed and phase of a motor that drives a rotating body equipped with a video head are fed back to a motor drive circuit to control the speed and phase of the motor. In the motor servo loop, there is a phase adjustment means that arbitrarily changes the phase of the signal that corresponds to the rotation of the cylinder by delaying the signal, and a level adjustment that arbitrarily changes the amplitude level of the signal that corresponds to the rotation of the cylinder. and addition means for adding a signal whose phase and level are adjusted in accordance with the rotation of the cylinder to a motor servo loop. 2) Claim 1, characterized in that a servo reference signal such as a head switching signal or a control track signal is used as the signal that corresponds to the rotation of the cylinder.
Jitter correction circuit described in section.