JPS61198688A - Semiconductor photodetector - Google Patents

Semiconductor photodetector

Info

Publication number
JPS61198688A
JPS61198688A JP60038169A JP3816985A JPS61198688A JP S61198688 A JPS61198688 A JP S61198688A JP 60038169 A JP60038169 A JP 60038169A JP 3816985 A JP3816985 A JP 3816985A JP S61198688 A JPS61198688 A JP S61198688A
Authority
JP
Japan
Prior art keywords
layer
ingaas
inalas
light
electric field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60038169A
Other languages
Japanese (ja)
Inventor
Yoshimasa Sugimoto
喜正 杉本
Toshitaka Torikai
俊敬 鳥飼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60038169A priority Critical patent/JPS61198688A/en
Publication of JPS61198688A publication Critical patent/JPS61198688A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes
    • H01L31/1075Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier working in avalanche mode, e.g. avalanche photodiodes in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To obtain the APD of layer GB product, by separating the light absorbing layer from the avalanche multiplying layer to shorten the transit time of carrier in the light absorbing layer. CONSTITUTION:The P<+> InGaAs buffer layer 36, the P<-> InGaAs layer 35, P<-> InGaAs layer 34, P-InAlAs layer 33 and the N<+> InAlAs layer 32 are continuously groven on the P<+> InP substrate 37 by MBE growth method. After then, AuGeNi is deposited for the (n) side electrode, and the MESA etching is performed by applying the deposited layer to the etching mask. AuZn is deposited for the (p) side electrode which is employed as the light receiving element. The incident light 10 enters from the N<+> InAlAs layer 32. The electric field distribution is produced by separating the light absorbing layer 4 into the P-InGaAs layer 34 and the P<-> InGaAs layer 35, so that the transit time of the carrier which travels in the light absorbing layer can be shortened.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、逆バイアス電圧で使用する半導体受光素子に
関し、特に高速応答特性に優れたヘテロ接合型の半導体
受光素子に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor light-receiving element used with a reverse bias voltage, and particularly to a heterojunction-type semiconductor light-receiving element having excellent high-speed response characteristics.

(従来の技術) 現在、光通信の実用化が進められている。この光通信で
使用する波長域は、光ファイバの伝送損失が低い1〜1
.16−帯が主流である。この波長域で動作可能な光源
(半導体レーザ、LED)及び光検出器(ホトダイオー
ド:PDやアバランシホトダイオード:APD)の研究
開発が活発に進められている。光源としてはInP−I
nGaAsP系が、光検出器としてはGe−APDが主
に用いられている。しかし、このGe−APDは暗電流
と過剰雑音が大きく、また温度特性も悪いので必ずしも
光通信用光信号を検出する素子としては最適ではなく、
これに代わる化合物半導体材料によるFD及びAPDが
期待されている。
(Prior Art) Currently, optical communication is being put into practical use. The wavelength range used in this optical communication is 1 to 1, which has low transmission loss in optical fibers.
.. 16-band is the mainstream. Research and development of light sources (semiconductor lasers, LEDs) and photodetectors (photodiodes: PDs and avalanche photodiodes: APDs) that can operate in this wavelength range is actively underway. InP-I as a light source
An nGaAsP system is mainly used, and a Ge-APD is mainly used as a photodetector. However, this Ge-APD has large dark current and excessive noise, and also has poor temperature characteristics, so it is not necessarily optimal as an element for detecting optical signals for optical communication.
FDs and APDs made of compound semiconductor materials are expected to replace these.

化合物半導体APDのうちで現在勢力的に開発が進めら
れているのがInGaAs−APDである。1霞以上の
波長域で受光素子として使用する半導体材料は禁制帯幅
が狭くなるから、PDJ?:JAPDを作った場合トン
ネル電流の影響を受けると高性能な特性は期待できない
。ところで、このInGaAsは、InAlAsに格子
整合したヘテロ接合の形成が可能である。そコテ、In
GaAsを光吸収層として、ここで発生した電子−正孔
キャリアの一方のみをアバランシ増倍層であるInAl
As暦へ輸送してアバランシ増倍させる構造が採用でき
る。この構造によってトンネル電流の影響を受けず、過
剰雑音が小さい高性能な受光素子が可能である(アプラ
イド・フィジクス・レターズ(A、 P、 L、 43
 (1983)1040 ) ) 。
Among compound semiconductor APDs, InGaAs-APD is currently being actively developed. Since the semiconductor material used as a photodetector in the wavelength range of 1 haze or more has a narrow forbidden band width, PDJ? : When making a JAPD, high performance characteristics cannot be expected if it is affected by tunnel current. By the way, this InGaAs can form a heterojunction that is lattice matched to InAlAs. Sokote, In
GaAs is used as a light absorption layer, and only one side of the electron-hole carriers generated here is transferred to InAl, which is an avalanche multiplication layer.
A structure can be adopted in which the avalanche is multiplied by transporting it to the As calendar. This structure makes it possible to create a high-performance photodetector that is not affected by tunneling current and has low excess noise (Applied Physics Letters (A, P, L, 43).
(1983) 1040) ).

第5図に従来の受光素子を示す。これはInGaAsを
光吸収層とし、InAlAsをアバランシ増倍層とした
APDの模式断面図であるe p”−Inp基板6上に
p”−InGaAsバッファM5、p−InGaAs光
吸収J!!4、p−InAlAsアバランシ増倍層3、
n”−InAIAs層2を形成し、メサエッチングを施
した後、n(lff1を極1、p側電極7を形成してい
る。入射光1oはn”−InAIAs層2から入る構造
となっている。
FIG. 5 shows a conventional light receiving element. This is a schematic cross-sectional view of an APD with InGaAs as a light absorption layer and InAlAs as an avalanche multiplication layer. e p"-InP substrate 6, p"-InGaAs buffer M5, p-InGaAs light absorption J! ! 4, p-InAlAs avalanche multiplication layer 3,
After forming the n''-InAIAs layer 2 and performing mesa etching, the n(lff1 is used as the pole 1 and the p-side electrode 7 is formed.The structure is such that the incident light 1o enters from the n''-InAIAs layer 2. There is.

この構造においては電極1.7間に逆方向バイアス電圧
を印加し、空乏層をInGaAs層4中まで伸ばすこと
番こよって禁制帯幅の狭いInGaAs層4で光を吸収
させ、発生した電子キャリアを禁制帯幅の広いInAl
As層3まで輸送してアバランシ増倍を生じ許せている
。すなわち禁制帯幅の広いInAlAs層3で電圧降伏
が生じるために低暗電流受光素子が実現でき、従って低
雑音で高性能な特性が期待できる。
In this structure, a reverse bias voltage is applied between the electrodes 1 and 7 to extend the depletion layer into the InGaAs layer 4, thereby absorbing light in the InGaAs layer 4, which has a narrow forbidden band width, and dissipating the generated electron carriers. InAl with wide forbidden band width
The avalanche multiplication occurs when it is transported to the As layer 3, which is allowed. That is, since voltage breakdown occurs in the InAlAs layer 3 having a wide forbidden band width, a low dark current light receiving element can be realized, and therefore low noise and high performance characteristics can be expected.

(発明が解決しようとする問題点) しかしながら第5図に示す構造では、光吸収層4とアバ
ランシ増倍層3とが分離されているから光吸収によって
生じたキャリアは光吸収層4中を走行していかないと増
倍領域に達しない。したがって、この構造のAPDでは
、5i−APDやGe−APDで良く知られているアバ
ランシ立上がり時間で規定きれるGB積制限に加えて、
光吸収層中の走行時間制限も入ってきてGB積が小びく
なるという欠点を有している。実際にこの構造において
、GB積は15〜20程度であり、この時InGaAs
層中をキャリアが走行する時間は50〜70 PSec
程度となる。この値はInAlAs層中での走行時間3
0 PSecより大きな値であり、このInGaAs層
中を走行する時間を短かくすることがGB積を大きくす
る決定的な要因となる。
(Problem to be solved by the invention) However, in the structure shown in FIG. Otherwise, it will not reach the multiplication region. Therefore, in an APD with this structure, in addition to the GB product limit that can be defined by the avalanche rise time, which is well known for 5i-APDs and Ge-APDs,
This also has the disadvantage that the GB product becomes smaller due to the limitation of transit time in the light absorption layer. Actually, in this structure, the GB product is about 15 to 20, and at this time InGaAs
The time the carrier travels through the layer is 50 to 70 PSec.
It will be about. This value corresponds to the transit time 3 in the InAlAs layer.
This value is larger than 0 PSec, and shortening the traveling time in this InGaAs layer is a decisive factor in increasing the GB product.

そこで、本発明の目的は、この様な従来構造の欠点を除
去せしめ、低雑音で、しかもGB積が大きい半導体受光
素子の提供にある。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to eliminate the drawbacks of the conventional structure and provide a semiconductor light receiving element with low noise and a large GB product.

(問題点を解決するための手段) 前述の問題点を解決するために本発明が提供する手段は
、光吸収層及びアバランシ増倍層が設けてあり、前記ア
バランシ増倍層の禁制帯幅が前記光吸収層の禁制帯幅よ
り大きいヘテロ接合型半導体受光素子であって、前記光
吸収層がlXl0”cm −”以上の高濃度キャリア不
純物を有する領域AとlX10”am−”以下の低濃度
キャリア不純物を有する領域Bとの少なくとも2つの領
域からなり、前記領域Aの方が前記領域Bより前記アバ
ランシ増倍層に近接し、前記領域Bの層厚が前記光吸収
層の厚さの172以上であり、前記領域Bにおける電界
強度が50 KV/am以下である事を特徴とする。
(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides a means in which a light absorption layer and an avalanche multiplication layer are provided, and the forbidden band width of the avalanche multiplication layer is A heterojunction semiconductor light-receiving element having a width larger than the forbidden band width of the light absorption layer, wherein the light absorption layer has a region A having a high concentration of carrier impurities of 1X10"cm-" or more and a low concentration of carrier impurities of 1X10"am-" or less. It consists of at least two regions, a region B having carrier impurities, and the region A is closer to the avalanche multiplication layer than the region B, and the layer thickness of the region B is 172 times the thickness of the light absorption layer. The present invention is characterized in that the electric field strength in the region B is 50 KV/am or less.

(作用) 本発明は上述の手段番こより従来の欠点を解決した。(effect) The present invention overcomes the drawbacks of the prior art by the above-mentioned means.

第1図は、本発明の構造のAPD及び従来構造のAPD
における空乏層内での電界分布を示す図である。本図で
は、Aは本発明構造の電界分布線(実線)を示し、Bは
従来構造の電界分布線(破線)をそれぞれ示す、そして
、横軸はpn接合からの距離、縦軸は電界強度を表わし
ている。このモデルでは、アバランシ増倍層であるp−
InAlAsの層厚を2−、ヘテロ電界強度を150 
KV/cmとしている。
FIG. 1 shows an APD with a structure of the present invention and an APD with a conventional structure.
FIG. 3 is a diagram showing an electric field distribution within a depletion layer in FIG. In this figure, A shows the electric field distribution line (solid line) of the structure of the present invention, B shows the electric field distribution line (dashed line) of the conventional structure, and the horizontal axis is the distance from the pn junction, and the vertical axis is the electric field intensity. It represents. In this model, p-
The InAlAs layer thickness is 2-, and the hetero electric field strength is 150.
KV/cm.

また光吸収層であ−るp−InGaAs暦は層厚4P@
、ヘテロ界面から1prnの位置で電界分布が変化して
おり、その時の電界強度は40 KV/Cmである。こ
の様に光吸収層にキャリア濃度の勾配を設けて電界分布
を変化させることに′よって走行時間が変化する様子を
示したのが第2図である。この図はInGaAs中の電
子の走行速度を電界に対してプロットしたものである(
アイ・トリプルイー・エレクトロン・デバイス・レター
ズIEEE ELECT、 Dev、 LETT。
In addition, the p-InGaAs layer, which is the light absorption layer, has a layer thickness of 4P@
, the electric field distribution changes at a position 1 prn from the heterointerface, and the electric field strength at that time is 40 KV/Cm. FIG. 2 shows how the transit time changes by providing a carrier concentration gradient in the light absorption layer and changing the electric field distribution. This figure shows the traveling speed of electrons in InGaAs plotted against the electric field (
I Triple E Electron Device Letters IEEE ELECT, Dev, LETT.

EDL−3(1982) 1B )。この図から電子の
速度は電界が10に■/clTl程度のときに最大とな
り、電界が大きくなるに従って電子の速度は減少し、1
00 KV/伽以上の電界では飽和傾向を示すことがわ
かる。
EDL-3 (1982) 1B). From this figure, the electron velocity reaches its maximum when the electric field is about 10/clTl, and as the electric field increases, the electron velocity decreases to 1
It can be seen that there is a tendency for saturation in electric fields of 00 KV/g or more.

第1図の破線Bに示した従来構造の使用領域は第2図の
2−aの部分に相当し、電子の速度は6X 10’cm
/SeC程度である。
The usage area of the conventional structure shown by the broken line B in FIG. 1 corresponds to the part 2-a in FIG. 2, and the electron velocity is 6X 10'cm.
/SeC.

これに対して本発明構造では光吸収層の大部分が40K
V/CTn以下の領域にあるから第2図の2−bの部分
に相当し、電子の速度は7〜10X10@CrII/s
ecとなる。この速度は従来構造より速い値となり、高
速応答が期待される。
On the other hand, in the structure of the present invention, most of the light absorption layer is 40K
Since it is in the region below V/CTn, it corresponds to part 2-b in Figure 2, and the electron speed is 7 to 10X10@CrII/s.
It becomes ec. This speed is faster than the conventional structure, and high-speed response is expected.

(実施例) 以下、第5図の従来例と同様にInAlAs/InGa
Asヘテロ接合を用いた本発明の一実施例のAPDにつ
いて詳述するが、他のへテロ接合、例えばInP/In
Ga+AS、 AlGaAs/GaAs、 AlGaS
b/GaSb等についても全く同様であることは容易に
理解きれる。
(Example) In the following, InAlAs/InGa
An APD according to one embodiment of the present invention using an As heterojunction will be described in detail, but other heterojunctions, such as InP/In
Ga+AS, AlGaAs/GaAs, AlGaS
It is easy to understand that the same holds true for b/GaSb and the like.

第3図は本発明の構造をもつ受光素子(APD)の一実
施例を示す模式的断面図である。p”−InP基板37
上にp”−InGaAsバッファ層36を1−厚に、キ
ャリア濃度IXIQ”cm−”のp−InGaAS層3
5を4層厚5成長し、さらにlXl0”cm−’のキャ
リア濃度のp−InGaAs層34を1−、キャリア濃
度1.5X10”Cm−”のp−InAlAs層33を
1,57rIn+。
FIG. 3 is a schematic cross-sectional view showing an embodiment of a photodetector (APD) having the structure of the present invention. p”-InP substrate 37
A p-InGaAS layer 3 with a carrier concentration IXIQ"cm-" and a p"-InGaAs buffer layer 36 on top thereof with a thickness of 1".
Further, a p-InGaAs layer 34 with a carrier concentration of 1X10"cm-" was grown, and a p-InAlAs layer 33 with a carrier concentration of 1.5X10"cm-" was formed with 1.57rIn+.

1×101″Cm −”のキャリア濃度のn ”−In
GaAs1!t 32を1/4Tl厚にMBE成長法を
用いて連続的に成長をおこなった。その後n側電極とし
てAuGeNiを蒸着し、これをエツチングマスクとし
て、メサエッチングをおこなった。次にp側電極とにA
uZnを蒸着して、受光素子とする。入射光10はn 
”−InAIAs層32側から入射する。第5図に示し
た従来例の光吸収層4をp−InGaAs層34、p−
InGaA!!1層35と分けることで電界分布をつく
り、光吸収層中を走るキャリアの走行時間を短かくする
ことが可能となった。
n''-In with a carrier concentration of 1×101''Cm-''
GaAs1! Continuous growth was performed using the MBE growth method at t 32 to a thickness of 1/4 Tl. Thereafter, AuGeNi was deposited as an n-side electrode, and mesa etching was performed using this as an etching mask. Next, connect A to the p-side electrode.
UZn is deposited to form a light receiving element. The incident light 10 is n
”-InAIAs layer 32 side.The conventional light absorption layer 4 shown in FIG.
InGaA! ! By dividing the layer into one layer 35, it is possible to create an electric field distribution and shorten the travel time of carriers running in the light absorption layer.

(発明の効果) 第4図は本発明の構造及び従来構造のInAlAs/I
nGaAs−APDにおけるGB積と増倍率との関係を
示す図である。本発明の構造では、GB積線4−aに示
した様にGXB=25であった。これは従来例のGB積
4−bを大きく上回っていることがわかる。
(Effect of the invention) Figure 4 shows the structure of the present invention and the conventional structure of InAlAs/I
It is a figure showing the relationship between GB product and multiplication factor in nGaAs-APD. In the structure of the present invention, GXB=25 as shown in the GB product line 4-a. It can be seen that this greatly exceeds the GB product 4-b of the conventional example.

以上説明したように、本発明の構造を用いることによっ
て光吸収層とアバランシ増倍層とが分離してあって低雑
音であり、しかも光吸収層中のキャリアの走行時間を短
かくすることが可能であり、結果としてGB積の大きな
APDを作ることが可能となった。このように、本発明
によれば、低雑音で、しかもGB積が大きい半導体受光
素子が提供できる。
As explained above, by using the structure of the present invention, the light absorption layer and the avalanche multiplication layer are separated, resulting in low noise, and moreover, the transit time of carriers in the light absorption layer can be shortened. As a result, it has become possible to create an APD with a large GB product. As described above, according to the present invention, it is possible to provide a semiconductor light receiving element with low noise and a large GB product.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明構造及び従来構造のInAlAs/In
GaAs−APDの電界強度分布を示す図、第2図はI
nGaAs中の電界強度と電子の速度との関係を示す図
、第3図は本発明の一実施例のInAlAs/InGa
As−APDの模式的断面図、第4図は本発明構造及び
従来構造のInAlAs/1nGaAs−APDにおけ
るGB積と増倍率との関係を示す図、第5図は従来のI
nAlAs/InGaAs−APDの構造を示す模式的
な断面図である。 1.31・・・n側電極、2 、32 ・・・n”−I
nGaAs層、3 、33 ・・・p(nAIAs層、
34−p−InGaAs層、4  、 3 5 −p−
−InGaAs層、  5  、 3 6  ・・・p
”−InGaAs)<ッファ層、6.37−・・InP
基板、7.38・・・p側電極、2−a・・・従来構造
の使用領域、2−b・・・本発明構造の使用領域、4−
a・・・本発明構造のGB積vS増倍率線、4−b・・
・従来例構造のGB積vS増倍率線。 代理人弁理士  本 庄 伸 介 第1図 Pn#合かうのj[!峠(μm) 第2図 ξ ド 電界腋准(にV/cm) 第3図 38P4a11& 第4図゛ 4  イ合 4会
Figure 1 shows the structure of the present invention and the conventional structure of InAlAs/In.
A diagram showing the electric field strength distribution of GaAs-APD, Figure 2 is I
A diagram showing the relationship between electric field strength and electron velocity in nGaAs, FIG. 3 is an example of the InAlAs/InGa of the present invention.
A schematic cross-sectional view of As-APD, FIG. 4 is a diagram showing the relationship between GB product and multiplication factor in InAlAs/1nGaAs-APD of the present invention structure and conventional structure, and FIG.
FIG. 2 is a schematic cross-sectional view showing the structure of nAlAs/InGaAs-APD. 1.31...n-side electrode, 2,32...n''-I
nGaAs layer, 3, 33...p (nAIAs layer,
34-p-InGaAs layer, 4, 35-p-
-InGaAs layer, 5, 36...p
"-InGaAs) < buffer layer, 6.37-...InP
Substrate, 7.38... p-side electrode, 2-a... used area of conventional structure, 2-b... used area of present invention structure, 4-
a...GB product vs. multiplication factor line of the structure of the present invention, 4-b...
- GB product vs S multiplication factor line of conventional structure. Agent Patent Attorney Shinsuke Honjo Figure 1Pn #Agree no j [! Pass (μm) Fig. 2 ξ Electric field axillary standard (V/cm) Fig. 3 38P4a11 & Fig. 4

Claims (1)

【特許請求の範囲】[Claims] 光吸収層及びアバランシ増倍層が設けてあり、前記アバ
ランシ増倍層の禁制帯幅が前記光吸収層の禁制帯幅より
大きいヘテロ接合型半導体受光素子において、前記光吸
収層が1×10^1^6cm^−^3以上の高濃度キャ
リア不純物を有する領域Aと1×10^1^6cm^−
3以下の低濃度キャリア不純物を有する領域Bとの少な
くとも2つの領域からなり、前記領域Aの方が前記領域
Bより前記アバランシ増倍層に近接し、前記領域Bの層
厚が前記光吸収層の厚さの1/2以上であり、前記領域
Bにおける電界強度が50KV/cm以下である事を特
徴とする半導体受光素子。
In a heterojunction semiconductor light-receiving element, which is provided with a light absorption layer and an avalanche multiplication layer, and in which the forbidden band width of the avalanche multiplication layer is larger than the forbidden band width of the light absorption layer, the light absorption layer has a width of 1×10^. Region A having a high concentration carrier impurity of 1^6 cm^-^3 or more and 1 x 10^1^6 cm^-
The region A is closer to the avalanche multiplication layer than the region B, and the layer thickness of the region B is the same as that of the light absorption layer. A semiconductor light-receiving element characterized in that the thickness is 1/2 or more of the thickness of the semiconductor light-receiving element, and the electric field strength in the region B is 50 KV/cm or less.
JP60038169A 1985-02-27 1985-02-27 Semiconductor photodetector Pending JPS61198688A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60038169A JPS61198688A (en) 1985-02-27 1985-02-27 Semiconductor photodetector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60038169A JPS61198688A (en) 1985-02-27 1985-02-27 Semiconductor photodetector

Publications (1)

Publication Number Publication Date
JPS61198688A true JPS61198688A (en) 1986-09-03

Family

ID=12517895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60038169A Pending JPS61198688A (en) 1985-02-27 1985-02-27 Semiconductor photodetector

Country Status (1)

Country Link
JP (1) JPS61198688A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4982255A (en) * 1988-11-18 1991-01-01 Nec Corporation Avalanche photodiode
US6104047A (en) * 1998-07-03 2000-08-15 Nec Corporation Avalanche photodiode with thin built-in depletion region
WO2005076371A1 (en) * 2004-02-03 2005-08-18 Ntt Electronics Corporation Avalanche photodiode

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5994474A (en) * 1982-11-19 1984-05-31 Nec Corp Hetero junction photodetector

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5994474A (en) * 1982-11-19 1984-05-31 Nec Corp Hetero junction photodetector

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4982255A (en) * 1988-11-18 1991-01-01 Nec Corporation Avalanche photodiode
US6104047A (en) * 1998-07-03 2000-08-15 Nec Corporation Avalanche photodiode with thin built-in depletion region
WO2005076371A1 (en) * 2004-02-03 2005-08-18 Ntt Electronics Corporation Avalanche photodiode
US7557387B2 (en) 2004-02-03 2009-07-07 Nippon Telegraph And Telephone Corporation Avalanche photodiode

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