JPS61195855A - Dot printer - Google Patents

Abstract

PURPOSE:To enable high-speed printing by providing a configuration of the first and second latch circuits to memorize an output of an AND gate circuit means and an OR gate circuit to put an output of these latch circuits to OR processing. CONSTITUTION:A mask pattern production circuit 9 produces mask data for selecting necessary bit information from font pattern data of a font memory 4 and inputs said data to a group of AND gate circuits 10 to execute logic processing. The first and second latch circuit 11, 12 are composed of the same number of bits as the number of pins, and memorize data input from the group of AND gate circuits 10. Data latched by the first and second latch circuits 11, 12 is transmitted to a printing head driving circuit 5 passing through a group of OR gate circuits 13, thus performing the printing.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a serial impact wire dot printer that retrieves print data corresponding to character codes input from a central processing unit from a font memory and prints them sequentially. In order to achieve high dot density, miniaturization of the head, and reduction of magnetic interference, we changed the arrangement of the wires at the tip of the print head to a print head with wire dots arranged diagonally to the printing direction. Equipped with a printer that allows high-speed marking and
This article relates to a dot printer that has realized characters.

Disaster 1 East Generally, in a serial impact wire dot printer, under the control of a central controller, the print data of the necessary character is retrieved from the font memory that stores the print data of the pattern corresponding to the character code. It is configured to print sequentially.

FIG. 7 is a functional block diagram showing an example of the configuration of a conventional dot printer. In the drawing, 1 is a host machine, 2 is a data latch circuit, 3 is a printer control circuit, 4 is a font memory, 5 is a print head drive circuit, 6 is a print head, 7 is a motor drive circuit, and 8 is a 5P-
LF (Space Line Feed) motor is shown.

The host machine 1 has a function of controlling the entire data processing system, and is controlled by a central processing unit.

The data latch circuit 2 latches the character code input from the host machine 1 and outputs it to the printer control circuit 3.

The printer control circuit 3 retrieves print data corresponding to the input character code from the font memory 4 and outputs it to the print head drive circuit 5, and sends an instruction to the motor drive circuit to move the print head 6 to the print start position. 7 to drive the 4SP-LF motor 8.

The print head drive circuit 5 drives the print head 6 to perform printing.

By the way, with this type of conventional dot printer.

The ends of the wires of the print head 6 are arranged in a single vertical row or in a staggered arrangement in two vertical rows. In short, conventional wire tips are arranged in a direction perpendicular to the printing direction.

In the case of print heads arranged in one vertical column, the data read from the font memory 4 is sent directly to the print head drive circuit 5.

On the other hand, in the case of a two-column staggered print head, the print data in the odd (even) columns is the data read from the font memory 4, and the print data in the even (odd) columns is the data read from the font memory 4. Print data read from addresses shifted by two columns of pitches on the memory 4 is sent to the print head drive circuit 5, respectively.

In either case, print data is stored in the font memory 4 so that an image of a single character pattern is formed, and by reading it from the address corresponding to the single character code, the print pattern data of the necessary character can be obtained. can get.

FIGS. 8(1) and 8(2) are memory configuration diagrams showing an example of the storage state of print data in the font memory 4.
1) is for the English character ITJ, and figure (2) is for the English character "ITJ".
In the 0 drawing, which is the case of ``○'', the horizontal direction n '' n
+7 and -m-m+7 are memory addresses.

B7 to bo in the vertical direction indicate bits.

As shown in Figure 8 (1) and (2), the font memory 4
If the print data is stored in the print heads, the necessary print data can be read out quickly and easily using print heads arranged in one vertical column or two columns in a staggered manner.

However, in recent years, due to the increase in the density of printing dots, the miniaturization of print heads, and the reduction of magnetic interference, printing patterns in which the wire tips are arranged diagonally in a single row or in a diamond shape, etc. are becoming more popular. head is now used. That is, the tips of these wires are arranged in a direction non-perpendicular to the printing direction.

In this case, print data must be read from a different address in the font memory 4 for each pin, unlike in the case of a conventional print head arranged in one vertical column.

Note that even in the case of the conventional two-column staggered print head, print data is taken out from the font memory 4 at different, non-consecutive addresses for even-numbered columns and odd-numbered columns. However, in this case, since it is only necessary to access two locations in the memory, the printing speed will not decrease much if the processing is performed by firmware using a microcomputer or the like.

However, in the case of a print head arranged in a diagonal row or in a diamond shape, it is necessary to access the same number of pins and select only the necessary bit information to generate print data.

As a result, if we try to perform processing similar to the conventional technology, such as the case of two vertical rows of staggered print heads, that is, by extending the conventional technology, not only will the processing circuit become more complex, but the processing time will also increase. Since it takes a lot of time, high-speed printing becomes impossible, and the processing efficiency of the data processing system is significantly reduced. There was this inconvenience.

Therefore, in the dot printer of the present invention, in order to increase the density of printed dots, reduce the size of the print head, and further reduce magnetic interference, the wire tips are arranged in a diagonal line or in a diamond shape. An object of the present invention is to improve the processing efficiency of a data processing system to which a printer is connected by enabling high-speed printing with a processing circuit of a simple configuration even in the case of arrayed print heads.

For this purpose, the dot printer of the present invention includes a font memory that stores font data corresponding to the arrangement of the wire tips of the print head, and mask data that selects only the necessary data in this font memory. mask data generation means for generating font memory data and mask data, AND gate circuit means for generating effective print data from font memory data and mask data, first and second latch circuits for storing the output of the AND gate circuit means; and an OR gate circuit that performs OR processing on the outputs of the first and second latch circuits.

Next, an embodiment of the dot printer of the present invention will be described in detail with reference to one drawing.

FIG. 1 is a functional block diagram showing the configuration of essential parts of an embodiment of the dot printer of the present invention. The symbols in the drawing are the same as those in the previous FIG. 7, and 9 is a mask pattern generation circuit, 10 is an AND gate circuit group, and 11 is
12 is a first latch circuit, 12 is a second latch circuit, and I3 is an OR gate circuit group.

The following FIG. 2 is a diagram showing a state in which the arrangement of the wire tips of the print head 6 in the embodiment shown in FIG. 1 is projected onto a print medium. In the drawings, X and Y indicate the pitch between adjacent wires in the horizontal and vertical directions, respectively, the 0 mark indicates the pin position, and the arrow indicates the printing direction.

In this embodiment, one character is composed of 8×8 (dots), and eight pins at the tip of the wire are arranged diagonally in one row. The pitches X and Y between adjacent wires in the horizontal and vertical directions are each set to be equal to the pitch of the printed dots.

As will be described in detail later, the mask pattern generation circuit 9 in FIG. 1 generates mask data for selecting necessary bit information from the font pattern data in the font memory 4 and inputs it to the AND gate circuit group 10. , to execute logical processing.

The first latch circuit 11 and the second latch circuit 12 have the same number of bits as the number of pins, and store data input from the AND gate circuit group 10.

The first latch circuit 11 and the second latch circuit 12 are
This circuit is for latching the print data of each character when the position of the pin shown in FIG. 2 straddles the print area of two characters.

In the following embodiments, the print pattern of one character is always latched into the same latch circuit. Additionally, if the pin is located in the print area for only one character at the beginning and end of printing, and only one location in the memory is accessed, the other latch circuit will contain all '0' data. is latched.

FIGS. 3(1) and 3(2) are memory configuration diagrams showing an example of the storage state of the print data of the English character rTJ in the font memory 4 of the dot printer of the present invention, and FIG. 3(1) is the storage state of the font pattern data. FIG. 1 (2), which explains the principle of this, shows the actual storage state.

In the font memory 4 of the dot printer of this invention, the actual print data of the English character rTJ is
It is stored as follows.

First, in FIG. 3(1), the pattern rTJ of FIG. 8(1) is made to correspond to the diagonally arranged print head in one row shown in FIG. 2, and its printing timing is set from bit b7.

The memory addresses are shifted one bit at a time. Note that the first bin is bit b(y), the second pin is bit b6,..., the eighth pin is bit b(y
, and so on.

In this state of FIG. 3 (1) (b7 of address n and n+
8's ba~bo)t (n+1's b"1vb6.

b5 to b0 of n+9), (b7 to b5 of n+2, and n+
10 ba ~ ba ) + “””+ (n +
6 b7-b1 and n+14 bo), (n+7 b)
-bo) are synthesized and rearranged sequentially starting from address n', as shown in FIG. 3(2).

Therefore, the printing pattern shown in FIG. 3 (2).

The font memory pattern corresponds to the print heads arranged diagonally in one row as shown in FIG.

The following Figure 4 (1) and (2) are memory data showing an example of the storage state of the print data of the alphabetic character rQJ.
1) illustrates the principle of the storage state of font pattern data. FIG. 1 (2) shows the actual storage state.

In the case of the English letter "o", the pattern "O" in Figure 8 (2) is expanded as shown in Figure 4 (1) using the same operation, and then the pattern as shown in Figure 4 (2) is developed. get a font pattern.

Next, in the dot printer of this invention, the English character "T" is printed.
The operation when printing "O" will be explained in detail.

FIG. 5 shows the printer control circuit 3, font memory 4. This is an example of a table showing how the outputs of the mask pattern generation circuit 9, the first latch circuit 11, the second latch circuit 12, and the OR gate circuit group 13 change according to the printing operation.

In FIG. 5, from cycle 1 to cycle 8, only addresses n' to n'+7 of the font memory 4 in which pattern data of the alphabetic character "T" are stored are accessed. In cycles 1 to 8, the pin position is in the printing area of the first character rTJ.

From the next cycle 9 to cycle 15, the English letter "T"
and rQJ are both accessed. In addition, in the printing operation of three or more characters, this cycle 9 to cycle 15 will be repeated as many times as necessary.

The latter half, from cycle 16 to cycle 23.

Only the alphabetic characters rQJ are accessed. This cycle 16
In cycle 23, the pin position is only in the printing area of the character rQJ.

The memory data is each bit b in FIG. 3 (2) and FIG. 4 (2). -ba and b4 to b7 are each expressed in hexadecimal. For example, in the case of address n', Fig. 3 (2)
As shown in , bo-ba is “8” and b4 to b7 are “0”.
”. Therefore, in the corresponding column of FIG. 5, "08" is displayed.

The mask pattern is uniquely determined according to the arrangement of the wire tips, and does not change even if the character code changes.

For example, in cycle l, the data on the first pin is b
rloooooooJ B
It is set as (binary display).

First, the character code "T" is input from the host machine 1 shown in FIG. 1 to the printer control circuit 3 via the data latch circuit 2.

In response to this input, the printer control circuit 3 issues an instruction to the motor drive circuit 7 to move the print head 6 to the printing position, and also instructs the font memory 4 to move the print head 6 to the print position as shown in FIG. 3(2). The first address n' of the character pattern "T" is output.

In this case, the only pin that is driven when the print head 6 moves to the print start position is the first pin shown in FIG. 2, and the data from b6 to bo at address n' is not printed. This is data that must not be used.

Therefore, the printer control circuit 3 outputs an instruction to the mask pattern generation circuit 9 to generate a mask pattern that leaves only b7 of address n'.

The data output from the font memory 4 and the mask pattern generation circuit 9 is logically processed by the next AND gate circuit group 10, and is sent to the first latch circuit with only the necessary data b7 of the first pin remaining. 11.

Next, the printer control circuit 3 outputs an instruction to the font memory 4 and the mask pattern generation circuit 9 so that the second latch circuit 12 stores all "0" data.

Through such two operations, the first latch circuit 11
When the necessary print pattern data is available in the first latch circuit 11 and the second latch circuit 12, and the print head 6 reaches the print position, the printer control circuit 3 controls the first latch circuit 11 and the second latch circuit 12 to Instructs the OR gate circuit group 13 to output data.

Through such processing, the data output from the OR gate circuit group 13 becomes print data, which is supplied to the print head 6 via the print head drive circuit 5.

The operation up to now is the operation shown in cycle 1 in FIG.

When the printing of cycle 1 is completed, the print head 6 is spaced by one dot, and then cycle 2 is started.

In cycle 2, address n'+1 of font memory 4
Print the print data.

In this case, the first pin and the second pin are printable pins, and the third and subsequent pins are pins that must not be printed.

Therefore, the mask pattern output from the mask pattern generation circuit 9 is rl 100OOOOJB (binary representation) where b5 and below are all par 0''', as shown in FIG.
becomes.

Thereafter, printing is performed in the same manner until printing at address n'+7 in cycle 8.

FIG. 6 shows the dot pattern on the print medium and the position of the print head at the end of cycle 8.

In the drawings, ■ marks indicate printed dots, Δ marks indicate unprinted dots, and 0 marks indicate head positions.

In the next cycle 9, the first pin is b7 at the start address m' of the pattern of alphabetic characters rOJ, and the second and subsequent pins are from b6 of the start address n' of the pattern of alphabetic characters rTJ.

Print the data.

That is, the printer control circuit 3 first outputs the address n' to the font memory 4, and the mask pattern generation circuit 9 generates a mask pattern r01111111J B that masks only bit b7.
By giving a signal that outputs (binary representation), the first
The latch circuit 11 has the b6 glass at address n'. The remaining data is latched.

Next, the printer control circuit 3 outputs the address m' to the font memory 4, and the mask pattern generation circuit 9 outputs a mask pattern "10000000J B (binary representation)" that masks bits b6 to bo. By applying such a signal, the second latch circuit 12 latches the data with only b7 of address m' remaining.

The data latched in the first latch circuit 11 and the second latch circuit 12 is sent to the print head drive circuit 5 through the OR gate circuit group 13 in response to an output instruction from the printer control circuit 3, and is printed. .

Thereafter, until cycle 15, printing is performed by sequentially changing the read address of the font memory 4 and the mask pattern output from the mask pattern generation circuit 9, as shown in FIG.

Cycles 16 to 23 are a process in which the first pin exceeds the printing end position and the number of driven pins decreases.

Therefore, the first latch circuit 11 always stores all "0" data, and the second latch circuit 12 latches the output data.

However, except for this point, the same processing as the processes from cycle 1 to cycle 8 described above will be performed.

By the operations from cycle 1 to cycle 23 as described above, even when using the print heads 6 arranged diagonally in one row, printing using dot pattern data can be performed by simply accessing two memories during one printing cycle. It can be carried out.

In other words, as an extension of the prior art, the number of pins is 8.
This eliminates the need to access specific locations, allowing high-speed printing.

In one or more of the embodiments, the case where a print head having an 8-pin configuration and arranged in a diagonal row is used has been described in detail.

However, in the dot printer of the present invention, the print heads do not necessarily have to be arranged in one diagonal row, but in one row vertically.
It can be implemented in a configuration other than perpendicular to the printing direction, such as a column or two vertical columns.

For example, even when the tips of the wires are diamond-shaped, it is possible to perform the same operation as in the case where the wires are arranged in one diagonal row. That is, it is sufficient to set the data storage location in the font memory 4 and the mask pattern according to each arrangement.

Further, a mask pattern generation circuit 9, an AND gate circuit group 10, a first latch circuit 11 . Second latch circuit 12
．． It is also possible to process all or part of the functions of the OR gate circuit group 13 and the like by software using a microcomputer, and the dot printer of the present invention includes such a case.

As explained in detail above, the dot printer of the present invention includes a font memory that stores font data corresponding to the arrangement of the wire tips of the print head, and a mask that selects only the necessary data in this font memory. mask data generation means for generating data; AND gate circuit means for generating effective print data from font memory data and mask data; first and second latch circuits for storing the output of the AND gate circuit means; It is configured with an OR gate circuit that performs OR processing on the outputs of the first and second latch circuits.

Effects Therefore, according to the dot printer of the present invention, it is possible to increase the density of printed dots, reduce the size of the print head, and further,
Suitable for reducing magnetic interference, etc.

Even in the case of a print head in which the wire tips of the print head are arranged diagonally in a row or in a diamond shape, that is, in the case of a print head that has wire dots arranged diagonally with respect to the printing direction, high performance can be achieved by a processing circuit with a simple configuration. This makes it possible to print at high speeds, and the processing efficiency of the data processing system to which the printer is connected is significantly improved. This excellent effect can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a functional block diagram showing the configuration of essential parts of an embodiment of the dot printer of the present invention. m is a diagram showing the arrangement of the wire tips of the print head 6 in the embodiment of FIG. 1 projected onto the print medium;
ifuζ is a memory configuration diagram showing an example of the storage state of print data of English letters ITJ in the font memory 4 of the dot printer of the present invention, and FIG. (1) is a diagram explaining the principle of the storage state of font pattern data; Figure (2) shows the actual storage state.
Figure 1 (1) is a diagram explaining the principle of the storage state of font pattern data, Figure (2) is the actual storage state, and m is the first
Printer control circuit 3, font memory 4.
Mask pattern generation circuit 9, first latch circuit 11, second latch circuit 12. and an example of a table showing the state in which each output of the OR gate circuit group 13 changes according to the printing operation,
Hoshidanou is a diagram showing the dot pattern on the print medium and the position of the print head at the end of cycle 8, and Hoshidanou is a functional block diagram showing an example of the configuration of a conventional dot printer. υ is a memory configuration diagram showing an example of the storage state of print data in the font memory 4. FIG. 1 shows the case of the English character rTJ, and FIG. 2 shows the case of the English character rQJ. In the drawing, 1 is a host machine, 2 is a data latch circuit,
3 is a printer control circuit, 4 is a font memory,
5 is a print head drive circuit, 6 is a print head, 7 is a motor drive circuit, 8 is a 5P-LF motor, 9 is a mask pattern generation circuit, 1o is an AND gate circuit group, II is a first latch circuit, 12 is a first latch circuit 2 is a latch circuit, and 13 is an OR gate circuit group.

Claims (1)

[Claims] A serial impact wire dot that is equipped with a print head that has wire dots arranged diagonally with respect to the printing direction, and that retrieves print data corresponding to character codes input from a central processing unit from a font memory and prints them sequentially. In a printer, a font memory stores font data corresponding to the arrangement of wire tips of a print head, a mask data generation means for generating mask data for selecting only necessary data in the font memory, and a font memory. AND gate circuit means for generating effective print data from the data and mask data, first and second latch circuits for storing the outputs of the AND gate circuit means, and outputs of the first and second latch circuits. A dot printer characterized by comprising an OR gate circuit that performs OR processing.