JPS61193517A - Analog-digital converter - Google Patents

Abstract

PURPOSE:To improve the relation between an analog input signal and a digital output signal by inserting an amplifier or an attenuator to a feedback system. CONSTITUTION:In a single integral type, an amplifier 9 amplifying an output of a delay circuit 6 by a constant lambda1 is provided between an output of the delay circuit retarding a digital output signal VOUT by one sampling rate and a T input of an adder 3. Further, in a double integral type, an amplifier 10 amplifying an output of the delay circuit 6 by a constant alpha2 is provided between the output of the delay circuit 6 and an adder 7 in addition to the amplifier 9. Thus, through the operation of the amplifier inserted in the feedback system, the relation between an analog input signal VIN and a digital output signal VOUT is changed and then the voltage level of the analog input signal VIN and the S/N characteristic are changed optionally. Then the side range of applications of the A/D converter of DELTA-SIGMA type are attained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an analog-to-digital converter used in digital signal processing, and more particularly to a so-called Δ-Σ converter.
Related to analog-to-digital converters of the type.

(Prior Art) With the development of microfabrication technology and signal processing technology, digital signal processing is being applied in many fields, such as a shift from analog communication to digital communication.

When applying digital signal processing, an analog-to-digital converter (hereinafter abbreviated as an A/D converter) is required because all the original signals are analog (sound, two images, etc.). Conventional A/D converters perform 7-narrow-to-digital conversion at the sampling rate required for digital signal processing, so the sampling rate is relatively low, but quantization usually requires more than 10 bits. there were. As a result, there were disadvantages such as high power consumption and lower bits being sensitive to voltage drift, etc., which caused instability.
, March 23, 1984, Institute of Electronics and Communication Engineers, Haka Yomoto, "Study on the construction method of oversampling type A/D converter J, p93-ptoo),"
To overcome the problems of the A/D converter, Δ-
Σ type oversampling A/D converters have been attracting attention. Normally, Δ-Σ type A/D converters sample at a sampling rate higher than that required for digital signal processing. , quantization is performed using several bits or less, and a low-pass filter is inserted in the step of reducing the sampling rate to the desired sampling rate (decimation), thereby increasing the number of quantization bits while attenuating the noise component in the high frequency region.

A commonly used configuration of a Δ-Σ type oversampling A/D converter is shown in FIGS.
The figure shows a single integral type, and Figure 4 shows a double integral type. In these figures, 1 is an input terminal, 2 is an output terminal, 3 and 7 are adders, 4 and 8 are integrators, and 5 is an integrator. A comparator (which normally performs binary judgment) and 6 are delay circuits that delay by l sampling rate. Now, the analog input signal vLN
and digital output signal V. The relationship with ul is as follows, where Q is the quantization noise of comparator 5, and in the case of FIG. 3, V=V+Q(1
-z″”) -(1)OL+7'IN, and in the case of Fig. 4, VOIJT= vLN + Q (1-z-') 2
” (2).

Δ-Σ type oversampling A/D like this
In the converter, since the maximum value of the voltage of the analog input signal VXN varies depending on the actual usage conditions, it is necessary to make adjustments according to this maximum value. For this reason, in conventional devices, a positive or negative reference voltage equal to this maximum value is applied to the digital signal output V. According to t/T, adder 3 in the case of FIG.
A feedback system is provided to apply the feedback to the T input of the fourth
In the case shown in the figure, in addition to this, a feedback system is provided to apply to the U input of the adder 7.

(Problems to be Solved by the Invention) However, in the above Δ-Σ type oversampling A/D converter, as can be seen from equations (1) and (2), the analog input signal V , the voltage level of S
The relationship with /N characteristics is fixed in each case,
Moreover, it varies depending on the number of integrators used. Therefore, there was a problem that the relationship between the voltage level of the analog input signal VIN and the S/N characteristic was not necessarily appropriate under actual usage conditions. An A/D conversion device comprising: an integrator that integrates an integrator; a comparator that compares this output signal with a predetermined value and outputs a digital output signal; and a feedback system that feeds back the digital output signal to the analog input side of the integrator. The present invention, which is directed to a device, is constructed by inserting an amplifier or an attenuator into this feedback system.

(Function) By inserting an amplifier or an attenuator into the feedback system, the relationship between the analog input signal and the digital output signal can be changed. Therefore, the above problem is solved.

(Example) Hereinafter, the present invention will be described in detail based on an example with reference to the drawings.

1 and 2 are block diagrams showing embodiments of the present invention, in which the A/D converter in FIG. 1 is a single integral type, and the A/D converter in FIG. 2 is a double integral type. It is a type. In these figures, the same reference numerals are given to the same components as in FIGS. 3 and 4. The feature of this embodiment is that an amplifier (or attenuator) is provided in the feedback system.

That is, in the single integration type shown in FIG. 1, the digital output signal V is increased by l sampling rate. A delay circuit 6 is connected between the output of the delay circuit 6 that delays I and □ and the T input of the adder 3.
An amplifier that amplifies (or attenuates) the output of by a constant α (
or an attenuator) 9 is provided.

In the double integration type shown in FIG. 2, in addition to the amplifier (or attenuator) 9, an amplifier (or or an attenuator) 10 is provided.

Here, the analog input voltage ■IN in the case of Figure 1
and digital output signal V. The relationship with U□ is expressed as follows, where Q is the quantization noise of the comparator 5.

Vo,, (1+ (α, -1)z″1]=V,,+Q(
1-z”) --- (3) Similarly, in the case of Fig. 2, the analog input voltage V and the digital output signal
. The relationship with u'y is expressed as follows.

Vout (1+ (α1+ Q, 2)
z + (1-Q2.) Z-li=■work, +Q(
1-z 1 (4) For example, if α is set to 0.5 in equation (3), equation (3) can be expressed as follows.

VOL/T (10,5z-') = V engineering, +Q (1-z-") -(5)(5
), the digital output signal ■. l, □
The difference between the current value and the previous value of half is related to the analog input signal vIN and the quantization noise Q. Also, from this relationship, if the sampling rate is sufficiently high compared to the analog input signal frequency, the digital output signal V
0oA is twice as much as the conventional one. Furthermore, if α1=2.α2=1 in equation (0), equation (4) can be expressed as follows.

V01/T(1+z-1) =V, 7+Q(1-z-J2-(e) As seen from equation (6), the digital output signal ■OL
The sum of the current value and the previous value of /T is the analog input signal V
quantization noise Q.

In this way, the relationship between the analog input signals (2) and N and the digital output signal VOUT can be changed by the action of the amplifier (or attenuator) inserted in the feedback system. Therefore, the relationship between the voltage level of the analog input signal VLN and the S/N characteristic can be changed arbitrarily.

Next, we will compare the actual measured value of the relationship between the voltage level of the analog input signal V and the S/N characteristic when α = 0.5 in Figure 1 to the actual measured value for the conventional example in Figure 3. with fifth
Also, in FIG. 2, α = 2. The voltage level of analog input signal vzt4 and S when α2=1
The measured values of the relationship with /N characteristics are shown in FIG. 6 together with the measured values for the conventional example shown in FIG. In these measurements, the sampling frequency was 2048 kHz, the analog input signal frequency was 800 Hz, and the S/N characteristic band was 4.
kHz, and the voltage lv of the analog input signal ■ is Od.
It was set as B. 5 and 6, curve A shows the case of this embodiment, and curve B shows the case of the conventional example.As can be seen from these figures, according to this embodiment, the constant α!
, α2 can be appropriately selected to change the voltage level of the V side of the analog input signal compared to the conventional one. Note that when the present invention is configured using an operational amplifier, the maximum voltage applied to the operational amplifier can be varied by varying the constant. This is beneficial in order to prevent the dynamic range from decreasing if this maximum voltage is too high.

(Effects of the Invention) As explained above, according to the present invention, since an amplifier or an operational amplifier is provided in the feedback system of the Δ-Σ type A/D converter, the voltage level of the analog input signal and the S/D
The effect is that the relationship with the N characteristic can be easily changed. Therefore, according to the present invention, the Δ-Σ type A/D converter can be used in a wide range of applications, and the range of applications including communication equipment and electronic equipment can be greatly expanded.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a block diagram showing another embodiment of the present invention. MS3 diagram and FIG. 4 are respective Δ-Σ type oversampling A.
Block diagrams illustrating configuration examples of /D converters, FIGS. 5 and 6
Each figure is a diagram showing the relationship between the voltage level of an analog input signal and the S/N characteristic in the configurations of FIGS. 1 to 4, respectively. 1-m-input terminal, 2-m-output terminal, 3.7--adder, 4.8-m-integrator, 5-11 comparator, 6--
delay circuit. 9, 10--an amplifier (or attenuator). Patent Application Hitoki Electric Industry Co., Ltd. Patent Application Agent

Claims (1)

[Claims] It has an integrator that integrates an analog input signal, a comparator that compares this output signal with a predetermined value and outputs a digital output signal, and a feedback system that feeds back the digital output signal to the analog input side of the integrator. An A/D converter, characterized in that an amplifier or an attenuator is inserted in the feedback system.